rtl8211F_led_control

hc

2024-05-11 297b60346df8beafee954a0fd7c2d64f33f3b9bc

 kernel/arch/arm/kernel/bios32.c
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@@ -252,23 +252,6 @@
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 }
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 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
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-static void pci_fixup_it8152(struct pci_dev *dev)
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-{
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-	int i;
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-	/* fixup for ITE 8152 devices */
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-	/* FIXME: add defines for class 0x68000 and 0x80103 */
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-	if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST ||
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-	    dev->class == 0x68000 ||
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-	    dev->class == 0x80103) {
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-		for (i = 0; i < PCI_NUM_RESOURCES; i++) {
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-			dev->resource[i].start = 0;
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-			dev->resource[i].end   = 0;
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-			dev->resource[i].flags = 0;
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-		}
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-	}
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-}
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-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8152, pci_fixup_it8152);
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-
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 /*
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  * If the bus contains any of these devices, then we must not turn on
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  * parity checking of any kind.  Currently this is CyberPro 20x0 only.
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@@ -411,8 +394,7 @@
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 	return irq;
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 }
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-static int pcibios_init_resource(int busnr, struct pci_sys_data *sys,
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-				 int io_optional)
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+static int pcibios_init_resource(int busnr, struct pci_sys_data *sys)
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 {
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 	int ret;
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 	struct resource_entry *window;
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@@ -421,14 +403,6 @@
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 		pci_add_resource_offset(&sys->resources,
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 			 &iomem_resource, sys->mem_offset);
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 	}
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-
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-	/*
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-	 * If a platform says I/O port support is optional, we don't add
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-	 * the default I/O space.  The platform is responsible for adding
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-	 * any I/O space it needs.
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-	 */
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-	if (io_optional)
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-		return 0;
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 	resource_list_for_each_entry(window, &sys->resources)
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 		if (resource_type(window->res) == IORESOURCE_IO)
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@@ -479,7 +453,7 @@
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 		if (ret > 0) {
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-			ret = pcibios_init_resource(nr, sys, hw->io_optional);
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+			ret = pcibios_init_resource(nr, sys);
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 			if (ret)  {
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 				pci_free_host_bridge(bridge);
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 				break;
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@@ -497,9 +471,6 @@
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 				bridge->sysdata = sys;
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 				bridge->busnr = sys->busnr;
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 				bridge->ops = hw->ops;
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-				bridge->msi = hw->msi_ctrl;
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-				bridge->align_resource =
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-						hw->align_resource;
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 				ret = pci_scan_root_bus_bridge(bridge);
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 			}