change system file

hc

2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771

 kernel/tools/testing/selftests/powerpc/include/reg.h
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@@ -1,6 +1,6 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Copyright 2014, Michael Ellerman, IBM Corp.
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- * Licensed under GPLv2.
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  */
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 #ifndef _SELFTESTS_POWERPC_REG_H
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@@ -17,6 +17,7 @@
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 				    : "memory")
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 #define mb()		asm volatile("sync" : : : "memory");
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+#define barrier()	asm volatile("" : : : "memory");
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 #define SPRN_MMCR2     769
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 #define SPRN_MMCRA     770
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@@ -56,6 +57,12 @@
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 #define SPRN_PPR       896	/* Program Priority Register */
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 #define SPRN_AMR       13	/* Authority Mask Register - problem state */
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+#define set_amr(v)	asm volatile("isync;" \
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+				     "mtspr " __stringify(SPRN_AMR) ",%0;" \
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+				     "isync" : \
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+				    : "r" ((unsigned long)(v)) \
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+				    : "memory")
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+
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 /* TEXASR register bits */
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 #define TEXASR_FC	0xFE00000000000000
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 #define TEXASR_FP	0x0100000000000000
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@@ -76,6 +83,16 @@
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 #define TEXASR_TE	0x0000000004000000
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 #define TEXASR_ROT	0x0000000002000000
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+/* MSR register bits */
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+#define MSR_TS_S_LG     33              /* Trans Mem state: Suspended */
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+#define MSR_TS_T_LG	34              /* Trans Mem state: Active */
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+
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+#define __MASK(X)       (1UL<<(X))
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+
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+/* macro to check TM MSR bits */
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+#define MSR_TS_S        __MASK(MSR_TS_S_LG)   /* Transaction Suspended */
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+#define MSR_TS_T	__MASK(MSR_TS_T_LG)   /* Transaction Transactional */
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+
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 /* Vector Instructions */
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 #define VSX_XX1(xs, ra, rb)	(((xs) & 0x1f) << 21 | ((ra) << 16) |  \
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 				 ((rb) << 11) | (((xs) >> 5)))