change system file

hc

2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771

 kernel/include/sound/hda_register.h
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@@ -79,6 +79,7 @@
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 /* stream register offsets from stream base */
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 #define AZX_REG_SD_CTL			0x00
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+#define AZX_REG_SD_CTL_3B		0x02 /* 3rd byte of SD_CTL register */
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 #define AZX_REG_SD_STS			0x03
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 #define AZX_REG_SD_LPIB			0x04
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 #define AZX_REG_SD_CBL			0x08
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@@ -118,7 +119,7 @@
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 #define AZX_REG_VS_EM3U			0x103C
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 #define AZX_REG_VS_EM4L			0x1040
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 #define AZX_REG_VS_EM4U			0x1044
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-#define AZX_REG_VS_LTRC			0x1048
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+#define AZX_REG_VS_LTRP			0x1048
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 #define AZX_REG_VS_D0I3C		0x104A
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 #define AZX_REG_VS_PCE			0x104B
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 #define AZX_REG_VS_L2MAGC		0x1050
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@@ -165,6 +166,7 @@
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 #define SD_INT_COMPLETE		0x04	/* completion interrupt */
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 #define SD_INT_MASK		(SD_INT_DESC_ERR|SD_INT_FIFO_ERR|\
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 				 SD_INT_COMPLETE)
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+#define SD_CTL_STRIPE_MASK	0x3	/* stripe control mask */
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 /* SD_STS */
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 #define SD_STS_FIFO_READY	0x20	/* FIFO ready */
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@@ -262,6 +264,9 @@
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 #define AZX_REG_ML_LOUTPAY		0x20
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 #define AZX_REG_ML_LINPAY		0x30
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+/* bit0 is reserved, with BIT(1) mapping to stream1 */
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+#define ML_LOSIDV_STREAM_MASK		0xFFFE
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+
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 #define ML_LCTL_SCF_MASK			0xF
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 #define AZX_MLCTL_SPA				(0x1 << 16)
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 #define AZX_MLCTL_CPA				(0x1 << 23)