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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 1 | 2 | /* |
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| 2 | 3 | * SuperH HSPI bus driver |
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| 3 | 4 | * |
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| .. | .. |
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| 7 | 8 | * Based on pxa2xx_spi.c: |
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| 8 | 9 | * Copyright (C) 2011 Renesas Solutions Corp. |
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| 9 | 10 | * Copyright (C) 2005 Stephen Street / StreetFire Sound Labs |
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| 10 | | - * |
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| 11 | | - * This program is free software; you can redistribute it and/or modify |
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| 12 | | - * it under the terms of the GNU General Public License as published by |
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| 13 | | - * the Free Software Foundation; version 2 of the License. |
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| 14 | | - * |
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| 15 | | - * This program is distributed in the hope that it will be useful, |
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| 16 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 17 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 18 | | - * GNU General Public License for more details. |
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| 19 | 11 | */ |
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| 20 | 12 | |
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| 21 | 13 | #include <linux/clk.h> |
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| .. | .. |
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| 43 | 35 | |
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| 44 | 36 | struct hspi_priv { |
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| 45 | 37 | void __iomem *addr; |
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| 46 | | - struct spi_master *master; |
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| 38 | + struct spi_controller *ctlr; |
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| 47 | 39 | struct device *dev; |
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| 48 | 40 | struct clk *clk; |
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| 49 | 41 | }; |
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| .. | .. |
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| 148 | 140 | hspi_write(hspi, SPSCR, 0x21); /* master mode / CS control */ |
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| 149 | 141 | } |
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| 150 | 142 | |
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| 151 | | -static int hspi_transfer_one_message(struct spi_master *master, |
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| 143 | +static int hspi_transfer_one_message(struct spi_controller *ctlr, |
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| 152 | 144 | struct spi_message *msg) |
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| 153 | 145 | { |
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| 154 | | - struct hspi_priv *hspi = spi_master_get_devdata(master); |
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| 146 | + struct hspi_priv *hspi = spi_controller_get_devdata(ctlr); |
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| 155 | 147 | struct spi_transfer *t; |
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| 156 | 148 | u32 tx; |
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| 157 | 149 | u32 rx; |
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| .. | .. |
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| 198 | 190 | |
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| 199 | 191 | msg->actual_length += t->len; |
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| 200 | 192 | |
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| 201 | | - if (t->delay_usecs) |
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| 202 | | - udelay(t->delay_usecs); |
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| 193 | + spi_transfer_delay_exec(t); |
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| 203 | 194 | |
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| 204 | 195 | if (cs_change) { |
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| 205 | 196 | ndelay(nsecs); |
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| .. | .. |
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| 213 | 204 | ndelay(nsecs); |
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| 214 | 205 | hspi_hw_cs_disable(hspi); |
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| 215 | 206 | } |
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| 216 | | - spi_finalize_current_message(master); |
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| 207 | + spi_finalize_current_message(ctlr); |
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| 217 | 208 | |
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| 218 | 209 | return ret; |
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| 219 | 210 | } |
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| .. | .. |
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| 221 | 212 | static int hspi_probe(struct platform_device *pdev) |
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| 222 | 213 | { |
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| 223 | 214 | struct resource *res; |
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| 224 | | - struct spi_master *master; |
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| 215 | + struct spi_controller *ctlr; |
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| 225 | 216 | struct hspi_priv *hspi; |
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| 226 | 217 | struct clk *clk; |
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| 227 | 218 | int ret; |
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| .. | .. |
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| 233 | 224 | return -EINVAL; |
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| 234 | 225 | } |
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| 235 | 226 | |
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| 236 | | - master = spi_alloc_master(&pdev->dev, sizeof(*hspi)); |
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| 237 | | - if (!master) { |
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| 238 | | - dev_err(&pdev->dev, "spi_alloc_master error.\n"); |
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| 227 | + ctlr = spi_alloc_master(&pdev->dev, sizeof(*hspi)); |
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| 228 | + if (!ctlr) |
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| 239 | 229 | return -ENOMEM; |
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| 240 | | - } |
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| 241 | 230 | |
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| 242 | 231 | clk = clk_get(&pdev->dev, NULL); |
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| 243 | 232 | if (IS_ERR(clk)) { |
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| .. | .. |
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| 246 | 235 | goto error0; |
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| 247 | 236 | } |
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| 248 | 237 | |
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| 249 | | - hspi = spi_master_get_devdata(master); |
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| 238 | + hspi = spi_controller_get_devdata(ctlr); |
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| 250 | 239 | platform_set_drvdata(pdev, hspi); |
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| 251 | 240 | |
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| 252 | 241 | /* init hspi */ |
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| 253 | | - hspi->master = master; |
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| 242 | + hspi->ctlr = ctlr; |
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| 254 | 243 | hspi->dev = &pdev->dev; |
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| 255 | 244 | hspi->clk = clk; |
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| 256 | 245 | hspi->addr = devm_ioremap(hspi->dev, |
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| 257 | 246 | res->start, resource_size(res)); |
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| 258 | 247 | if (!hspi->addr) { |
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| 259 | | - dev_err(&pdev->dev, "ioremap error.\n"); |
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| 260 | 248 | ret = -ENOMEM; |
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| 261 | 249 | goto error1; |
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| 262 | 250 | } |
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| 263 | 251 | |
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| 264 | 252 | pm_runtime_enable(&pdev->dev); |
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| 265 | 253 | |
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| 266 | | - master->bus_num = pdev->id; |
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| 267 | | - master->mode_bits = SPI_CPOL | SPI_CPHA; |
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| 268 | | - master->dev.of_node = pdev->dev.of_node; |
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| 269 | | - master->auto_runtime_pm = true; |
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| 270 | | - master->transfer_one_message = hspi_transfer_one_message; |
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| 271 | | - master->bits_per_word_mask = SPI_BPW_MASK(8); |
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| 254 | + ctlr->bus_num = pdev->id; |
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| 255 | + ctlr->mode_bits = SPI_CPOL | SPI_CPHA; |
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| 256 | + ctlr->dev.of_node = pdev->dev.of_node; |
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| 257 | + ctlr->auto_runtime_pm = true; |
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| 258 | + ctlr->transfer_one_message = hspi_transfer_one_message; |
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| 259 | + ctlr->bits_per_word_mask = SPI_BPW_MASK(8); |
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| 272 | 260 | |
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| 273 | | - ret = devm_spi_register_master(&pdev->dev, master); |
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| 261 | + ret = devm_spi_register_controller(&pdev->dev, ctlr); |
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| 274 | 262 | if (ret < 0) { |
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| 275 | | - dev_err(&pdev->dev, "spi_register_master error.\n"); |
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| 263 | + dev_err(&pdev->dev, "devm_spi_register_controller error.\n"); |
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| 276 | 264 | goto error2; |
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| 277 | 265 | } |
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| 278 | 266 | |
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| .. | .. |
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| 283 | 271 | error1: |
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| 284 | 272 | clk_put(clk); |
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| 285 | 273 | error0: |
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| 286 | | - spi_master_put(master); |
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| 274 | + spi_controller_put(ctlr); |
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| 287 | 275 | |
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| 288 | 276 | return ret; |
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| 289 | 277 | } |
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| .. | .. |
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| 316 | 304 | module_platform_driver(hspi_driver); |
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| 317 | 305 | |
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| 318 | 306 | MODULE_DESCRIPTION("SuperH HSPI bus driver"); |
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| 319 | | -MODULE_LICENSE("GPL"); |
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| 307 | +MODULE_LICENSE("GPL v2"); |
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| 320 | 308 | MODULE_AUTHOR("Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>"); |
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| 321 | 309 | MODULE_ALIAS("platform:sh-hspi"); |
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