| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * Broadcom BCM63xx SPI controller support |
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| 3 | 4 | * |
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| 4 | 5 | * Copyright (C) 2009-2012 Florian Fainelli <florian@openwrt.org> |
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| 5 | 6 | * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com> |
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| 6 | | - * |
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| 7 | | - * This program is free software; you can redistribute it and/or |
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| 8 | | - * modify it under the terms of the GNU General Public License |
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| 9 | | - * as published by the Free Software Foundation; either version 2 |
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| 10 | | - * of the License, or (at your option) any later version. |
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| 11 | | - * |
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| 12 | | - * This program is distributed in the hope that it will be useful, |
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| 13 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 14 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 15 | | - * GNU General Public License for more details. |
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| 16 | 7 | */ |
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| 17 | 8 | |
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| 18 | 9 | #include <linux/kernel.h> |
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| .. | .. |
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| 27 | 18 | #include <linux/err.h> |
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| 28 | 19 | #include <linux/pm_runtime.h> |
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| 29 | 20 | #include <linux/of.h> |
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| 21 | +#include <linux/reset.h> |
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| 30 | 22 | |
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| 31 | 23 | /* BCM 6338/6348 SPI core */ |
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| 32 | 24 | #define SPI_6348_RSET_SIZE 64 |
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| .. | .. |
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| 134 | 126 | SPI_MSG_DATA_SIZE, |
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| 135 | 127 | }; |
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| 136 | 128 | |
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| 137 | | -#define BCM63XX_SPI_MAX_PREPEND 15 |
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| 129 | +#define BCM63XX_SPI_MAX_PREPEND 7 |
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| 138 | 130 | |
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| 139 | 131 | #define BCM63XX_SPI_MAX_CS 8 |
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| 140 | 132 | #define BCM63XX_SPI_BUS_NUM 0 |
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| .. | .. |
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| 377 | 369 | } |
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| 378 | 370 | |
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| 379 | 371 | /* CS will be deasserted directly after transfer */ |
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| 380 | | - if (t->delay_usecs) { |
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| 372 | + if (t->delay_usecs || t->delay.value) { |
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| 381 | 373 | dev_err(&spi->dev, "unable to keep CS asserted after transfer\n"); |
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| 382 | 374 | status = -EINVAL; |
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| 383 | 375 | goto exit; |
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| .. | .. |
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| 502 | 494 | struct bcm63xx_spi *bs; |
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| 503 | 495 | int ret; |
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| 504 | 496 | u32 num_cs = BCM63XX_SPI_MAX_CS; |
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| 497 | + struct reset_control *reset; |
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| 505 | 498 | |
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| 506 | 499 | if (dev->of_node) { |
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| 507 | 500 | const struct of_device_id *match; |
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| .. | .. |
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| 529 | 522 | } |
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| 530 | 523 | |
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| 531 | 524 | irq = platform_get_irq(pdev, 0); |
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| 532 | | - if (irq < 0) { |
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| 533 | | - dev_err(dev, "no irq: %d\n", irq); |
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| 525 | + if (irq < 0) |
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| 534 | 526 | return irq; |
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| 535 | | - } |
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| 536 | 527 | |
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| 537 | 528 | clk = devm_clk_get(dev, "spi"); |
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| 538 | 529 | if (IS_ERR(clk)) { |
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| 539 | 530 | dev_err(dev, "no clock for device\n"); |
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| 540 | 531 | return PTR_ERR(clk); |
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| 541 | 532 | } |
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| 533 | + |
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| 534 | + reset = devm_reset_control_get_optional_exclusive(dev, NULL); |
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| 535 | + if (IS_ERR(reset)) |
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| 536 | + return PTR_ERR(reset); |
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| 542 | 537 | |
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| 543 | 538 | master = spi_alloc_master(dev, sizeof(*bs)); |
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| 544 | 539 | if (!master) { |
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| .. | .. |
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| 590 | 585 | if (ret) |
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| 591 | 586 | goto out_err; |
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| 592 | 587 | |
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| 588 | + ret = reset_control_reset(reset); |
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| 589 | + if (ret) { |
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| 590 | + dev_err(dev, "unable to reset device: %d\n", ret); |
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| 591 | + goto out_clk_disable; |
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| 592 | + } |
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| 593 | + |
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| 593 | 594 | bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS); |
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| 594 | 595 | |
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| 595 | 596 | /* register and we are done */ |
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