~hc/RK356X_SDK_RELEASE.git

..	..	@@ -0,0 +1,637 @@
	1	+// SPDX-License-Identifier: GPL-2.0
	2	+/*
	3	+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd
	4	+ */
	5	+#include <linux/bcd.h>
	6	+#include <linux/kernel.h>
	7	+#include <linux/mfd/rk630.h>
	8	+#include <linux/module.h>
	9	+#include <linux/platform_device.h>
	10	+#include <linux/rtc.h>
	11	+
	12	+/* RTC_CTRL_REG bitfields */
	13	+#define RTC_CTRL_REG_START_RTC BIT(0)
	14	+
	15	+/* RK630 has a shadowed register for saving a "frozen" RTC time.
	16	+ * When user setting "GET_TIME" to 1, the time will save in this shadowed
	17	+ * register. If set "READSEL" to 1, user read rtc time register, actually
	18	+ * get the time of that moment. If we need the real time, clr this bit.
	19	+ */
	20	+#define RTC_CTRL_REG_RTC_GET_TIME BIT(6)
	21	+#define RTC_CTRL_REG_RTC_READSEL_M BIT(7)
	22	+#define RTC_INT_REG_ALARM_EN BIT(7)
	23	+
	24	+#define RTC_STATUS_MASK 0xFF
	25	+
	26	+#define SECONDS_REG_MSK 0x7F
	27	+#define MINUTES_REG_MAK 0x7F
	28	+#define HOURS_REG_MSK 0x3F
	29	+#define DAYS_REG_MSK 0x3F
	30	+#define MONTHS_REG_MSK 0x1F
	31	+#define YEARS_REG_MSK 0xFF
	32	+#define WEEKS_REG_MSK 0x7
	33	+
	34	+#define RTC_VREF_INIT 0x40
	35	+#define RTC_XO_START_MIR 0x40
	36	+
	37	+#define NUM_TIME_REGS 8
	38	+#define NUM_ALARM_REGS 7
	39	+
	40	+#define DISABLE_ALARM_INT 0x3F
	41	+#define ENABLE_ALARM_INT 0xFF
	42	+#define ALARM_INT_STATUS BIT(4)
	43	+
	44	+#define CLK32K_TEST_EN BIT(0)
	45	+#define CLK32K_TEST_START BIT(0)
	46	+#define CLK32K_TEST_STATUS BIT(1)
	47	+#define CLK32K_TEST_DONE BIT(2)
	48	+#define CLK32K_TEST_LEN 2
	49	+
	50	+#define CLK32K_COMP_DIR_ADD BIT(7)
	51	+#define CLK32K_COMP_EN BIT(2)
	52	+#define CLK32K_NO_COMP 0x1
	53	+
	54	+#define CLK32K_TEST_REF_CLK 25000000
	55	+
	56	+struct rk630_rtc {
	57	+ struct rk630 *rk630;
	58	+ struct rtc_device *rtc;
	59	+ int irq;
	60	+ unsigned int flag;
	61	+};
	62	+
	63	+/* Read current time and date in RTC */
	64	+static int rk630_rtc_readtime(struct device dev, struct rtc_time tm)
	65	+{
	66	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(dev);
	67	+ struct rk630 *rk630 = rk630_rtc->rk630;
	68	+ u32 rtc_data[NUM_TIME_REGS];
	69	+ int ret;
	70	+ int yearl, yearh;
	71	+
	72	+ /* Force an update of the shadowed registers right now */
	73	+ ret = regmap_update_bits(rk630->rtc, RTC_CTRL,
	74	+ RTC_CTRL_REG_RTC_GET_TIME,
	75	+ RTC_CTRL_REG_RTC_GET_TIME);
	76	+ if (ret) {
	77	+ dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret);
	78	+ return ret;
	79	+ }
	80	+
	81	+ /*
	82	+ * After we set the GET_TIME bit, the rtc time can't be read
	83	+ * immediately. So we should wait up to 31.25 us, about one cycle of
	84	+ * 32khz. If we clear the GET_TIME bit here, the time of i2c transfer
	85	+ * certainly more than 31.25us: 16 * 2.5us at 400kHz bus frequency.
	86	+ */
	87	+ ret = regmap_update_bits(rk630->rtc, RTC_CTRL,
	88	+ RTC_CTRL_REG_RTC_GET_TIME,
	89	+ 0);
	90	+ if (ret) {
	91	+ dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret);
	92	+ return ret;
	93	+ }
	94	+
	95	+ ret = regmap_bulk_read(rk630->rtc, RTC_SET_SECONDS,
	96	+ rtc_data, NUM_TIME_REGS);
	97	+ if (ret) {
	98	+ dev_err(dev, "Failed to bulk read rtc_data: %d\n", ret);
	99	+ return ret;
	100	+ }
	101	+
	102	+ tm->tm_sec = bcd2bin(rtc_data[0] & SECONDS_REG_MSK);
	103	+ tm->tm_min = bcd2bin(rtc_data[1] & MINUTES_REG_MAK);
	104	+ tm->tm_hour = bcd2bin(rtc_data[2] & HOURS_REG_MSK);
	105	+ tm->tm_mday = bcd2bin(rtc_data[3] & DAYS_REG_MSK);
	106	+ tm->tm_mon = (bcd2bin(rtc_data[4] & MONTHS_REG_MSK)) - 1;
	107	+ yearl = (bcd2bin(rtc_data[5] & YEARS_REG_MSK));
	108	+ yearh = (bcd2bin(rtc_data[6] & YEARS_REG_MSK));
	109	+ tm->tm_year = yearh * 100 + yearl + 100;
	110	+ tm->tm_wday = bcd2bin(rtc_data[7] & WEEKS_REG_MSK);
	111	+
	112	+ dev_dbg(dev, "RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
	113	+ 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
	114	+ tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
	115	+
	116	+ return ret;
	117	+}
	118	+
	119	+/* Set current time and date in RTC */
	120	+static int rk630_rtc_set_time(struct device dev, struct rtc_time tm)
	121	+{
	122	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(dev);
	123	+ struct rk630 *rk630 = rk630_rtc->rk630;
	124	+ u32 rtc_data[NUM_TIME_REGS];
	125	+ int ret;
	126	+ int yearl, yearh;
	127	+
	128	+ dev_dbg(dev, "set RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
	129	+ 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
	130	+ tm->tm_wday, tm->tm_hour, tm->tm_min, tm->tm_sec);
	131	+
	132	+ rtc_data[0] = bin2bcd(tm->tm_sec);
	133	+ rtc_data[1] = bin2bcd(tm->tm_min);
	134	+ rtc_data[2] = bin2bcd(tm->tm_hour);
	135	+ rtc_data[3] = bin2bcd(tm->tm_mday);
	136	+ rtc_data[4] = bin2bcd(tm->tm_mon + 1);
	137	+ if (tm->tm_year > 199) {
	138	+ yearh = (tm->tm_year - 100) / 100;
	139	+ yearl = tm->tm_year - 100 - yearh * 100;
	140	+ } else {
	141	+ yearh = 0;
	142	+ yearl = tm->tm_year - 100 - yearh * 100;
	143	+ }
	144	+ rtc_data[5] = bin2bcd(yearl);
	145	+ rtc_data[6] = bin2bcd(yearh);
	146	+ rtc_data[7] = bin2bcd(tm->tm_wday);
	147	+
	148	+ /* Stop RTC while updating the RTC registers */
	149	+ ret = regmap_update_bits(rk630->rtc, RTC_CTRL,
	150	+ RTC_CTRL_REG_START_RTC, 0);
	151	+ if (ret) {
	152	+ dev_err(dev, "Failed to update bits rtc_ctrl: %d\n", ret);
	153	+ return ret;
	154	+ }
	155	+ ret = regmap_bulk_write(rk630->rtc, RTC_SET_SECONDS,
	156	+ rtc_data, NUM_TIME_REGS);
	157	+ if (ret) {
	158	+ dev_err(dev, "Failed to bull write rtc_data: %d\n", ret);
	159	+ return ret;
	160	+ }
	161	+
	162	+ /* Start RTC again */
	163	+ ret = regmap_update_bits(rk630->rtc, RTC_CTRL,
	164	+ RTC_CTRL_REG_RTC_READSEL_M \|
	165	+ RTC_CTRL_REG_START_RTC,
	166	+ RTC_CTRL_REG_RTC_READSEL_M \|
	167	+ RTC_CTRL_REG_START_RTC);
	168	+ if (ret) {
	169	+ dev_err(dev, "Failed to update bits RTC control: %d\n", ret);
	170	+ return ret;
	171	+ }
	172	+
	173	+ return 0;
	174	+}
	175	+
	176	+/* Read alarm time and date in RTC */
	177	+static int rk630_rtc_readalarm(struct device dev, struct rtc_wkalrm alrm)
	178	+{
	179	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(dev);
	180	+ struct rk630 *rk630 = rk630_rtc->rk630;
	181	+ u32 alrm_data[NUM_ALARM_REGS];
	182	+ u32 int_reg;
	183	+ int yearl, yearh;
	184	+ int ret;
	185	+
	186	+ ret = regmap_bulk_read(rk630->rtc,
	187	+ RTC_ALARM_SECONDS,
	188	+ alrm_data, NUM_ALARM_REGS);
	189	+ if (ret) {
	190	+ dev_err(dev, "Failed to read RTC alarm date REG: %d\n", ret);
	191	+ return ret;
	192	+ }
	193	+
	194	+ alrm->time.tm_sec = bcd2bin(alrm_data[0] & SECONDS_REG_MSK);
	195	+ alrm->time.tm_min = bcd2bin(alrm_data[1] & MINUTES_REG_MAK);
	196	+ alrm->time.tm_hour = bcd2bin(alrm_data[2] & HOURS_REG_MSK);
	197	+ alrm->time.tm_mday = bcd2bin(alrm_data[3] & DAYS_REG_MSK);
	198	+ alrm->time.tm_mon = (bcd2bin(alrm_data[4] & MONTHS_REG_MSK)) - 1;
	199	+ yearl = (bcd2bin(alrm_data[5] & YEARS_REG_MSK));
	200	+ yearh = (bcd2bin(alrm_data[6] & YEARS_REG_MSK));
	201	+ alrm->time.tm_year = yearh * 100 + yearl + 100;
	202	+
	203	+ ret = regmap_read(rk630->rtc, RTC_INT0_EN, &int_reg);
	204	+ if (ret) {
	205	+ dev_err(dev, "Failed to read RTC INT REG: %d\n", ret);
	206	+ return ret;
	207	+ }
	208	+
	209	+ dev_dbg(dev, "alrm read RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
	210	+ 1900 + alrm->time.tm_year, alrm->time.tm_mon + 1,
	211	+ alrm->time.tm_mday, alrm->time.tm_wday, alrm->time.tm_hour,
	212	+ alrm->time.tm_min, alrm->time.tm_sec);
	213	+
	214	+ alrm->enabled = (int_reg & RTC_INT_REG_ALARM_EN) ? 1 : 0;
	215	+
	216	+ return 0;
	217	+}
	218	+
	219	+static int rk630_rtc_stop_alarm(struct rk630_rtc *rk630_rtc)
	220	+{
	221	+ struct rk630 *rk630 = rk630_rtc->rk630;
	222	+ int ret;
	223	+
	224	+ ret = regmap_write(rk630->rtc, RTC_INT0_EN, DISABLE_ALARM_INT);
	225	+
	226	+ return ret;
	227	+}
	228	+
	229	+static int rk630_rtc_start_alarm(struct rk630_rtc *rk630_rtc)
	230	+{
	231	+ struct rk630 *rk630 = rk630_rtc->rk630;
	232	+ int ret = 0;
	233	+
	234	+ ret = regmap_write(rk630->rtc, RTC_STATUS0, RTC_STATUS_MASK);
	235	+ if (ret) {
	236	+ dev_err(rk630->dev, "Failed to write RTC_STATUS0: %d\n", ret);
	237	+ return ret;
	238	+ }
	239	+ ret = regmap_write(rk630->rtc, RTC_STATUS0, 0);
	240	+ if (ret) {
	241	+ dev_err(rk630->dev, "Failed to write RTC_STATUS0: %d\n", ret);
	242	+ return ret;
	243	+ }
	244	+ ret = regmap_write(rk630->rtc, RTC_INT0_EN, ENABLE_ALARM_INT);
	245	+ if (ret) {
	246	+ dev_err(rk630->dev, "Failed to write RTC_INT0_EN: %d\n", ret);
	247	+ return ret;
	248	+ }
	249	+
	250	+ return ret;
	251	+}
	252	+
	253	+static int rk630_rtc_setalarm(struct device dev, struct rtc_wkalrm alrm)
	254	+{
	255	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(dev);
	256	+ struct rk630 *rk630 = rk630_rtc->rk630;
	257	+ u32 alrm_data[NUM_ALARM_REGS];
	258	+ int yearl, yearh;
	259	+ int ret;
	260	+
	261	+ ret = rk630_rtc_stop_alarm(rk630_rtc);
	262	+ if (ret) {
	263	+ dev_err(dev, "Failed to stop alarm: %d\n", ret);
	264	+ return ret;
	265	+ }
	266	+ dev_dbg(dev, "alrm set RTC date/time %4d-%02d-%02d(%d) %02d:%02d:%02d\n",
	267	+ 1900 + alrm->time.tm_year, alrm->time.tm_mon + 1,
	268	+ alrm->time.tm_mday, alrm->time.tm_wday, alrm->time.tm_hour,
	269	+ alrm->time.tm_min, alrm->time.tm_sec);
	270	+
	271	+ alrm_data[0] = bin2bcd(alrm->time.tm_sec);
	272	+ alrm_data[1] = bin2bcd(alrm->time.tm_min);
	273	+ alrm_data[2] = bin2bcd(alrm->time.tm_hour);
	274	+ alrm_data[3] = bin2bcd(alrm->time.tm_mday);
	275	+ alrm_data[4] = bin2bcd(alrm->time.tm_mon + 1);
	276	+ if (alrm->time.tm_year > 199) {
	277	+ yearh = (alrm->time.tm_year - 100) / 100;
	278	+ yearl = alrm->time.tm_year - 100 - yearh * 100;
	279	+ } else {
	280	+ yearh = 0;
	281	+ yearl = alrm->time.tm_year - 100 - yearh * 100;
	282	+ }
	283	+ alrm_data[5] = bin2bcd(yearl);
	284	+ alrm_data[6] = bin2bcd(yearh);
	285	+
	286	+ ret = regmap_bulk_write(rk630->rtc,
	287	+ RTC_ALARM_SECONDS,
	288	+ alrm_data, NUM_ALARM_REGS);
	289	+ if (ret) {
	290	+ dev_err(dev, "Failed to bulk write: %d\n", ret);
	291	+ return ret;
	292	+ }
	293	+
	294	+ if (alrm->enabled) {
	295	+ ret = rk630_rtc_start_alarm(rk630_rtc);
	296	+ if (ret) {
	297	+ dev_err(dev, "Failed to start alarm: %d\n", ret);
	298	+ return ret;
	299	+ }
	300	+ }
	301	+
	302	+ return 0;
	303	+}
	304	+
	305	+static int rk630_rtc_alarm_irq_enable(struct device *dev,
	306	+ unsigned int enabled)
	307	+{
	308	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(dev);
	309	+
	310	+ if (enabled)
	311	+ return rk630_rtc_start_alarm(rk630_rtc);
	312	+
	313	+ return rk630_rtc_stop_alarm(rk630_rtc);
	314	+}
	315	+
	316	+/*
	317	+ * We will just handle setting the frequency and make use the framework for
	318	+ * reading the periodic interrupts.
	319	+ *
	320	+ */
	321	+static irqreturn_t rk630_alarm_irq(int irq, void *data)
	322	+{
	323	+ struct rk630_rtc *rk630_rtc = data;
	324	+ struct rk630 *rk630 = rk630_rtc->rk630;
	325	+ int ret, status;
	326	+
	327	+ ret = regmap_read(rk630->rtc, RTC_STATUS0, &status);
	328	+ if (ret) {
	329	+ pr_err("Failed to read RTC INT REG: %d\n", ret);
	330	+ return ret;
	331	+ }
	332	+
	333	+ ret = regmap_write(rk630->rtc, RTC_STATUS0, status);
	334	+ if (ret) {
	335	+ pr_err("%s:Failed to update RTC status: %d\n", __func__, ret);
	336	+ return ret;
	337	+ }
	338	+ ret = regmap_write(rk630->rtc, RTC_STATUS0, 0x0);
	339	+ if (ret) {
	340	+ pr_err("%s:Failed to update RTC status: %d\n", __func__, ret);
	341	+ return ret;
	342	+ }
	343	+ if (status & ALARM_INT_STATUS) {
	344	+ pr_info("Alarm by: %s\n", __func__);
	345	+ rtc_update_irq(rk630_rtc->rtc, 1, RTC_IRQF \| RTC_AF);
	346	+ }
	347	+
	348	+ return IRQ_HANDLED;
	349	+}
	350	+
	351	+static const struct rtc_class_ops rk630_rtc_ops = {
	352	+ .read_time = rk630_rtc_readtime,
	353	+ .set_time = rk630_rtc_set_time,
	354	+ .read_alarm = rk630_rtc_readalarm,
	355	+ .set_alarm = rk630_rtc_setalarm,
	356	+ .alarm_irq_enable = rk630_rtc_alarm_irq_enable,
	357	+};
	358	+
	359	+/*
	360	+ * Due to the analog generator 32k clock affected by
	361	+ * temperature, voltage, clock precision need test
	362	+ * with the environment change. In rtc test,
	363	+ * use 24M clock as reference clock to measure the 32k clock.
	364	+ * Before start test 32k clock, we should enable clk32k test(0x80),
	365	+ * and configure test length, when rtc test done(0x84[2]),
	366	+ * latch the 24M clock domain counter,
	367	+ * and read out the counter from rtc_test
	368	+ * registers(0x8c~0x98) via apb bus.
	369	+ * In RTC digital design, we set three level compensation,
	370	+ * the compensation value due to the
	371	+ * RTC 32k clock test result, and if we need compensation,
	372	+ * we need configure the compensation enable bit.
	373	+ * Comp every hour, compensation at last minute every hour,
	374	+ * and support add time and sub time by the MSB bit.
	375	+ * Comp every day, compensation at last minute in last hour every day,
	376	+ * and support add time and sub time by the MSB bit.
	377	+ * Comp every month, compensation at last minute
	378	+ * in last hour in last day every month,
	379	+ * and support add time and sub time by the MSB bit.
	380	+ */
	381	+static int rk630_rtc_compensation(struct device *dev)
	382	+{
	383	+ struct platform_device *pdev = to_platform_device(dev);
	384	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(&pdev->dev);
	385	+ struct rk630 *rk630 = rk630_rtc->rk630;
	386	+ u64 camp;
	387	+ u32 count[4], counts, g_ref, tcamp;
	388	+ int ret, done = 0, trim_dir, c_hour,
	389	+ c_day, c_det_day, c_mon, c_det_mon;
	390	+
	391	+ ret = regmap_write(rk630->rtc, RTC_CLK32K_TEST, CLK32K_TEST_EN);
	392	+ if (ret) {
	393	+ dev_err(dev,
	394	+ "%s:Failed to update RTC CLK32K TEST: %d\n",
	395	+ __func__, ret);
	396	+ return ret;
	397	+ }
	398	+ ret = regmap_write(rk630->rtc, RTC_TEST_LEN, CLK32K_TEST_LEN);
	399	+ if (ret) {
	400	+ dev_err(dev,
	401	+ "%s:Failed to update RTC CLK32K TEST LEN: %d\n",
	402	+ __func__, ret);
	403	+ return ret;
	404	+ }
	405	+
	406	+ ret = regmap_write(rk630->rtc, RTC_TEST_ST, CLK32K_TEST_START);
	407	+ if (ret) {
	408	+ dev_err(dev,
	409	+ "%s:Failed to update RTC CLK32K TEST STATUS : %d\n",
	410	+ __func__, ret);
	411	+ return ret;
	412	+ }
	413	+
	414	+ while (!done) {
	415	+ ret = regmap_read(rk630->rtc, RTC_TEST_ST, &done);
	416	+ if (ret) {
	417	+ dev_err(dev,
	418	+ "Failed to read RTC CLK32K TEST STATUS: %d\n",
	419	+ ret);
	420	+ return ret;
	421	+ }
	422	+ done = (done & CLK32K_TEST_DONE) >> 2;
	423	+ udelay(1);
	424	+ }
	425	+
	426	+ ret = regmap_bulk_read(rk630->rtc, RTC_CNT_0, count, 4);
	427	+ if (ret) {
	428	+ dev_err(dev, "Failed to read RTC count REG: %d\n", ret);
	429	+ return ret;
	430	+ }
	431	+
	432	+ counts = count[0] \| (count[1] << 8) \|
	433	+ (count[2] << 16) \| (count[3] << 24);
	434	+ g_ref = CLK32K_TEST_REF_CLK * (CLK32K_TEST_LEN + 1);
	435	+
	436	+ if (counts > g_ref) {
	437	+ trim_dir = 0;
	438	+ camp = 36ULL * (32768 * (counts - g_ref));
	439	+ do_div(camp, (g_ref / 100));
	440	+ } else {
	441	+ trim_dir = CLK32K_COMP_DIR_ADD;
	442	+ camp = 36ULL * (32768 * (g_ref - counts));
	443	+ do_div(camp, (g_ref / 100));
	444	+ }
	445	+ tcamp = (u32)camp;
	446	+ c_hour = DIV_ROUND_CLOSEST(tcamp, 32768);
	447	+ c_day = DIV_ROUND_CLOSEST(24 * tcamp, 32768);
	448	+ c_mon = DIV_ROUND_CLOSEST(30 * 24 * tcamp, 32768);
	449	+
	450	+ if (c_hour > 1)
	451	+ regmap_write(rk630->rtc, RTC_COMP_H, bin2bcd((c_hour - 1)) \| trim_dir);
	452	+ else
	453	+ regmap_write(rk630->rtc, RTC_COMP_H, CLK32K_NO_COMP);
	454	+
	455	+ if (c_day > c_hour * 23) {
	456	+ c_det_day = c_day - c_hour * 23;
	457	+ trim_dir = CLK32K_COMP_DIR_ADD;
	458	+ } else {
	459	+ c_det_day = c_hour * 24 - c_day;
	460	+ trim_dir = 0;
	461	+ }
	462	+
	463	+ if (c_det_day > 1)
	464	+ regmap_write(rk630->rtc, RTC_COMP_D,
	465	+ bin2bcd((c_det_day - 1)) \| trim_dir);
	466	+ else
	467	+ regmap_write(rk630->rtc, RTC_COMP_D, CLK32K_NO_COMP);
	468	+
	469	+ if (c_mon > (29 * c_day + 23 * c_hour)) {
	470	+ c_det_mon = c_mon - 29 * c_day - 23 * c_hour;
	471	+ trim_dir = CLK32K_COMP_DIR_ADD;
	472	+ } else {
	473	+ c_det_mon = 29 * c_day + 23 * c_hour - c_mon;
	474	+ trim_dir = 0;
	475	+ }
	476	+
	477	+ if (c_det_mon)
	478	+ regmap_write(rk630->rtc, RTC_COMP_M,
	479	+ bin2bcd((c_det_mon - 1)) \| trim_dir);
	480	+ else
	481	+ regmap_write(rk630->rtc, RTC_COMP_M, CLK32K_NO_COMP);
	482	+
	483	+ ret = regmap_read(rk630->rtc, RTC_CTRL, &done);
	484	+ if (ret) {
	485	+ dev_err(dev, "Failed to read RTC_CTRL: %d\n",
	486	+ ret);
	487	+ return ret;
	488	+ }
	489	+
	490	+ ret = regmap_update_bits(rk630->rtc, RTC_CTRL,
	491	+ CLK32K_COMP_EN,
	492	+ CLK32K_COMP_EN);
	493	+ if (ret) {
	494	+ dev_err(dev,
	495	+ "%s:Failed to update RTC CTRL : %d\n", __func__, ret);
	496	+ return ret;
	497	+ }
	498	+ return 0;
	499	+}
	500	+
	501	+/* Enable the alarm if it should be enabled (in case it was disabled to
	502	+ * prevent use as a wake source).
	503	+ */
	504	+#ifdef CONFIG_PM_SLEEP
	505	+/* Turn off the alarm if it should not be a wake source. */
	506	+static int rk630_rtc_suspend(struct device *dev)
	507	+{
	508	+ struct platform_device *pdev = to_platform_device(dev);
	509	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(&pdev->dev);
	510	+
	511	+ if (device_may_wakeup(dev))
	512	+ enable_irq_wake(rk630_rtc->irq);
	513	+
	514	+ regmap_write(rk630_rtc->rk630->grf,
	515	+ PLUMAGE_GRF_SOC_CON0,
	516	+ RTC_CLAMP_EN(0));
	517	+
	518	+ return 0;
	519	+}
	520	+
	521	+/* Enable the alarm if it should be enabled (in case it was disabled to
	522	+ * prevent use as a wake source).
	523	+ */
	524	+static int rk630_rtc_resume(struct device *dev)
	525	+{
	526	+ struct platform_device *pdev = to_platform_device(dev);
	527	+ struct rk630_rtc *rk630_rtc = dev_get_drvdata(&pdev->dev);
	528	+
	529	+ if (device_may_wakeup(dev))
	530	+ disable_irq_wake(rk630_rtc->irq);
	531	+
	532	+ regmap_write(rk630_rtc->rk630->grf,
	533	+ PLUMAGE_GRF_SOC_CON0,
	534	+ RTC_CLAMP_EN(1));
	535	+
	536	+ return 0;
	537	+}
	538	+#endif
	539	+
	540	+static SIMPLE_DEV_PM_OPS(rk630_rtc_pm_ops, rk630_rtc_suspend, rk630_rtc_resume);
	541	+
	542	+static int rk630_rtc_probe(struct platform_device *pdev)
	543	+{
	544	+ struct rk630 *rk630 = dev_get_drvdata(pdev->dev.parent);
	545	+ struct rk630_rtc *rk630_rtc;
	546	+ int ret;
	547	+ struct rtc_time tm_read, tm = {
	548	+ .tm_wday = 0,
	549	+ .tm_year = 121,
	550	+ .tm_mon = 0,
	551	+ .tm_mday = 1,
	552	+ .tm_hour = 12,
	553	+ .tm_min = 0,
	554	+ .tm_sec = 0,
	555	+ };
	556	+
	557	+ rk630_rtc = devm_kzalloc(&pdev->dev, sizeof(*rk630_rtc), GFP_KERNEL);
	558	+ if (!rk630_rtc)
	559	+ return -ENOMEM;
	560	+
	561	+ platform_set_drvdata(pdev, rk630_rtc);
	562	+ rk630_rtc->rk630 = rk630;
	563	+
	564	+ regmap_write(rk630->grf, PLUMAGE_GRF_SOC_CON0, RTC_CLAMP_EN(1));
	565	+ /* setting d2a_lp_xo_start_mir */
	566	+ regmap_write(rk630->rtc, RTC_XO_TRIM0, RTC_XO_START_MIR);
	567	+ regmap_write(rk630->rtc, RTC_ANALOG_TEST, RTC_VREF_INIT);
	568	+
	569	+ rk630_rtc_compensation(&pdev->dev);
	570	+
	571	+ /* start rtc running by default, and use shadowed timer. */
	572	+ ret = regmap_update_bits(rk630->rtc, RTC_CTRL,
	573	+ RTC_CTRL_REG_RTC_READSEL_M \|
	574	+ RTC_CTRL_REG_START_RTC,
	575	+ RTC_CTRL_REG_RTC_READSEL_M \|
	576	+ RTC_CTRL_REG_START_RTC);
	577	+ if (ret) {
	578	+ dev_err(&pdev->dev,
	579	+ "Failed to write RTC control: %d\n", ret);
	580	+ return ret;
	581	+ }
	582	+
	583	+ ret = regmap_write(rk630->rtc, RTC_STATUS0,
	584	+ RTC_STATUS_MASK);
	585	+ if (ret) {
	586	+ dev_err(&pdev->dev,
	587	+ "Failed to write RTC status0: %d\n", ret);
	588	+ return ret;
	589	+ }
	590	+
	591	+ ret = regmap_write(rk630->rtc, RTC_STATUS0, 0);
	592	+ if (ret) {
	593	+ dev_err(&pdev->dev,
	594	+ "Failed to write RTC status0: %d\n", ret);
	595	+ return ret;
	596	+ }
	597	+
	598	+ device_init_wakeup(&pdev->dev, 1);
	599	+
	600	+ rk630_rtc_readtime(&pdev->dev, &tm_read);
	601	+ if (rtc_valid_tm(&tm_read) != 0)
	602	+ rk630_rtc_set_time(&pdev->dev, &tm);
	603	+
	604	+ rk630_rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
	605	+ if (IS_ERR(rk630_rtc->rtc))
	606	+ return PTR_ERR(rk630_rtc->rtc);
	607	+
	608	+ rk630_rtc->rtc->ops = &rk630_rtc_ops;
	609	+
	610	+ /* request alarm irq of rk630 */
	611	+ ret = devm_request_threaded_irq(&pdev->dev, rk630->irq, NULL,
	612	+ rk630_alarm_irq,
	613	+ IRQF_TRIGGER_LOW \| IRQF_ONESHOT \|
	614	+ IRQF_SHARED,
	615	+ "RTC alarm", rk630_rtc);
	616	+ if (ret) {
	617	+ dev_err(&pdev->dev, "Failed to request alarm IRQ %d: %d\n",
	618	+ rk630_rtc->irq, ret);
	619	+ return ret;
	620	+ }
	621	+
	622	+ return rtc_register_device(rk630_rtc->rtc);
	623	+}
	624	+
	625	+static struct platform_driver rk630_rtc_driver = {
	626	+ .probe = rk630_rtc_probe,
	627	+ .driver = {
	628	+ .name = "rk630-rtc",
	629	+ .pm = &rk630_rtc_pm_ops,
	630	+ },
	631	+};
	632	+
	633	+module_platform_driver(rk630_rtc_driver);
	634	+
	635	+MODULE_DESCRIPTION("RTC driver for the rk630");
	636	+MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
	637	+MODULE_LICENSE("GPL");