forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771
kernel/drivers/regulator/mc13892-regulator.c
....@@ -242,61 +242,61 @@
242242 5000000,
243243 };
244244
245
-static struct regulator_ops mc13892_gpo_regulator_ops;
246
-static struct regulator_ops mc13892_sw_regulator_ops;
245
+static const struct regulator_ops mc13892_gpo_regulator_ops;
246
+static const struct regulator_ops mc13892_sw_regulator_ops;
247247
248248
249
-#define MC13892_FIXED_DEFINE(name, reg, voltages) \
250
- MC13xxx_FIXED_DEFINE(MC13892_, name, reg, voltages, \
249
+#define MC13892_FIXED_DEFINE(name, node, reg, voltages) \
250
+ MC13xxx_FIXED_DEFINE(MC13892_, name, node, reg, voltages, \
251251 mc13xxx_fixed_regulator_ops)
252252
253
-#define MC13892_GPO_DEFINE(name, reg, voltages) \
254
- MC13xxx_GPO_DEFINE(MC13892_, name, reg, voltages, \
253
+#define MC13892_GPO_DEFINE(name, node, reg, voltages) \
254
+ MC13xxx_GPO_DEFINE(MC13892_, name, node, reg, voltages, \
255255 mc13892_gpo_regulator_ops)
256256
257
-#define MC13892_SW_DEFINE(name, reg, vsel_reg, voltages) \
258
- MC13xxx_DEFINE(MC13892_, name, reg, vsel_reg, voltages, \
257
+#define MC13892_SW_DEFINE(name, node, reg, vsel_reg, voltages) \
258
+ MC13xxx_DEFINE(MC13892_, name, node, reg, vsel_reg, voltages, \
259259 mc13892_sw_regulator_ops)
260260
261
-#define MC13892_DEFINE_REGU(name, reg, vsel_reg, voltages) \
262
- MC13xxx_DEFINE(MC13892_, name, reg, vsel_reg, voltages, \
261
+#define MC13892_DEFINE_REGU(name, node, reg, vsel_reg, voltages) \
262
+ MC13xxx_DEFINE(MC13892_, name, node, reg, vsel_reg, voltages, \
263263 mc13xxx_regulator_ops)
264264
265265 static struct mc13xxx_regulator mc13892_regulators[] = {
266
- MC13892_DEFINE_REGU(VCOINCELL, POWERCTL0, POWERCTL0, mc13892_vcoincell),
267
- MC13892_SW_DEFINE(SW1, SWITCHERS0, SWITCHERS0, mc13892_sw1),
268
- MC13892_SW_DEFINE(SW2, SWITCHERS1, SWITCHERS1, mc13892_sw),
269
- MC13892_SW_DEFINE(SW3, SWITCHERS2, SWITCHERS2, mc13892_sw),
270
- MC13892_SW_DEFINE(SW4, SWITCHERS3, SWITCHERS3, mc13892_sw),
271
- MC13892_FIXED_DEFINE(SWBST, SWITCHERS5, mc13892_swbst),
272
- MC13892_FIXED_DEFINE(VIOHI, REGULATORMODE0, mc13892_viohi),
273
- MC13892_DEFINE_REGU(VPLL, REGULATORMODE0, REGULATORSETTING0,
266
+ MC13892_DEFINE_REGU(VCOINCELL, vcoincell, POWERCTL0, POWERCTL0, mc13892_vcoincell),
267
+ MC13892_SW_DEFINE(SW1, sw1, SWITCHERS0, SWITCHERS0, mc13892_sw1),
268
+ MC13892_SW_DEFINE(SW2, sw2, SWITCHERS1, SWITCHERS1, mc13892_sw),
269
+ MC13892_SW_DEFINE(SW3, sw3, SWITCHERS2, SWITCHERS2, mc13892_sw),
270
+ MC13892_SW_DEFINE(SW4, sw4, SWITCHERS3, SWITCHERS3, mc13892_sw),
271
+ MC13892_FIXED_DEFINE(SWBST, swbst, SWITCHERS5, mc13892_swbst),
272
+ MC13892_FIXED_DEFINE(VIOHI, viohi, REGULATORMODE0, mc13892_viohi),
273
+ MC13892_DEFINE_REGU(VPLL, vpll, REGULATORMODE0, REGULATORSETTING0,
274274 mc13892_vpll),
275
- MC13892_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0,
275
+ MC13892_DEFINE_REGU(VDIG, vdig, REGULATORMODE0, REGULATORSETTING0,
276276 mc13892_vdig),
277
- MC13892_DEFINE_REGU(VSD, REGULATORMODE1, REGULATORSETTING1,
277
+ MC13892_DEFINE_REGU(VSD, vsd, REGULATORMODE1, REGULATORSETTING1,
278278 mc13892_vsd),
279
- MC13892_DEFINE_REGU(VUSB2, REGULATORMODE0, REGULATORSETTING0,
279
+ MC13892_DEFINE_REGU(VUSB2, vusb2, REGULATORMODE0, REGULATORSETTING0,
280280 mc13892_vusb2),
281
- MC13892_DEFINE_REGU(VVIDEO, REGULATORMODE1, REGULATORSETTING1,
281
+ MC13892_DEFINE_REGU(VVIDEO, vvideo, REGULATORMODE1, REGULATORSETTING1,
282282 mc13892_vvideo),
283
- MC13892_DEFINE_REGU(VAUDIO, REGULATORMODE1, REGULATORSETTING1,
283
+ MC13892_DEFINE_REGU(VAUDIO, vaudio, REGULATORMODE1, REGULATORSETTING1,
284284 mc13892_vaudio),
285
- MC13892_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0,
285
+ MC13892_DEFINE_REGU(VCAM, vcam, REGULATORMODE1, REGULATORSETTING0,
286286 mc13892_vcam),
287
- MC13892_DEFINE_REGU(VGEN1, REGULATORMODE0, REGULATORSETTING0,
287
+ MC13892_DEFINE_REGU(VGEN1, vgen1, REGULATORMODE0, REGULATORSETTING0,
288288 mc13892_vgen1),
289
- MC13892_DEFINE_REGU(VGEN2, REGULATORMODE0, REGULATORSETTING0,
289
+ MC13892_DEFINE_REGU(VGEN2, vgen2, REGULATORMODE0, REGULATORSETTING0,
290290 mc13892_vgen2),
291
- MC13892_DEFINE_REGU(VGEN3, REGULATORMODE1, REGULATORSETTING0,
291
+ MC13892_DEFINE_REGU(VGEN3, vgen3, REGULATORMODE1, REGULATORSETTING0,
292292 mc13892_vgen3),
293
- MC13892_FIXED_DEFINE(VUSB, USB1, mc13892_vusb),
294
- MC13892_GPO_DEFINE(GPO1, POWERMISC, mc13892_gpo),
295
- MC13892_GPO_DEFINE(GPO2, POWERMISC, mc13892_gpo),
296
- MC13892_GPO_DEFINE(GPO3, POWERMISC, mc13892_gpo),
297
- MC13892_GPO_DEFINE(GPO4, POWERMISC, mc13892_gpo),
298
- MC13892_GPO_DEFINE(PWGT1SPI, POWERMISC, mc13892_pwgtdrv),
299
- MC13892_GPO_DEFINE(PWGT2SPI, POWERMISC, mc13892_pwgtdrv),
293
+ MC13892_FIXED_DEFINE(VUSB, vusb, USB1, mc13892_vusb),
294
+ MC13892_GPO_DEFINE(GPO1, gpo1, POWERMISC, mc13892_gpo),
295
+ MC13892_GPO_DEFINE(GPO2, gpo2, POWERMISC, mc13892_gpo),
296
+ MC13892_GPO_DEFINE(GPO3, gpo3, POWERMISC, mc13892_gpo),
297
+ MC13892_GPO_DEFINE(GPO4, gpo4, POWERMISC, mc13892_gpo),
298
+ MC13892_GPO_DEFINE(PWGT1SPI, pwgt1spi, POWERMISC, mc13892_pwgtdrv),
299
+ MC13892_GPO_DEFINE(PWGT2SPI, pwgt2spi, POWERMISC, mc13892_pwgtdrv),
300300 };
301301
302302 static int mc13892_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask,
....@@ -387,7 +387,7 @@
387387 }
388388
389389
390
-static struct regulator_ops mc13892_gpo_regulator_ops = {
390
+static const struct regulator_ops mc13892_gpo_regulator_ops = {
391391 .enable = mc13892_gpo_regulator_enable,
392392 .disable = mc13892_gpo_regulator_disable,
393393 .is_enabled = mc13892_gpo_regulator_is_enabled,
....@@ -479,7 +479,7 @@
479479 return ret;
480480 }
481481
482
-static struct regulator_ops mc13892_sw_regulator_ops = {
482
+static const struct regulator_ops mc13892_sw_regulator_ops = {
483483 .list_voltage = regulator_list_voltage_table,
484484 .map_voltage = regulator_map_voltage_ascend,
485485 .set_voltage_sel = mc13892_sw_regulator_set_voltage_sel,