change system file

hc

2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771

 kernel/drivers/pinctrl/intel/pinctrl-geminilake.c
..
..
@@ -6,17 +6,18 @@
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  * Author: Mika Westerberg <mika.westerberg@linux.intel.com>
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  */
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-#include <linux/acpi.h>
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+#include <linux/mod_devicetable.h>
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 #include <linux/module.h>
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 #include <linux/platform_device.h>
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-#include <linux/pm.h>
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+
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 #include <linux/pinctrl/pinctrl.h>
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 #include "pinctrl-intel.h"
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 #define GLK_PAD_OWN	0x020
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-#define GLK_HOSTSW_OWN	0x0b0
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 #define GLK_PADCFGLOCK	0x080
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+#define GLK_HOSTSW_OWN	0x0b0
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+#define GLK_GPI_IS	0x100
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 #define GLK_GPI_IE	0x110
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 #define GLK_COMMUNITY(s, e)				\
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@@ -24,6 +25,7 @@
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 		.padown_offset = GLK_PAD_OWN,		\
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 		.padcfglock_offset = GLK_PADCFGLOCK,	\
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 		.hostown_offset = GLK_HOSTSW_OWN,	\
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+		.is_offset = GLK_GPI_IS,		\
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 		.ie_offset = GLK_GPI_IE,		\
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 		.gpp_size = 32,                         \
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 		.pin_base = (s),			\
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@@ -58,16 +60,16 @@
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 	PINCTRL_PIN(23, "GPIO_23"),
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 	PINCTRL_PIN(24, "GPIO_24"),
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 	PINCTRL_PIN(25, "GPIO_25"),
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-	PINCTRL_PIN(26, "GPIO_26"),
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-	PINCTRL_PIN(27, "GPIO_27"),
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-	PINCTRL_PIN(28, "GPIO_28"),
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-	PINCTRL_PIN(29, "GPIO_29"),
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-	PINCTRL_PIN(30, "GPIO_30"),
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-	PINCTRL_PIN(31, "GPIO_31"),
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-	PINCTRL_PIN(32, "GPIO_32"),
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-	PINCTRL_PIN(33, "GPIO_33"),
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-	PINCTRL_PIN(34, "GPIO_34"),
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-	PINCTRL_PIN(35, "GPIO_35"),
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+	PINCTRL_PIN(26, "ISH_GPIO_0"),
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+	PINCTRL_PIN(27, "ISH_GPIO_1"),
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+	PINCTRL_PIN(28, "ISH_GPIO_2"),
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+	PINCTRL_PIN(29, "ISH_GPIO_3"),
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+	PINCTRL_PIN(30, "ISH_GPIO_4"),
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+	PINCTRL_PIN(31, "ISH_GPIO_5"),
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+	PINCTRL_PIN(32, "ISH_GPIO_6"),
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+	PINCTRL_PIN(33, "ISH_GPIO_7"),
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+	PINCTRL_PIN(34, "ISH_GPIO_8"),
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+	PINCTRL_PIN(35, "ISH_GPIO_9"),
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 	PINCTRL_PIN(36, "GPIO_36"),
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 	PINCTRL_PIN(37, "GPIO_37"),
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 	PINCTRL_PIN(38, "GPIO_38"),
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@@ -195,12 +197,12 @@
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 	PINCTRL_PIN(5, "LPSS_SPI_0_FS1"),
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 	PINCTRL_PIN(6, "LPSS_SPI_0_RXD"),
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 	PINCTRL_PIN(7, "LPSS_SPI_0_TXD"),
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-	PINCTRL_PIN(8, "LPSS_SPI_1_CLK"),
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-	PINCTRL_PIN(9, "LPSS_SPI_1_FS0"),
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-	PINCTRL_PIN(10, "LPSS_SPI_1_FS1"),
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-	PINCTRL_PIN(11, "LPSS_SPI_1_FS2"),
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-	PINCTRL_PIN(12, "LPSS_SPI_1_RXD"),
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-	PINCTRL_PIN(13, "LPSS_SPI_1_TXD"),
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+	PINCTRL_PIN(8, "LPSS_SPI_2_CLK"),
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+	PINCTRL_PIN(9, "LPSS_SPI_2_FS0"),
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+	PINCTRL_PIN(10, "LPSS_SPI_2_FS1"),
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+	PINCTRL_PIN(11, "LPSS_SPI_2_FS2"),
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+	PINCTRL_PIN(12, "LPSS_SPI_2_RXD"),
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+	PINCTRL_PIN(13, "LPSS_SPI_2_TXD"),
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 	PINCTRL_PIN(14, "FST_SPI_CS0_B"),
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 	PINCTRL_PIN(15, "FST_SPI_CS1_B"),
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 	PINCTRL_PIN(16, "FST_SPI_MOSI_IO0"),
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@@ -215,8 +217,8 @@
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 	PINCTRL_PIN(25, "PMU_SLP_S3_B"),
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 	PINCTRL_PIN(26, "PMU_SLP_S4_B"),
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 	PINCTRL_PIN(27, "SUSPWRDNACK"),
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-	PINCTRL_PIN(28, "EMMC_PWR_EN_B"),
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-	PINCTRL_PIN(29, "PMU_AC_PRESENT"),
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+	PINCTRL_PIN(28, "EMMC_DNX_PWR_EN_B"),
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+	PINCTRL_PIN(29, "GPIO_105"),
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 	PINCTRL_PIN(30, "PMU_BATLOW_B"),
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 	PINCTRL_PIN(31, "PMU_RESETBUTTON_B"),
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 	PINCTRL_PIN(32, "PMU_SUSCLK"),
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@@ -445,46 +447,19 @@
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 	&glk_north_soc_data,
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 	&glk_audio_soc_data,
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 	&glk_scc_soc_data,
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-	NULL,
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+	NULL
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 };
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 static const struct acpi_device_id glk_pinctrl_acpi_match[] = {
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-	{ "INT3453" },
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+	{ "INT3453", (kernel_ulong_t)glk_pinctrl_soc_data },
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 	{ }
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 };
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 MODULE_DEVICE_TABLE(acpi, glk_pinctrl_acpi_match);
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-static int glk_pinctrl_probe(struct platform_device *pdev)
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-{
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-	const struct intel_pinctrl_soc_data *soc_data = NULL;
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-	struct acpi_device *adev;
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-	int i;
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-
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-	adev = ACPI_COMPANION(&pdev->dev);
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-	if (!adev)
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-		return -ENODEV;
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-
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-	for (i = 0; glk_pinctrl_soc_data[i]; i++) {
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-		if (!strcmp(adev->pnp.unique_id,
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-			    glk_pinctrl_soc_data[i]->uid)) {
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-			soc_data = glk_pinctrl_soc_data[i];
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-			break;
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-		}
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-	}
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-
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-	if (!soc_data)
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-		return -ENODEV;
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-
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-	return intel_pinctrl_probe(pdev, soc_data);
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-}
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-
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-static const struct dev_pm_ops glk_pinctrl_pm_ops = {
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-	SET_LATE_SYSTEM_SLEEP_PM_OPS(intel_pinctrl_suspend,
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-				     intel_pinctrl_resume)
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-};
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+static INTEL_PINCTRL_PM_OPS(glk_pinctrl_pm_ops);
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 static struct platform_driver glk_pinctrl_driver = {
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-	.probe = glk_pinctrl_probe,
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+	.probe = intel_pinctrl_probe_by_uid,
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 	.driver = {
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 		.name = "geminilake-pinctrl",
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 		.acpi_match_table = glk_pinctrl_acpi_match,