change system file

hc

2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771

 kernel/drivers/pinctrl/intel/pinctrl-cannonlake.c
..
..
@@ -7,10 +7,10 @@
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  *          Mika Westerberg <mika.westerberg@linux.intel.com>
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  */
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-#include <linux/acpi.h>
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+#include <linux/mod_devicetable.h>
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 #include <linux/module.h>
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 #include <linux/platform_device.h>
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-#include <linux/pm.h>
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+
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 #include <linux/pinctrl/pinctrl.h>
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 #include "pinctrl-intel.h"
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@@ -19,6 +19,7 @@
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 #define CNL_PADCFGLOCK		0x080
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 #define CNL_LP_HOSTSW_OWN	0x0b0
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 #define CNL_H_HOSTSW_OWN	0x0c0
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+#define CNL_GPI_IS		0x100
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 #define CNL_GPI_IE		0x120
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 #define CNL_GPP(r, s, e, g)				\
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@@ -29,14 +30,13 @@
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 		.gpio_base = (g),			\
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 	}
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-#define CNL_NO_GPIO	-1
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-
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-#define CNL_COMMUNITY(b, s, e, o, g)			\
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+#define CNL_COMMUNITY(b, s, e, ho, g)			\
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 	{						\
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 		.barno = (b),				\
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 		.padown_offset = CNL_PAD_OWN,		\
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 		.padcfglock_offset = CNL_PADCFGLOCK,	\
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-		.hostown_offset = (o),			\
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+		.hostown_offset = (ho),			\
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+		.is_offset = CNL_GPI_IS,		\
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 		.ie_offset = CNL_GPI_IE,		\
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 		.pin_base = (s),			\
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 		.npins = ((e) - (s) + 1),		\
..
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@@ -44,10 +44,10 @@
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 		.ngpps = ARRAY_SIZE(g),			\
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 	}
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-#define CNLLP_COMMUNITY(b, s, e, g)			\
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+#define CNL_LP_COMMUNITY(b, s, e, g)			\
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 	CNL_COMMUNITY(b, s, e, CNL_LP_HOSTSW_OWN, g)
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-#define CNLH_COMMUNITY(b, s, e, g)			\
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+#define CNL_H_COMMUNITY(b, s, e, g)			\
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 	CNL_COMMUNITY(b, s, e, CNL_H_HOSTSW_OWN, g)
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 /* Cannon Lake-H */
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@@ -375,27 +375,27 @@
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 };
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 static const struct intel_padgroup cnlh_community1_gpps[] = {
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-	CNL_GPP(0, 51, 74, 64),			/* GPP_C */
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-	CNL_GPP(1, 75, 98, 96),			/* GPP_D */
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-	CNL_GPP(2, 99, 106, 128),		/* GPP_G */
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-	CNL_GPP(3, 107, 114, CNL_NO_GPIO),	/* AZA */
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-	CNL_GPP(4, 115, 146, 160),		/* vGPIO_0 */
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-	CNL_GPP(5, 147, 154, CNL_NO_GPIO),	/* vGPIO_1 */
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+	CNL_GPP(0, 51, 74, 64),				/* GPP_C */
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+	CNL_GPP(1, 75, 98, 96),				/* GPP_D */
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+	CNL_GPP(2, 99, 106, 128),			/* GPP_G */
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+	CNL_GPP(3, 107, 114, INTEL_GPIO_BASE_NOMAP),	/* AZA */
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+	CNL_GPP(4, 115, 146, 160),			/* vGPIO_0 */
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+	CNL_GPP(5, 147, 154, INTEL_GPIO_BASE_NOMAP),	/* vGPIO_1 */
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 };
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 static const struct intel_padgroup cnlh_community3_gpps[] = {
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-	CNL_GPP(0, 155, 178, 192),		/* GPP_K */
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-	CNL_GPP(1, 179, 202, 224),		/* GPP_H */
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-	CNL_GPP(2, 203, 215, 256),		/* GPP_E */
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-	CNL_GPP(3, 216, 239, 288),		/* GPP_F */
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-	CNL_GPP(4, 240, 248, CNL_NO_GPIO),	/* SPI */
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+	CNL_GPP(0, 155, 178, 192),			/* GPP_K */
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+	CNL_GPP(1, 179, 202, 224),			/* GPP_H */
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+	CNL_GPP(2, 203, 215, 256),			/* GPP_E */
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+	CNL_GPP(3, 216, 239, 288),			/* GPP_F */
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+	CNL_GPP(4, 240, 248, INTEL_GPIO_BASE_NOMAP),	/* SPI */
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 };
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 static const struct intel_padgroup cnlh_community4_gpps[] = {
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-	CNL_GPP(0, 249, 259, CNL_NO_GPIO),	/* CPU */
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-	CNL_GPP(1, 260, 268, CNL_NO_GPIO),	/* JTAG */
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-	CNL_GPP(2, 269, 286, 320),		/* GPP_I */
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-	CNL_GPP(3, 287, 298, 352),		/* GPP_J */
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+	CNL_GPP(0, 249, 259, INTEL_GPIO_BASE_NOMAP),	/* CPU */
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+	CNL_GPP(1, 260, 268, INTEL_GPIO_BASE_NOMAP),	/* JTAG */
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+	CNL_GPP(2, 269, 286, 320),			/* GPP_I */
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+	CNL_GPP(3, 287, 298, 352),			/* GPP_J */
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 };
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 static const unsigned int cnlh_spi0_pins[] = { 40, 41, 42, 43 };
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@@ -449,10 +449,10 @@
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 };
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 static const struct intel_community cnlh_communities[] = {
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-	CNLH_COMMUNITY(0, 0, 50, cnlh_community0_gpps),
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-	CNLH_COMMUNITY(1, 51, 154, cnlh_community1_gpps),
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-	CNLH_COMMUNITY(2, 155, 248, cnlh_community3_gpps),
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-	CNLH_COMMUNITY(3, 249, 298, cnlh_community4_gpps),
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+	CNL_H_COMMUNITY(0, 0, 50, cnlh_community0_gpps),
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+	CNL_H_COMMUNITY(1, 51, 154, cnlh_community1_gpps),
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+	CNL_H_COMMUNITY(2, 155, 248, cnlh_community3_gpps),
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+	CNL_H_COMMUNITY(3, 249, 298, cnlh_community4_gpps),
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 };
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 static const struct intel_pinctrl_soc_data cnlh_soc_data = {
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@@ -788,31 +788,31 @@
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 };
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 static const struct intel_padgroup cnllp_community0_gpps[] = {
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-	CNL_GPP(0, 0, 24, 0),			/* GPP_A */
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-	CNL_GPP(1, 25, 50, 32),			/* GPP_B */
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-	CNL_GPP(2, 51, 58, 64),			/* GPP_G */
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-	CNL_GPP(3, 59, 67, CNL_NO_GPIO),	/* SPI */
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+	CNL_GPP(0, 0, 24, 0),				/* GPP_A */
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+	CNL_GPP(1, 25, 50, 32),				/* GPP_B */
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+	CNL_GPP(2, 51, 58, 64),				/* GPP_G */
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+	CNL_GPP(3, 59, 67, INTEL_GPIO_BASE_NOMAP),	/* SPI */
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 };
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 static const struct intel_padgroup cnllp_community1_gpps[] = {
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-	CNL_GPP(0, 68, 92, 96),			/* GPP_D */
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-	CNL_GPP(1, 93, 116, 128),		/* GPP_F */
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-	CNL_GPP(2, 117, 140, 160),		/* GPP_H */
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-	CNL_GPP(3, 141, 172, 192),		/* vGPIO */
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-	CNL_GPP(4, 173, 180, 224),		/* vGPIO */
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+	CNL_GPP(0, 68, 92, 96),				/* GPP_D */
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+	CNL_GPP(1, 93, 116, 128),			/* GPP_F */
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+	CNL_GPP(2, 117, 140, 160),			/* GPP_H */
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+	CNL_GPP(3, 141, 172, 192),			/* vGPIO */
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+	CNL_GPP(4, 173, 180, 224),			/* vGPIO */
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 };
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 static const struct intel_padgroup cnllp_community4_gpps[] = {
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-	CNL_GPP(0, 181, 204, 256),		/* GPP_C */
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-	CNL_GPP(1, 205, 228, 288),		/* GPP_E */
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-	CNL_GPP(2, 229, 237, CNL_NO_GPIO),	/* JTAG */
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-	CNL_GPP(3, 238, 243, CNL_NO_GPIO),	/* HVCMOS */
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+	CNL_GPP(0, 181, 204, 256),			/* GPP_C */
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+	CNL_GPP(1, 205, 228, 288),			/* GPP_E */
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+	CNL_GPP(2, 229, 237, INTEL_GPIO_BASE_NOMAP),	/* JTAG */
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+	CNL_GPP(3, 238, 243, INTEL_GPIO_BASE_NOMAP),	/* HVCMOS */
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 };
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 static const struct intel_community cnllp_communities[] = {
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-	CNLLP_COMMUNITY(0, 0, 67, cnllp_community0_gpps),
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-	CNLLP_COMMUNITY(1, 68, 180, cnllp_community1_gpps),
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-	CNLLP_COMMUNITY(2, 181, 243, cnllp_community4_gpps),
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+	CNL_LP_COMMUNITY(0, 0, 67, cnllp_community0_gpps),
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+	CNL_LP_COMMUNITY(1, 68, 180, cnllp_community1_gpps),
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+	CNL_LP_COMMUNITY(2, 181, 243, cnllp_community4_gpps),
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 };
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 static const struct intel_pinctrl_soc_data cnllp_soc_data = {
..
..
@@ -829,30 +829,14 @@
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 static const struct acpi_device_id cnl_pinctrl_acpi_match[] = {
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 	{ "INT3450", (kernel_ulong_t)&cnlh_soc_data },
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 	{ "INT34BB", (kernel_ulong_t)&cnllp_soc_data },
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-	{ },
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+	{ }
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 };
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 MODULE_DEVICE_TABLE(acpi, cnl_pinctrl_acpi_match);
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-static int cnl_pinctrl_probe(struct platform_device *pdev)
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-{
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-	const struct intel_pinctrl_soc_data *soc_data;
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-	const struct acpi_device_id *id;
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-
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-	id = acpi_match_device(cnl_pinctrl_acpi_match, &pdev->dev);
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-	if (!id || !id->driver_data)
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-		return -ENODEV;
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-
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-	soc_data = (const struct intel_pinctrl_soc_data *)id->driver_data;
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-	return intel_pinctrl_probe(pdev, soc_data);
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-}
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-
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-static const struct dev_pm_ops cnl_pinctrl_pm_ops = {
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-	SET_LATE_SYSTEM_SLEEP_PM_OPS(intel_pinctrl_suspend,
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-				     intel_pinctrl_resume)
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-};
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+static INTEL_PINCTRL_PM_OPS(cnl_pinctrl_pm_ops);
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 static struct platform_driver cnl_pinctrl_driver = {
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-	.probe = cnl_pinctrl_probe,
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+	.probe = intel_pinctrl_probe_by_hid,
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 	.driver = {
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 		.name = "cannonlake-pinctrl",
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 		.acpi_match_table = cnl_pinctrl_acpi_match,