| .. | .. |
|---|
| 1 | +// SPDX-License-Identifier: GPL-2.0+ |
|---|
| 1 | 2 | /* |
|---|
| 2 | 3 | * Software PHY emulation |
|---|
| 3 | 4 | * |
|---|
| 4 | | - * Code taken from fixed_phy.c by Russell King <rmk+kernel@arm.linux.org.uk> |
|---|
| 5 | + * Code taken from fixed_phy.c by Russell King. |
|---|
| 5 | 6 | * |
|---|
| 6 | 7 | * Author: Vitaly Bordug <vbordug@ru.mvista.com> |
|---|
| 7 | 8 | * Anton Vorontsov <avorontsov@ru.mvista.com> |
|---|
| 8 | 9 | * |
|---|
| 9 | 10 | * Copyright (c) 2006-2007 MontaVista Software, Inc. |
|---|
| 10 | | - * |
|---|
| 11 | | - * This program is free software; you can redistribute it and/or modify it |
|---|
| 12 | | - * under the terms of the GNU General Public License as published by the |
|---|
| 13 | | - * Free Software Foundation; either version 2 of the License, or (at your |
|---|
| 14 | | - * option) any later version. |
|---|
| 15 | 11 | */ |
|---|
| 16 | 12 | #include <linux/export.h> |
|---|
| 17 | 13 | #include <linux/mii.h> |
|---|
| .. | .. |
|---|
| 23 | 19 | #define MII_REGS_NUM 29 |
|---|
| 24 | 20 | |
|---|
| 25 | 21 | struct swmii_regs { |
|---|
| 26 | | - u16 bmcr; |
|---|
| 27 | 22 | u16 bmsr; |
|---|
| 28 | 23 | u16 lpa; |
|---|
| 29 | 24 | u16 lpagb; |
|---|
| 25 | + u16 estat; |
|---|
| 30 | 26 | }; |
|---|
| 31 | 27 | |
|---|
| 32 | 28 | enum { |
|---|
| .. | .. |
|---|
| 44 | 40 | */ |
|---|
| 45 | 41 | static const struct swmii_regs speed[] = { |
|---|
| 46 | 42 | [SWMII_SPEED_10] = { |
|---|
| 47 | | - .bmcr = BMCR_FULLDPLX, |
|---|
| 48 | 43 | .lpa = LPA_10FULL | LPA_10HALF, |
|---|
| 49 | 44 | }, |
|---|
| 50 | 45 | [SWMII_SPEED_100] = { |
|---|
| 51 | | - .bmcr = BMCR_FULLDPLX | BMCR_SPEED100, |
|---|
| 52 | 46 | .bmsr = BMSR_100FULL | BMSR_100HALF, |
|---|
| 53 | 47 | .lpa = LPA_100FULL | LPA_100HALF, |
|---|
| 54 | 48 | }, |
|---|
| 55 | 49 | [SWMII_SPEED_1000] = { |
|---|
| 56 | | - .bmcr = BMCR_FULLDPLX | BMCR_SPEED1000, |
|---|
| 57 | 50 | .bmsr = BMSR_ESTATEN, |
|---|
| 58 | 51 | .lpagb = LPA_1000FULL | LPA_1000HALF, |
|---|
| 52 | + .estat = ESTATUS_1000_TFULL | ESTATUS_1000_THALF, |
|---|
| 59 | 53 | }, |
|---|
| 60 | 54 | }; |
|---|
| 61 | 55 | |
|---|
| 62 | 56 | static const struct swmii_regs duplex[] = { |
|---|
| 63 | 57 | [SWMII_DUPLEX_HALF] = { |
|---|
| 64 | | - .bmcr = ~BMCR_FULLDPLX, |
|---|
| 65 | 58 | .bmsr = BMSR_ESTATEN | BMSR_100HALF, |
|---|
| 66 | 59 | .lpa = LPA_10HALF | LPA_100HALF, |
|---|
| 67 | 60 | .lpagb = LPA_1000HALF, |
|---|
| 61 | + .estat = ESTATUS_1000_THALF, |
|---|
| 68 | 62 | }, |
|---|
| 69 | 63 | [SWMII_DUPLEX_FULL] = { |
|---|
| 70 | | - .bmcr = ~0, |
|---|
| 71 | 64 | .bmsr = BMSR_ESTATEN | BMSR_100FULL, |
|---|
| 72 | 65 | .lpa = LPA_10FULL | LPA_100FULL, |
|---|
| 73 | 66 | .lpagb = LPA_1000FULL, |
|---|
| 67 | + .estat = ESTATUS_1000_TFULL, |
|---|
| 74 | 68 | }, |
|---|
| 75 | 69 | }; |
|---|
| 76 | 70 | |
|---|
| .. | .. |
|---|
| 122 | 116 | { |
|---|
| 123 | 117 | int speed_index, duplex_index; |
|---|
| 124 | 118 | u16 bmsr = BMSR_ANEGCAPABLE; |
|---|
| 125 | | - u16 bmcr = 0; |
|---|
| 119 | + u16 estat = 0; |
|---|
| 126 | 120 | u16 lpagb = 0; |
|---|
| 127 | 121 | u16 lpa = 0; |
|---|
| 128 | 122 | |
|---|
| .. | .. |
|---|
| 136 | 130 | duplex_index = state->duplex ? SWMII_DUPLEX_FULL : SWMII_DUPLEX_HALF; |
|---|
| 137 | 131 | |
|---|
| 138 | 132 | bmsr |= speed[speed_index].bmsr & duplex[duplex_index].bmsr; |
|---|
| 133 | + estat |= speed[speed_index].estat & duplex[duplex_index].estat; |
|---|
| 139 | 134 | |
|---|
| 140 | 135 | if (state->link) { |
|---|
| 141 | 136 | bmsr |= BMSR_LSTATUS | BMSR_ANEGCOMPLETE; |
|---|
| 142 | 137 | |
|---|
| 143 | | - bmcr |= speed[speed_index].bmcr & duplex[duplex_index].bmcr; |
|---|
| 144 | 138 | lpa |= speed[speed_index].lpa & duplex[duplex_index].lpa; |
|---|
| 145 | 139 | lpagb |= speed[speed_index].lpagb & duplex[duplex_index].lpagb; |
|---|
| 146 | 140 | |
|---|
| .. | .. |
|---|
| 153 | 147 | |
|---|
| 154 | 148 | switch (reg) { |
|---|
| 155 | 149 | case MII_BMCR: |
|---|
| 156 | | - return bmcr; |
|---|
| 150 | + return BMCR_ANENABLE; |
|---|
| 157 | 151 | case MII_BMSR: |
|---|
| 158 | 152 | return bmsr; |
|---|
| 159 | 153 | case MII_PHYSID1: |
|---|
| .. | .. |
|---|
| 163 | 157 | return lpa; |
|---|
| 164 | 158 | case MII_STAT1000: |
|---|
| 165 | 159 | return lpagb; |
|---|
| 160 | + case MII_ESTATUS: |
|---|
| 161 | + return estat; |
|---|
| 166 | 162 | |
|---|
| 167 | 163 | /* |
|---|
| 168 | 164 | * We do not support emulating Clause 45 over Clause 22 register |
|---|