| .. | .. |
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| 71 | 71 | writel(0, vic->base + AVIC_INT_SELECT); |
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| 72 | 72 | writel(0, vic->base + AVIC_INT_SELECT + 4); |
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| 73 | 73 | |
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| 74 | | - /* Some interrupts have a programable high/low level trigger |
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| 74 | + /* Some interrupts have a programmable high/low level trigger |
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| 75 | 75 | * (4 GPIO direct inputs), for now we assume this was configured |
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| 76 | 76 | * by firmware. We read which ones are edge now. |
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| 77 | 77 | */ |
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| .. | .. |
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| 203 | 203 | } |
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| 204 | 204 | vic->base = regs; |
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| 205 | 205 | |
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| 206 | | - /* Initialize soures, all masked */ |
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| 206 | + /* Initialize sources, all masked */ |
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| 207 | 207 | vic_init_hw(vic); |
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| 208 | 208 | |
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| 209 | 209 | /* Ready to receive interrupts */ |
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