| .. | .. |
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| 1 | +# SPDX-License-Identifier: GPL-2.0-only |
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| 2 | +# The IOVA library may also be used by non-IOMMU_API users |
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| 3 | +config IOMMU_IOVA |
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| 4 | + tristate |
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| 5 | + |
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| 6 | +# The IOASID library may also be used by non-IOMMU_API users |
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| 7 | +config IOASID |
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| 8 | + tristate |
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| 9 | + |
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| 1 | 10 | # IOMMU_API always gets selected by whoever wants it. |
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| 2 | 11 | config IOMMU_API |
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| 3 | 12 | bool |
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| 13 | + |
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| 14 | +if IOMMU_IOVA |
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| 15 | + |
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| 16 | +config IOMMU_LIMIT_IOVA_ALIGNMENT |
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| 17 | + bool "Limit IOVA alignment" |
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| 18 | + help |
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| 19 | + When the IOVA framework applies IOVA alignment it aligns all |
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| 20 | + IOVAs to the smallest PAGE_SIZE order which is greater than or |
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| 21 | + equal to the requested IOVA size. This works fine for sizes up |
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| 22 | + to several MiB, but for larger sizes it results in address |
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| 23 | + space wastage and fragmentation. For example drivers with a 4 |
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| 24 | + GiB IOVA space might run out of IOVA space when allocating |
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| 25 | + buffers great than 64 MiB. |
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| 26 | + |
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| 27 | + Enable this option to impose a limit on the alignment of IOVAs. |
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| 28 | + |
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| 29 | + If unsure, say N. |
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| 30 | + |
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| 31 | +config IOMMU_IOVA_ALIGNMENT |
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| 32 | + int "Maximum PAGE_SIZE order of alignment for IOVAs" |
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| 33 | + depends on IOMMU_LIMIT_IOVA_ALIGNMENT |
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| 34 | + range 4 9 |
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| 35 | + default 9 |
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| 36 | + help |
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| 37 | + With this parameter you can specify the maximum PAGE_SIZE order for |
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| 38 | + IOVAs. Larger IOVAs will be aligned only to this specified order. |
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| 39 | + The order is expressed a power of two multiplied by the PAGE_SIZE. |
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| 40 | + |
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| 41 | + If unsure, leave the default value "9". |
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| 42 | +endif |
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| 4 | 43 | |
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| 5 | 44 | menuconfig IOMMU_SUPPORT |
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| 6 | 45 | bool "IOMMU Hardware Support" |
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| 7 | 46 | depends on MMU |
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| 8 | 47 | default y |
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| 9 | | - ---help--- |
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| 48 | + help |
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| 10 | 49 | Say Y here if you want to compile device drivers for IO Memory |
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| 11 | 50 | Management Units into the kernel. These devices usually allow to |
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| 12 | 51 | remap DMA requests and/or remap interrupts from other devices on the |
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| .. | .. |
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| 58 | 97 | |
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| 59 | 98 | If unsure, say N here. |
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| 60 | 99 | |
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| 61 | | -config IOMMU_IO_PGTABLE_FAST |
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| 62 | | - bool "Fast ARMv7/v8 Long Descriptor Format" |
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| 63 | | - depends on ARM64_DMA_USE_IOMMU && IOMMU_DMA |
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| 64 | | - help |
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| 65 | | - Enable support for a subset of the ARM long descriptor pagetable |
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| 66 | | - format. This allocator achieves fast performance by |
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| 67 | | - pre-allocating and pre-populating page table memory up front. |
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| 68 | | - only supports a 32 bit virtual address space. |
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| 69 | | - |
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| 70 | | - This implementation is mainly optimized for use cases where the |
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| 71 | | - buffers are small (<= 64K) since it only supports 4K page sizes. |
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| 72 | | - |
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| 73 | 100 | endmenu |
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| 74 | 101 | |
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| 75 | 102 | config IOMMU_DEBUGFS |
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| .. | .. |
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| 85 | 112 | config IOMMU_DEFAULT_PASSTHROUGH |
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| 86 | 113 | bool "IOMMU passthrough by default" |
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| 87 | 114 | depends on IOMMU_API |
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| 88 | | - help |
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| 115 | + help |
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| 89 | 116 | Enable passthrough by default, removing the need to pass in |
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| 90 | 117 | iommu.passthrough=on or iommu=pt through command line. If this |
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| 91 | 118 | is enabled, you can still disable with iommu.passthrough=off |
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| .. | .. |
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| 93 | 120 | |
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| 94 | 121 | If unsure, say N here. |
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| 95 | 122 | |
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| 96 | | -config IOMMU_IOVA |
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| 97 | | - tristate |
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| 98 | | - |
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| 99 | 123 | config OF_IOMMU |
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| 100 | | - def_bool y |
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| 101 | | - depends on OF && IOMMU_API |
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| 124 | + def_bool y |
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| 125 | + depends on OF && IOMMU_API |
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| 102 | 126 | |
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| 103 | 127 | # IOMMU-agnostic DMA-mapping layer |
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| 104 | 128 | config IOMMU_DMA |
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| 105 | 129 | bool |
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| 130 | + select DMA_OPS |
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| 106 | 131 | select IOMMU_API |
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| 107 | 132 | select IOMMU_IOVA |
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| 133 | + select IRQ_MSI_IOMMU |
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| 108 | 134 | select NEED_SG_DMA_LENGTH |
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| 109 | 135 | |
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| 110 | 136 | config FSL_PAMU |
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| .. | .. |
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| 133 | 159 | |
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| 134 | 160 | If unsure, say N here. |
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| 135 | 161 | |
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| 136 | | -config IOMMU_PGTABLES_L2 |
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| 137 | | - def_bool y |
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| 138 | | - depends on MSM_IOMMU && MMU && SMP && CPU_DCACHE_DISABLE=n |
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| 139 | | - |
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| 140 | | -# AMD IOMMU support |
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| 141 | | -config AMD_IOMMU |
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| 142 | | - bool "AMD IOMMU support" |
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| 143 | | - select SWIOTLB |
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| 144 | | - select PCI_MSI |
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| 145 | | - select PCI_ATS |
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| 146 | | - select PCI_PRI |
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| 147 | | - select PCI_PASID |
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| 148 | | - select IOMMU_API |
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| 149 | | - select IOMMU_IOVA |
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| 150 | | - depends on X86_64 && PCI && ACPI |
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| 151 | | - ---help--- |
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| 152 | | - With this option you can enable support for AMD IOMMU hardware in |
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| 153 | | - your system. An IOMMU is a hardware component which provides |
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| 154 | | - remapping of DMA memory accesses from devices. With an AMD IOMMU you |
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| 155 | | - can isolate the DMA memory of different devices and protect the |
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| 156 | | - system from misbehaving device drivers or hardware. |
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| 157 | | - |
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| 158 | | - You can find out if your system has an AMD IOMMU if you look into |
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| 159 | | - your BIOS for an option to enable it or if you have an IVRS ACPI |
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| 160 | | - table. |
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| 161 | | - |
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| 162 | | -config AMD_IOMMU_V2 |
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| 163 | | - tristate "AMD IOMMU Version 2 driver" |
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| 164 | | - depends on AMD_IOMMU |
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| 165 | | - select MMU_NOTIFIER |
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| 166 | | - ---help--- |
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| 167 | | - This option enables support for the AMD IOMMUv2 features of the IOMMU |
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| 168 | | - hardware. Select this option if you want to use devices that support |
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| 169 | | - the PCI PRI and PASID interface. |
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| 170 | | - |
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| 171 | | -config AMD_IOMMU_DEBUGFS |
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| 172 | | - bool "Enable AMD IOMMU internals in DebugFS" |
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| 173 | | - depends on AMD_IOMMU && IOMMU_DEBUGFS |
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| 174 | | - ---help--- |
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| 175 | | - !!!WARNING!!! !!!WARNING!!! !!!WARNING!!! !!!WARNING!!! |
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| 176 | | - |
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| 177 | | - DO NOT ENABLE THIS OPTION UNLESS YOU REALLY, -REALLY- KNOW WHAT YOU ARE DOING!!! |
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| 178 | | - Exposes AMD IOMMU device internals in DebugFS. |
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| 179 | | - |
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| 180 | | - This option is -NOT- intended for production environments, and should |
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| 181 | | - not generally be enabled. |
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| 182 | | - |
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| 183 | | -# Intel IOMMU support |
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| 184 | | -config DMAR_TABLE |
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| 185 | | - bool |
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| 186 | | - |
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| 187 | | -config INTEL_IOMMU |
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| 188 | | - bool "Support for Intel IOMMU using DMA Remapping Devices" |
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| 189 | | - depends on PCI_MSI && ACPI && (X86 || IA64_GENERIC) |
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| 190 | | - select IOMMU_API |
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| 191 | | - select IOMMU_IOVA |
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| 192 | | - select NEED_DMA_MAP_STATE |
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| 193 | | - select DMAR_TABLE |
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| 194 | | - help |
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| 195 | | - DMA remapping (DMAR) devices support enables independent address |
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| 196 | | - translations for Direct Memory Access (DMA) from devices. |
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| 197 | | - These DMA remapping devices are reported via ACPI tables |
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| 198 | | - and include PCI device scope covered by these DMA |
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| 199 | | - remapping devices. |
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| 200 | | - |
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| 201 | | -config INTEL_IOMMU_SVM |
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| 202 | | - bool "Support for Shared Virtual Memory with Intel IOMMU" |
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| 203 | | - depends on INTEL_IOMMU && X86 |
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| 204 | | - select PCI_PASID |
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| 205 | | - select MMU_NOTIFIER |
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| 206 | | - help |
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| 207 | | - Shared Virtual Memory (SVM) provides a facility for devices |
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| 208 | | - to access DMA resources through process address space by |
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| 209 | | - means of a Process Address Space ID (PASID). |
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| 210 | | - |
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| 211 | | -config INTEL_IOMMU_DEFAULT_ON |
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| 212 | | - def_bool y |
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| 213 | | - prompt "Enable Intel DMA Remapping Devices by default" |
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| 214 | | - depends on INTEL_IOMMU |
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| 215 | | - help |
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| 216 | | - Selecting this option will enable a DMAR device at boot time if |
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| 217 | | - one is found. If this option is not selected, DMAR support can |
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| 218 | | - be enabled by passing intel_iommu=on to the kernel. |
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| 219 | | - |
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| 220 | | -config INTEL_IOMMU_BROKEN_GFX_WA |
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| 221 | | - bool "Workaround broken graphics drivers (going away soon)" |
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| 222 | | - depends on INTEL_IOMMU && BROKEN && X86 |
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| 223 | | - ---help--- |
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| 224 | | - Current Graphics drivers tend to use physical address |
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| 225 | | - for DMA and avoid using DMA APIs. Setting this config |
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| 226 | | - option permits the IOMMU driver to set a unity map for |
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| 227 | | - all the OS-visible memory. Hence the driver can continue |
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| 228 | | - to use physical addresses for DMA, at least until this |
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| 229 | | - option is removed in the 2.6.32 kernel. |
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| 230 | | - |
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| 231 | | -config INTEL_IOMMU_FLOPPY_WA |
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| 232 | | - def_bool y |
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| 233 | | - depends on INTEL_IOMMU && X86 |
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| 234 | | - ---help--- |
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| 235 | | - Floppy disk drivers are known to bypass DMA API calls |
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| 236 | | - thereby failing to work when IOMMU is enabled. This |
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| 237 | | - workaround will setup a 1:1 mapping for the first |
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| 238 | | - 16MiB to make floppy (an ISA device) work. |
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| 162 | +source "drivers/iommu/amd/Kconfig" |
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| 163 | +source "drivers/iommu/intel/Kconfig" |
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| 239 | 164 | |
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| 240 | 165 | config IRQ_REMAP |
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| 241 | 166 | bool "Support for Interrupt Remapping" |
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| 242 | 167 | depends on X86_64 && X86_IO_APIC && PCI_MSI && ACPI |
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| 243 | 168 | select DMAR_TABLE |
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| 244 | | - ---help--- |
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| 169 | + help |
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| 245 | 170 | Supports Interrupt remapping for IO-APIC and MSI devices. |
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| 246 | 171 | To use x2apic mode in the CPU's which support x2APIC enhancements or |
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| 247 | 172 | to support platforms with CPU's having > 8 bit APIC ID, say Y. |
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| .. | .. |
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| 249 | 174 | # OMAP IOMMU support |
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| 250 | 175 | config OMAP_IOMMU |
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| 251 | 176 | bool "OMAP IOMMU Support" |
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| 252 | | - depends on ARM && MMU |
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| 253 | 177 | depends on ARCH_OMAP2PLUS || COMPILE_TEST |
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| 254 | 178 | select IOMMU_API |
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| 255 | | - ---help--- |
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| 179 | + help |
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| 256 | 180 | The OMAP3 media platform drivers depend on iommu support, |
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| 257 | 181 | if you need them say Y here. |
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| 258 | 182 | |
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| 259 | 183 | config OMAP_IOMMU_DEBUG |
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| 260 | 184 | bool "Export OMAP IOMMU internals in DebugFS" |
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| 261 | 185 | depends on OMAP_IOMMU && DEBUG_FS |
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| 262 | | - ---help--- |
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| 186 | + help |
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| 263 | 187 | Select this to see extensive information about |
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| 264 | 188 | the internal state of OMAP IOMMU in debugfs. |
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| 265 | 189 | |
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| .. | .. |
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| 270 | 194 | depends on ARM || ARM64 |
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| 271 | 195 | depends on ARCH_ROCKCHIP || COMPILE_TEST |
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| 272 | 196 | select IOMMU_API |
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| 273 | | - select ARM_DMA_USE_IOMMU if ARM |
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| 197 | + select ARM_DMA_USE_IOMMU |
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| 274 | 198 | help |
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| 275 | 199 | Support for IOMMUs found on Rockchip rk32xx SOCs. |
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| 276 | 200 | These IOMMUs allow virtualization of the address space used by most |
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| .. | .. |
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| 278 | 202 | Say Y here if you are using a Rockchip SoC that includes an IOMMU |
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| 279 | 203 | device. |
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| 280 | 204 | |
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| 205 | +config SUN50I_IOMMU |
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| 206 | + bool "Allwinner H6 IOMMU Support" |
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| 207 | + depends on HAS_DMA |
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| 208 | + depends on ARCH_SUNXI || COMPILE_TEST |
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| 209 | + select ARM_DMA_USE_IOMMU |
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| 210 | + select IOMMU_API |
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| 211 | + help |
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| 212 | + Support for the IOMMU introduced in the Allwinner H6 SoCs. |
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| 213 | + |
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| 281 | 214 | config TEGRA_IOMMU_GART |
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| 282 | 215 | bool "Tegra GART IOMMU Support" |
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| 283 | 216 | depends on ARCH_TEGRA_2x_SOC |
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| 217 | + depends on TEGRA_MC |
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| 284 | 218 | select IOMMU_API |
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| 285 | 219 | help |
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| 286 | 220 | Enables support for remapping discontiguous physical memory |
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| .. | .. |
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| 300 | 234 | |
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| 301 | 235 | config EXYNOS_IOMMU |
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| 302 | 236 | bool "Exynos IOMMU Support" |
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| 303 | | - depends on ARCH_EXYNOS && MMU |
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| 237 | + depends on ARCH_EXYNOS || COMPILE_TEST |
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| 304 | 238 | depends on !CPU_BIG_ENDIAN # revisit driver if we can enable big-endian ptes |
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| 305 | 239 | select IOMMU_API |
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| 306 | 240 | select ARM_DMA_USE_IOMMU |
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| .. | .. |
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| 323 | 257 | |
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| 324 | 258 | config IPMMU_VMSA |
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| 325 | 259 | bool "Renesas VMSA-compatible IPMMU" |
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| 326 | | - depends on ARM || IOMMU_DMA |
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| 327 | 260 | depends on ARCH_RENESAS || (COMPILE_TEST && !GENERIC_ATOMIC64) |
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| 328 | 261 | select IOMMU_API |
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| 329 | 262 | select IOMMU_IO_PGTABLE_LPAE |
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| 330 | 263 | select ARM_DMA_USE_IOMMU |
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| 331 | 264 | help |
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| 332 | 265 | Support for the Renesas VMSA-compatible IPMMU found in the R-Mobile |
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| 333 | | - APE6, R-Car Gen2, and R-Car Gen3 SoCs. |
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| 266 | + APE6, R-Car Gen{2,3} and RZ/G{1,2} SoCs. |
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| 334 | 267 | |
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| 335 | 268 | If unsure, say N. |
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| 336 | 269 | |
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| .. | .. |
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| 345 | 278 | # ARM IOMMU support |
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| 346 | 279 | config ARM_SMMU |
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| 347 | 280 | tristate "ARM Ltd. System MMU (SMMU) Support" |
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| 348 | | - depends on (ARM64 || ARM) && MMU |
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| 281 | + depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) |
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| 282 | + depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y |
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| 349 | 283 | select IOMMU_API |
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| 350 | 284 | select IOMMU_IO_PGTABLE_LPAE |
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| 351 | 285 | select ARM_DMA_USE_IOMMU if ARM |
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| 352 | | - select ARM64_DMA_USE_IOMMU if ARM64 |
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| 353 | 286 | help |
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| 354 | 287 | Support for implementations of the ARM System MMU architecture |
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| 355 | 288 | versions 1 and 2. |
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| .. | .. |
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| 357 | 290 | Say Y here if your SoC includes an IOMMU device implementing |
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| 358 | 291 | the ARM SMMU architecture. |
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| 359 | 292 | |
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| 293 | +config ARM_SMMU_LEGACY_DT_BINDINGS |
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| 294 | + bool "Support the legacy \"mmu-masters\" devicetree bindings" |
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| 295 | + depends on ARM_SMMU=y && OF |
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| 296 | + help |
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| 297 | + Support for the badly designed and deprecated "mmu-masters" |
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| 298 | + devicetree bindings. This allows some DMA masters to attach |
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| 299 | + to the SMMU but does not provide any support via the DMA API. |
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| 300 | + If you're lucky, you might be able to get VFIO up and running. |
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| 301 | + |
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| 302 | + If you say Y here then you'll make me very sad. Instead, say N |
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| 303 | + and move your firmware to the utopian future that was 2016. |
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| 304 | + |
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| 305 | +config ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT |
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| 306 | + bool "Default to disabling bypass on ARM SMMU v1 and v2" |
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| 307 | + depends on ARM_SMMU |
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| 308 | + default y |
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| 309 | + help |
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| 310 | + Say Y here to (by default) disable bypass streams such that |
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| 311 | + incoming transactions from devices that are not attached to |
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| 312 | + an iommu domain will report an abort back to the device and |
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| 313 | + will not be allowed to pass through the SMMU. |
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| 314 | + |
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| 315 | + Any old kernels that existed before this KConfig was |
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| 316 | + introduced would default to _allowing_ bypass (AKA the |
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| 317 | + equivalent of NO for this config). However the default for |
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| 318 | + this option is YES because the old behavior is insecure. |
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| 319 | + |
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| 320 | + There are few reasons to allow unmatched stream bypass, and |
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| 321 | + even fewer good ones. If saying YES here breaks your board |
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| 322 | + you should work on fixing your board. This KConfig option |
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| 323 | + is expected to be removed in the future and we'll simply |
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| 324 | + hardcode the bypass disable in the code. |
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| 325 | + |
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| 326 | + NOTE: the kernel command line parameter |
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| 327 | + 'arm-smmu.disable_bypass' will continue to override this |
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| 328 | + config. |
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| 329 | + |
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| 360 | 330 | config ARM_SMMU_V3 |
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| 361 | | - bool "ARM Ltd. System MMU Version 3 (SMMUv3) Support" |
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| 331 | + tristate "ARM Ltd. System MMU Version 3 (SMMUv3) Support" |
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| 362 | 332 | depends on ARM64 |
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| 363 | 333 | select IOMMU_API |
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| 364 | 334 | select IOMMU_IO_PGTABLE_LPAE |
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| .. | .. |
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| 370 | 340 | Say Y here if your system includes an IOMMU device implementing |
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| 371 | 341 | the ARM SMMUv3 architecture. |
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| 372 | 342 | |
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| 343 | +config ARM_SMMU_V3_SVA |
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| 344 | + bool "Shared Virtual Addressing support for the ARM SMMUv3" |
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| 345 | + depends on ARM_SMMU_V3 |
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| 346 | + help |
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| 347 | + Support for sharing process address spaces with devices using the |
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| 348 | + SMMUv3. |
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| 349 | + |
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| 350 | + Say Y here if your system supports SVA extensions such as PCIe PASID |
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| 351 | + and PRI. |
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| 352 | + |
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| 373 | 353 | config S390_IOMMU |
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| 374 | 354 | def_bool y if S390 && PCI |
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| 375 | 355 | depends on S390 && PCI |
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| .. | .. |
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| 379 | 359 | |
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| 380 | 360 | config S390_CCW_IOMMU |
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| 381 | 361 | bool "S390 CCW IOMMU Support" |
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| 382 | | - depends on S390 && CCW |
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| 362 | + depends on S390 && CCW || COMPILE_TEST |
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| 363 | + select IOMMU_API |
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| 364 | + help |
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| 365 | + Enables bits of IOMMU API required by VFIO. The iommu_ops |
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| 366 | + is not implemented as it is not necessary for VFIO. |
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| 367 | + |
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| 368 | +config S390_AP_IOMMU |
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| 369 | + bool "S390 AP IOMMU Support" |
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| 370 | + depends on S390 && ZCRYPT || COMPILE_TEST |
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| 383 | 371 | select IOMMU_API |
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| 384 | 372 | help |
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| 385 | 373 | Enables bits of IOMMU API required by VFIO. The iommu_ops |
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| .. | .. |
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| 387 | 375 | |
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| 388 | 376 | config MTK_IOMMU |
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| 389 | 377 | bool "MTK IOMMU Support" |
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| 390 | | - depends on ARM || ARM64 |
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| 391 | 378 | depends on ARCH_MEDIATEK || COMPILE_TEST |
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| 392 | 379 | select ARM_DMA_USE_IOMMU |
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| 393 | 380 | select IOMMU_API |
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| 394 | | - select IOMMU_DMA |
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| 395 | 381 | select IOMMU_IO_PGTABLE_ARMV7S |
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| 396 | 382 | select MEMORY |
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| 397 | 383 | select MTK_SMI |
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| .. | .. |
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| 421 | 407 | # Note: iommu drivers cannot (yet?) be built as modules |
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| 422 | 408 | bool "Qualcomm IOMMU Support" |
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| 423 | 409 | depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) |
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| 410 | + depends on QCOM_SCM=y |
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| 424 | 411 | select IOMMU_API |
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| 425 | 412 | select IOMMU_IO_PGTABLE_LPAE |
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| 426 | 413 | select ARM_DMA_USE_IOMMU |
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| 427 | 414 | help |
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| 428 | 415 | Support for IOMMU on certain Qualcomm SoCs. |
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| 429 | 416 | |
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| 417 | +config HYPERV_IOMMU |
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| 418 | + bool "Hyper-V x2APIC IRQ Handling" |
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| 419 | + depends on HYPERV && X86 |
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| 420 | + select IOMMU_API |
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| 421 | + default HYPERV |
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| 422 | + help |
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| 423 | + Stub IOMMU driver to handle IRQs as to allow Hyper-V Linux |
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| 424 | + guests to run with x2APIC mode enabled. |
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| 425 | + |
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| 426 | +config VIRTIO_IOMMU |
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| 427 | + tristate "Virtio IOMMU driver" |
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| 428 | + depends on VIRTIO |
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| 429 | + depends on ARM64 |
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| 430 | + select IOMMU_API |
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| 431 | + select INTERVAL_TREE |
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| 432 | + help |
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| 433 | + Para-virtualised IOMMU driver with virtio. |
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| 434 | + |
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| 435 | + Say Y here if you intend to run this kernel as a guest. |
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| 436 | + |
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| 430 | 437 | endif # IOMMU_SUPPORT |
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