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2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771 
 kernel/drivers/iio/adc/at91-sama5d2_adc.c
....@@ -1,21 +1,14 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23  * Atmel ADC driver for SAMA5D2 devices and compatible.
34  *
45  * Copyright (C) 2015 Atmel,
56  *               2015 Ludovic Desroches <ludovic.desroches@atmel.com>
6
- *
7
- * This software is licensed under the terms of the GNU General Public
8
- * License version 2, as published by the Free Software Foundation, and
9
- * may be copied, distributed, and modified under those terms.
10
- *
11
- * This program is distributed in the hope that it will be useful,
12
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
13
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14
- * GNU General Public License for more details.
157  */
168 
179 #include <linux/bitops.h>
1810 #include <linux/clk.h>
11
+#include <linux/delay.h>
1912 #include <linux/dma-mapping.h>
2013 #include <linux/dmaengine.h>
2114 #include <linux/interrupt.h>
....@@ -81,7 +74,7 @@
8174 #define	AT91_SAMA5D2_MR_ANACH		BIT(23)
8275 /* Tracking Time */
8376 #define	AT91_SAMA5D2_MR_TRACKTIM(v)	((v) << 24)
84
-#define	AT91_SAMA5D2_MR_TRACKTIM_MAX	0xff
77
+#define	AT91_SAMA5D2_MR_TRACKTIM_MAX	0xf
8578 /* Transfer Time */
8679 #define	AT91_SAMA5D2_MR_TRANSFER(v)	((v) << 28)
8780 #define	AT91_SAMA5D2_MR_TRANSFER_MAX	0x3
....@@ -108,6 +101,8 @@
108101 #define AT91_SAMA5D2_IER_YRDY   BIT(21)
109102 /* Interrupt Enable Register - TS pressure measurement ready */
110103 #define AT91_SAMA5D2_IER_PRDY   BIT(22)
104
+/* Interrupt Enable Register - Data ready */
105
+#define AT91_SAMA5D2_IER_DRDY   BIT(24)
111106 /* Interrupt Enable Register - general overrun error */
112107 #define AT91_SAMA5D2_IER_GOVRE BIT(25)
113108 /* Interrupt Enable Register - Pen detect */
....@@ -352,7 +347,7 @@
352347 };
353348 
354349 /**
355
- * at91_adc_dma - at91-sama5d2 dma information struct
350
+ * struct at91_adc_dma - at91-sama5d2 dma information struct
356351  * @dma_chan:		the dma channel acquired
357352  * @rx_buf:		dma coherent allocated area
358353  * @rx_dma_buf:		dma handler for the buffer
....@@ -374,7 +369,7 @@
374369 };
375370 
376371 /**
377
- * at91_adc_touch - at91-sama5d2 touchscreen information struct
372
+ * struct at91_adc_touch - at91-sama5d2 touchscreen information struct
378373  * @sample_period_val:		the value for periodic trigger interval
379374  * @touching:			is the pen touching the screen or not
380375  * @x_pos:			temporary placeholder for pressure computation
....@@ -407,7 +402,9 @@
407402 	wait_queue_head_t		wq_data_available;
408403 	struct at91_adc_dma		dma_st;
409404 	struct at91_adc_touch		touch_st;
410
-	u16				buffer[AT91_BUFFER_MAX_HWORDS];
405
+	struct iio_dev			*indio_dev;
406
+	/* Ensure naturally aligned timestamp */
407
+	u16				buffer[AT91_BUFFER_MAX_HWORDS] __aligned(8);
411408 	/*
412409 	 * lock to prevent concurrent 'single conversion' requests through
413410 	 * sysfs.
....@@ -492,6 +489,21 @@
492489 				    const struct of_phandle_args *iiospec)
493490 {
494491 	return at91_adc_chan_xlate(indio_dev, iiospec->args[0]);
492
+}
493
+
494
+static unsigned int at91_adc_active_scan_mask_to_reg(struct iio_dev *indio_dev)
495
+{
496
+	u32 mask = 0;
497
+	u8 bit;
498
+
499
+	for_each_set_bit(bit, indio_dev->active_scan_mask,
500
+			 indio_dev->num_channels) {
501
+		struct iio_chan_spec const *chan =
502
+			 at91_adc_chan_get(indio_dev, bit);
503
+		mask |= BIT(chan->channel);
504
+	}
505
+
506
+	return mask & GENMASK(11, 0);
495507 }
496508 
497509 static void at91_adc_config_emr(struct at91_adc_state *st)
....@@ -632,13 +644,13 @@
632644 	/* first half of register is the x or y, second half is the scale */
633645 	val = at91_adc_readl(st, reg);
634646 	if (!val)
635
-		dev_dbg(&iio_priv_to_dev(st)->dev, "pos is 0\n");
647
+		dev_dbg(&st->indio_dev->dev, "pos is 0\n");
636648 
637649 	pos = val & AT91_SAMA5D2_XYZ_MASK;
638650 	result = (pos << AT91_SAMA5D2_MAX_POS_BITS) - pos;
639651 	scale = (val >> 16) & AT91_SAMA5D2_XYZ_MASK;
640652 	if (scale == 0) {
641
-		dev_err(&iio_priv_to_dev(st)->dev, "scale is 0\n");
653
+		dev_err(&st->indio_dev->dev, "scale is 0\n");
642654 		return 0;
643655 	}
644656 	result /= scale;
....@@ -718,7 +730,6 @@
718730 	struct iio_dev *indio = iio_trigger_get_drvdata(trig);
719731 	struct at91_adc_state *st = iio_priv(indio);
720732 	u32 status = at91_adc_readl(st, AT91_SAMA5D2_TRGR);
721
-	u8 bit;
722733 
723734 	/* clear TRGMOD */
724735 	status &= ~AT91_SAMA5D2_TRGR_TRGMOD_MASK;
....@@ -728,50 +739,6 @@
728739 
729740 	/* set/unset hw trigger */
730741 	at91_adc_writel(st, AT91_SAMA5D2_TRGR, status);
731
-
732
-	for_each_set_bit(bit, indio->active_scan_mask, indio->num_channels) {
733
-		struct iio_chan_spec const *chan = at91_adc_chan_get(indio, bit);
734
-		u32 cor;
735
-
736
-		if (!chan)
737
-			continue;
738
-		/* these channel types cannot be handled by this trigger */
739
-		if (chan->type == IIO_POSITIONRELATIVE ||
740
-		    chan->type == IIO_PRESSURE)
741
-			continue;
742
-
743
-		if (state) {
744
-			cor = at91_adc_readl(st, AT91_SAMA5D2_COR);
745
-
746
-			if (chan->differential)
747
-				cor |= (BIT(chan->channel) |
748
-					BIT(chan->channel2)) <<
749
-					AT91_SAMA5D2_COR_DIFF_OFFSET;
750
-			else
751
-				cor &= ~(BIT(chan->channel) <<
752
-				       AT91_SAMA5D2_COR_DIFF_OFFSET);
753
-
754
-			at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
755
-		}
756
-
757
-		if (state) {
758
-			at91_adc_writel(st, AT91_SAMA5D2_CHER,
759
-					BIT(chan->channel));
760
-			/* enable irq only if not using DMA */
761
-			if (!st->dma_st.dma_chan) {
762
-				at91_adc_writel(st, AT91_SAMA5D2_IER,
763
-						BIT(chan->channel));
764
-			}
765
-		} else {
766
-			/* disable irq only if not using DMA */
767
-			if (!st->dma_st.dma_chan) {
768
-				at91_adc_writel(st, AT91_SAMA5D2_IDR,
769
-						BIT(chan->channel));
770
-			}
771
-			at91_adc_writel(st, AT91_SAMA5D2_CHDR,
772
-					BIT(chan->channel));
773
-		}
774
-	}
775742 
776743 	return 0;
777744 }
....@@ -789,6 +756,7 @@
789756 
790757 	/* Needed to ACK the DRDY interruption */
791758 	at91_adc_readl(st, AT91_SAMA5D2_LCDR);
759
+
792760 	return 0;
793761 }
794762 
....@@ -896,18 +864,37 @@
896864 	return 0;
897865 }
898866 
899
-static int at91_adc_buffer_postenable(struct iio_dev *indio_dev)
867
+static bool at91_adc_buffer_check_use_irq(struct iio_dev *indio,
868
+					  struct at91_adc_state *st)
869
+{
870
+	/* if using DMA, we do not use our own IRQ (we use DMA-controller) */
871
+	if (st->dma_st.dma_chan)
872
+		return false;
873
+	/* if the trigger is not ours, then it has its own IRQ */
874
+	if (iio_trigger_validate_own_device(indio->trig, indio))
875
+		return false;
876
+	return true;
877
+}
878
+
879
+static bool at91_adc_current_chan_is_touch(struct iio_dev *indio_dev)
880
+{
881
+	struct at91_adc_state *st = iio_priv(indio_dev);
882
+
883
+	return !!bitmap_subset(indio_dev->active_scan_mask,
884
+			       &st->touch_st.channels_bitmask,
885
+			       AT91_SAMA5D2_MAX_CHAN_IDX + 1);
886
+}
887
+
888
+static int at91_adc_buffer_prepare(struct iio_dev *indio_dev)
900889 {
901890 	int ret;
891
+	u8 bit;
902892 	struct at91_adc_state *st = iio_priv(indio_dev);
903893 
904894 	/* check if we are enabling triggered buffer or the touchscreen */
905
-	if (bitmap_subset(indio_dev->active_scan_mask,
906
-			  &st->touch_st.channels_bitmask,
907
-			  AT91_SAMA5D2_MAX_CHAN_IDX + 1)) {
908
-		/* touchscreen enabling */
895
+	if (at91_adc_current_chan_is_touch(indio_dev))
909896 		return at91_adc_configure_touch(st, true);
910
-	}
897
+
911898 	/* if we are not in triggered mode, we cannot enable the buffer. */
912899 	if (!(indio_dev->currentmode & INDIO_ALL_TRIGGERED_MODES))
913900 		return -EINVAL;
....@@ -915,45 +902,61 @@
915902 	/* we continue with the triggered buffer */
916903 	ret = at91_adc_dma_start(indio_dev);
917904 	if (ret) {
918
-		dev_err(&indio_dev->dev, "buffer postenable failed\n");
905
+		dev_err(&indio_dev->dev, "buffer prepare failed\n");
919906 		return ret;
920907 	}
921908 
922
-	return iio_triggered_buffer_postenable(indio_dev);
909
+	for_each_set_bit(bit, indio_dev->active_scan_mask,
910
+			 indio_dev->num_channels) {
911
+		struct iio_chan_spec const *chan =
912
+					at91_adc_chan_get(indio_dev, bit);
913
+		u32 cor;
914
+
915
+		if (!chan)
916
+			continue;
917
+		/* these channel types cannot be handled by this trigger */
918
+		if (chan->type == IIO_POSITIONRELATIVE ||
919
+		    chan->type == IIO_PRESSURE)
920
+			continue;
921
+
922
+		cor = at91_adc_readl(st, AT91_SAMA5D2_COR);
923
+
924
+		if (chan->differential)
925
+			cor |= (BIT(chan->channel) | BIT(chan->channel2)) <<
926
+				AT91_SAMA5D2_COR_DIFF_OFFSET;
927
+		else
928
+			cor &= ~(BIT(chan->channel) <<
929
+			       AT91_SAMA5D2_COR_DIFF_OFFSET);
930
+
931
+		at91_adc_writel(st, AT91_SAMA5D2_COR, cor);
932
+
933
+		at91_adc_writel(st, AT91_SAMA5D2_CHER, BIT(chan->channel));
934
+	}
935
+
936
+	if (at91_adc_buffer_check_use_irq(indio_dev, st))
937
+		at91_adc_writel(st, AT91_SAMA5D2_IER, AT91_SAMA5D2_IER_DRDY);
938
+
939
+	return 0;
923940 }
924941 
925
-static int at91_adc_buffer_predisable(struct iio_dev *indio_dev)
942
+static int at91_adc_buffer_postdisable(struct iio_dev *indio_dev)
926943 {
927944 	struct at91_adc_state *st = iio_priv(indio_dev);
928
-	int ret;
929945 	u8 bit;
930946 
931947 	/* check if we are disabling triggered buffer or the touchscreen */
932
-	if (bitmap_subset(indio_dev->active_scan_mask,
933
-			  &st->touch_st.channels_bitmask,
934
-			  AT91_SAMA5D2_MAX_CHAN_IDX + 1)) {
935
-		/* touchscreen disable */
948
+	if (at91_adc_current_chan_is_touch(indio_dev))
936949 		return at91_adc_configure_touch(st, false);
937
-	}
950
+
938951 	/* if we are not in triggered mode, nothing to do here */
939952 	if (!(indio_dev->currentmode & INDIO_ALL_TRIGGERED_MODES))
940953 		return -EINVAL;
941954 
942
-	/* continue with the triggered buffer */
943
-	ret = iio_triggered_buffer_predisable(indio_dev);
944
-	if (ret < 0)
945
-		dev_err(&indio_dev->dev, "buffer predisable failed\n");
946
-
947
-	if (!st->dma_st.dma_chan)
948
-		return ret;
949
-
950
-	/* if we are using DMA we must clear registers and end DMA */
951
-	dmaengine_terminate_sync(st->dma_st.dma_chan);
952
-
953955 	/*
954
-	 * For each enabled channel we must read the last converted value
956
+	 * For each enable channel we must disable it in hardware.
957
+	 * In the case of DMA, we must read the last converted value
955958 	 * to clear EOC status and not get a possible interrupt later.
956
-	 * This value is being read by DMA from LCDR anyway
959
+	 * This value is being read by DMA from LCDR anyway, so it's not lost.
957960 	 */
958961 	for_each_set_bit(bit, indio_dev->active_scan_mask,
959962 			 indio_dev->num_channels) {
....@@ -966,18 +969,28 @@
966969 		if (chan->type == IIO_POSITIONRELATIVE ||
967970 		    chan->type == IIO_PRESSURE)
968971 			continue;
972
+
973
+		at91_adc_writel(st, AT91_SAMA5D2_CHDR, BIT(chan->channel));
974
+
969975 		if (st->dma_st.dma_chan)
970976 			at91_adc_readl(st, chan->address);
971977 	}
972978 
979
+	if (at91_adc_buffer_check_use_irq(indio_dev, st))
980
+		at91_adc_writel(st, AT91_SAMA5D2_IDR, AT91_SAMA5D2_IER_DRDY);
981
+
973982 	/* read overflow register to clear possible overflow status */
974983 	at91_adc_readl(st, AT91_SAMA5D2_OVER);
975
-	return ret;
984
+
985
+	/* if we are using DMA we must clear registers and end DMA */
986
+	if (st->dma_st.dma_chan)
987
+		dmaengine_terminate_sync(st->dma_st.dma_chan);
988
+
989
+	return 0;
976990 }
977991 
978992 static const struct iio_buffer_setup_ops at91_buffer_setup_ops = {
979
-	.postenable = &at91_adc_buffer_postenable,
980
-	.predisable = &at91_adc_buffer_predisable,
993
+	.postdisable = &at91_adc_buffer_postdisable,
981994 };
982995 
983996 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *indio,
....@@ -989,7 +1002,7 @@
9891002 	trig = devm_iio_trigger_alloc(&indio->dev, "%s-dev%d-%s", indio->name,
9901003 				      indio->id, trigger_name);
9911004 	if (!trig)
992
-		return NULL;
1005
+		return ERR_PTR(-ENOMEM);
9931006 
9941007 	trig->dev.parent = indio->dev.parent;
9951008 	iio_trigger_set_drvdata(trig, indio);
....@@ -1023,6 +1036,22 @@
10231036 	int i = 0;
10241037 	int val;
10251038 	u8 bit;
1039
+	u32 mask = at91_adc_active_scan_mask_to_reg(indio_dev);
1040
+	unsigned int timeout = 50;
1041
+
1042
+	/*
1043
+	 * Check if the conversion is ready. If not, wait a little bit, and
1044
+	 * in case of timeout exit with an error.
1045
+	 */
1046
+	while ((at91_adc_readl(st, AT91_SAMA5D2_ISR) & mask) != mask &&
1047
+	       timeout) {
1048
+		usleep_range(50, 100);
1049
+		timeout--;
1050
+	}
1051
+
1052
+	/* Cannot read data, not ready. Continue without reporting data */
1053
+	if (!timeout)
1054
+		return;
10261055 
10271056 	for_each_set_bit(bit, indio_dev->active_scan_mask,
10281057 			 indio_dev->num_channels) {
....@@ -1110,6 +1139,13 @@
11101139 	struct iio_dev *indio_dev = pf->indio_dev;
11111140 	struct at91_adc_state *st = iio_priv(indio_dev);
11121141 
1142
+	/*
1143
+	 * If it's not our trigger, start a conversion now, as we are
1144
+	 * actually polling the trigger now.
1145
+	 */
1146
+	if (iio_trigger_validate_own_device(indio_dev->trig, indio_dev))
1147
+		at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_START);
1148
+
11131149 	if (st->dma_st.dma_chan)
11141150 		at91_adc_trigger_handler_dma(indio_dev);
11151151 	else
....@@ -1122,20 +1158,9 @@
11221158 
11231159 static int at91_adc_buffer_init(struct iio_dev *indio)
11241160 {
1125
-	struct at91_adc_state *st = iio_priv(indio);
1126
-
1127
-	if (st->selected_trig->hw_trig) {
1128
-		return devm_iio_triggered_buffer_setup(&indio->dev, indio,
1129
-			&iio_pollfunc_store_time,
1130
-			&at91_adc_trigger_handler, &at91_buffer_setup_ops);
1131
-	}
1132
-	/*
1133
-	 * we need to prepare the buffer ops in case we will get
1134
-	 * another buffer attached (like a callback buffer for the touchscreen)
1135
-	 */
1136
-	indio->setup_ops = &at91_buffer_setup_ops;
1137
-
1138
-	return 0;
1161
+	return devm_iio_triggered_buffer_setup(&indio->dev, indio,
1162
+		&iio_pollfunc_store_time,
1163
+		&at91_adc_trigger_handler, &at91_buffer_setup_ops);
11391164 }
11401165 
11411166 static unsigned at91_adc_startup_time(unsigned startup_time_min,
....@@ -1162,9 +1187,9 @@
11621187 	return i;
11631188 }
11641189 
1165
-static void at91_adc_setup_samp_freq(struct at91_adc_state *st, unsigned freq)
1190
+static void at91_adc_setup_samp_freq(struct iio_dev *indio_dev, unsigned freq)
11661191 {
1167
-	struct iio_dev *indio_dev = iio_priv_to_dev(st);
1192
+	struct at91_adc_state *st = iio_priv(indio_dev);
11681193 	unsigned f_per, prescal, startup, mr;
11691194 
11701195 	f_per = clk_get_rate(st->per_clk);
....@@ -1233,9 +1258,9 @@
12331258 	st->touch_st.touching = true;
12341259 }
12351260 
1236
-static void at91_adc_no_pen_detect_interrupt(struct at91_adc_state *st)
1261
+static void at91_adc_no_pen_detect_interrupt(struct iio_dev *indio_dev)
12371262 {
1238
-	struct iio_dev *indio_dev = iio_priv_to_dev(st);
1263
+	struct at91_adc_state *st = iio_priv(indio_dev);
12391264 
12401265 	at91_adc_writel(st, AT91_SAMA5D2_TRGR,
12411266 			AT91_SAMA5D2_TRGR_TRGMOD_NO_TRIGGER);
....@@ -1255,7 +1280,7 @@
12551280 					struct at91_adc_touch, workq);
12561281 	struct at91_adc_state *st = container_of(touch_st,
12571282 					struct at91_adc_state, touch_st);
1258
-	struct iio_dev *indio_dev = iio_priv_to_dev(st);
1283
+	struct iio_dev *indio_dev = st->indio_dev;
12591284 
12601285 	iio_push_to_buffers(indio_dev, st->buffer);
12611286 }
....@@ -1276,7 +1301,7 @@
12761301 		at91_adc_pen_detect_interrupt(st);
12771302 	} else if ((status & AT91_SAMA5D2_IER_NOPEN)) {
12781303 		/* nopen detected IRQ */
1279
-		at91_adc_no_pen_detect_interrupt(st);
1304
+		at91_adc_no_pen_detect_interrupt(indio);
12801305 	} else if ((status & AT91_SAMA5D2_ISR_PENS) &&
12811306 		   ((status & rdy_mask) == rdy_mask)) {
12821307 		/* periodic trigger IRQ - during pen sense */
....@@ -1289,7 +1314,8 @@
12891314 		status = at91_adc_readl(st, AT91_SAMA5D2_XPOSR);
12901315 		status = at91_adc_readl(st, AT91_SAMA5D2_YPOSR);
12911316 		status = at91_adc_readl(st, AT91_SAMA5D2_PRESSR);
1292
-	} else if (iio_buffer_enabled(indio) && !st->dma_st.dma_chan) {
1317
+	} else if (iio_buffer_enabled(indio) &&
1318
+		   (status & AT91_SAMA5D2_IER_DRDY)) {
12931319 		/* triggered buffer without DMA */
12941320 		disable_irq_nosync(irq);
12951321 		iio_trigger_poll(indio->trig);
....@@ -1327,10 +1353,12 @@
13271353 		ret = at91_adc_read_position(st, chan->channel,
13281354 					     &tmp_val);
13291355 		*val = tmp_val;
1356
+		if (ret > 0)
1357
+			ret = at91_adc_adjust_val_osr(st, val);
13301358 		mutex_unlock(&st->lock);
13311359 		iio_device_release_direct_mode(indio_dev);
13321360 
1333
-		return at91_adc_adjust_val_osr(st, val);
1361
+		return ret;
13341362 	}
13351363 	if (chan->type == IIO_PRESSURE) {
13361364 		ret = iio_device_claim_direct_mode(indio_dev);
....@@ -1341,10 +1369,12 @@
13411369 		ret = at91_adc_read_pressure(st, chan->channel,
13421370 					     &tmp_val);
13431371 		*val = tmp_val;
1372
+		if (ret > 0)
1373
+			ret = at91_adc_adjust_val_osr(st, val);
13441374 		mutex_unlock(&st->lock);
13451375 		iio_device_release_direct_mode(indio_dev);
13461376 
1347
-		return at91_adc_adjust_val_osr(st, val);
1377
+		return ret;
13481378 	}
13491379 
13501380 	/* in this case we have a voltage channel */
....@@ -1435,16 +1465,20 @@
14351465 		/* if no change, optimize out */
14361466 		if (val == st->oversampling_ratio)
14371467 			return 0;
1468
+		mutex_lock(&st->lock);
14381469 		st->oversampling_ratio = val;
14391470 		/* update ratio */
14401471 		at91_adc_config_emr(st);
1472
+		mutex_unlock(&st->lock);
14411473 		return 0;
14421474 	case IIO_CHAN_INFO_SAMP_FREQ:
14431475 		if (val < st->soc_info.min_sample_rate ||
14441476 		    val > st->soc_info.max_sample_rate)
14451477 			return -EINVAL;
14461478 
1447
-		at91_adc_setup_samp_freq(st, val);
1479
+		mutex_lock(&st->lock);
1480
+		at91_adc_setup_samp_freq(indio_dev, val);
1481
+		mutex_unlock(&st->lock);
14481482 		return 0;
14491483 	default:
14501484 		return -EINVAL;
....@@ -1468,10 +1502,10 @@
14681502 	if (st->dma_st.dma_chan)
14691503 		return;
14701504 
1471
-	st->dma_st.dma_chan = dma_request_slave_channel(&pdev->dev, "rx");
1472
-
1473
-	if (!st->dma_st.dma_chan)  {
1505
+	st->dma_st.dma_chan = dma_request_chan(&pdev->dev, "rx");
1506
+	if (IS_ERR(st->dma_st.dma_chan))  {
14741507 		dev_info(&pdev->dev, "can't get DMA channel\n");
1508
+		st->dma_st.dma_chan = NULL;
14751509 		goto dma_exit;
14761510 	}
14771511 
....@@ -1507,7 +1541,7 @@
15071541 			  st->dma_st.rx_buf, st->dma_st.rx_dma_buf);
15081542 dma_chan_disable:
15091543 	dma_release_channel(st->dma_st.dma_chan);
1510
-	st->dma_st.dma_chan = 0;
1544
+	st->dma_st.dma_chan = NULL;
15111545 dma_exit:
15121546 	dev_info(&pdev->dev, "continuing without DMA support\n");
15131547 }
....@@ -1530,7 +1564,7 @@
15301564 	dma_free_coherent(st->dma_st.dma_chan->device->dev, pages * PAGE_SIZE,
15311565 			  st->dma_st.rx_buf, st->dma_st.rx_dma_buf);
15321566 	dma_release_channel(st->dma_st.dma_chan);
1533
-	st->dma_st.dma_chan = 0;
1567
+	st->dma_st.dma_chan = NULL;
15341568 
15351569 	dev_info(&pdev->dev, "continuing without DMA support\n");
15361570 }
....@@ -1538,6 +1572,7 @@
15381572 static int at91_adc_set_watermark(struct iio_dev *indio_dev, unsigned int val)
15391573 {
15401574 	struct at91_adc_state *st = iio_priv(indio_dev);
1575
+	int ret;
15411576 
15421577 	if (val > AT91_HWFIFO_MAX_SIZE)
15431578 		return -EINVAL;
....@@ -1561,7 +1596,15 @@
15611596 	else if (val > 1)
15621597 		at91_adc_dma_init(to_platform_device(&indio_dev->dev));
15631598 
1564
-	return 0;
1599
+	/*
1600
+	 * We can start the DMA only after setting the watermark and
1601
+	 * having the DMA initialization completed
1602
+	 */
1603
+	ret = at91_adc_buffer_prepare(indio_dev);
1604
+	if (ret)
1605
+		at91_adc_dma_disable(to_platform_device(&indio_dev->dev));
1606
+
1607
+	return ret;
15651608 }
15661609 
15671610 static int at91_adc_update_scan_mode(struct iio_dev *indio_dev,
....@@ -1582,8 +1625,10 @@
15821625 	return 0;
15831626 }
15841627 
1585
-static void at91_adc_hw_init(struct at91_adc_state *st)
1628
+static void at91_adc_hw_init(struct iio_dev *indio_dev)
15861629 {
1630
+	struct at91_adc_state *st = iio_priv(indio_dev);
1631
+
15871632 	at91_adc_writel(st, AT91_SAMA5D2_CR, AT91_SAMA5D2_CR_SWRST);
15881633 	at91_adc_writel(st, AT91_SAMA5D2_IDR, 0xffffffff);
15891634 	/*
....@@ -1593,7 +1638,7 @@
15931638 	at91_adc_writel(st, AT91_SAMA5D2_MR,
15941639 			AT91_SAMA5D2_MR_TRANSFER(2) | AT91_SAMA5D2_MR_ANACH);
15951640 
1596
-	at91_adc_setup_samp_freq(st, st->soc_info.min_sample_rate);
1641
+	at91_adc_setup_samp_freq(indio_dev, st->soc_info.min_sample_rate);
15971642 
15981643 	/* configure extended mode register */
15991644 	at91_adc_config_emr(st);
....@@ -1602,8 +1647,7 @@
16021647 static ssize_t at91_adc_get_fifo_state(struct device *dev,
16031648 				       struct device_attribute *attr, char *buf)
16041649 {
1605
-	struct iio_dev *indio_dev =
1606
-			platform_get_drvdata(to_platform_device(dev));
1650
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
16071651 	struct at91_adc_state *st = iio_priv(indio_dev);
16081652 
16091653 	return scnprintf(buf, PAGE_SIZE, "%d\n", !!st->dma_st.dma_chan);
....@@ -1612,8 +1656,7 @@
16121656 static ssize_t at91_adc_get_watermark(struct device *dev,
16131657 				      struct device_attribute *attr, char *buf)
16141658 {
1615
-	struct iio_dev *indio_dev =
1616
-			platform_get_drvdata(to_platform_device(dev));
1659
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
16171660 	struct at91_adc_state *st = iio_priv(indio_dev);
16181661 
16191662 	return scnprintf(buf, PAGE_SIZE, "%d\n", st->dma_st.watermark);
....@@ -1670,7 +1713,6 @@
16701713 	if (!indio_dev)
16711714 		return -ENOMEM;
16721715 
1673
-	indio_dev->dev.parent = &pdev->dev;
16741716 	indio_dev->name = dev_name(&pdev->dev);
16751717 	indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
16761718 	indio_dev->info = &at91_adc_info;
....@@ -1678,6 +1720,7 @@
16781720 	indio_dev->num_channels = ARRAY_SIZE(at91_adc_channels);
16791721 
16801722 	st = iio_priv(indio_dev);
1723
+	st->indio_dev = indio_dev;
16811724 
16821725 	bitmap_set(&st->touch_st.channels_bitmask,
16831726 		   AT91_SAMA5D2_TOUCH_X_CHAN_IDX, 1);
....@@ -1739,16 +1782,12 @@
17391782 	mutex_init(&st->lock);
17401783 	INIT_WORK(&st->touch_st.workq, at91_adc_workq_handler);
17411784 
1742
-	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1743
-	if (!res)
1744
-		return -EINVAL;
1785
+	st->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
1786
+	if (IS_ERR(st->base))
1787
+		return PTR_ERR(st->base);
17451788 
17461789 	/* if we plan to use DMA, we need the physical address of the regs */
17471790 	st->dma_st.phys_addr = res->start;
1748
-
1749
-	st->base = devm_ioremap_resource(&pdev->dev, res);
1750
-	if (IS_ERR(st->base))
1751
-		return PTR_ERR(st->base);
17521791 
17531792 	st->irq = platform_get_irq(pdev, 0);
17541793 	if (st->irq <= 0) {
....@@ -1789,7 +1828,7 @@
17891828 		goto vref_disable;
17901829 	}
17911830 
1792
-	at91_adc_hw_init(st);
1831
+	at91_adc_hw_init(indio_dev);
17931832 
17941833 	ret = clk_prepare_enable(st->per_clk);
17951834 	if (ret)
....@@ -1865,9 +1904,11 @@
18651904 
18661905 static __maybe_unused int at91_adc_suspend(struct device *dev)
18671906 {
1868
-	struct iio_dev *indio_dev =
1869
-			platform_get_drvdata(to_platform_device(dev));
1907
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
18701908 	struct at91_adc_state *st = iio_priv(indio_dev);
1909
+
1910
+	if (iio_buffer_enabled(indio_dev))
1911
+		at91_adc_buffer_postdisable(indio_dev);
18711912 
18721913 	/*
18731914 	 * Do a sofware reset of the ADC before we go to suspend.
....@@ -1886,8 +1927,7 @@
18861927 
18871928 static __maybe_unused int at91_adc_resume(struct device *dev)
18881929 {
1889
-	struct iio_dev *indio_dev =
1890
-			platform_get_drvdata(to_platform_device(dev));
1930
+	struct iio_dev *indio_dev = dev_get_drvdata(dev);
18911931 	struct at91_adc_state *st = iio_priv(indio_dev);
18921932 	int ret;
18931933 
....@@ -1907,24 +1947,17 @@
19071947 	if (ret)
19081948 		goto vref_disable_resume;
19091949 
1910
-	at91_adc_hw_init(st);
1950
+	at91_adc_hw_init(indio_dev);
19111951 
19121952 	/* reconfiguring trigger hardware state */
19131953 	if (!iio_buffer_enabled(indio_dev))
19141954 		return 0;
19151955 
1916
-	/* check if we are enabling triggered buffer or the touchscreen */
1917
-	if (bitmap_subset(indio_dev->active_scan_mask,
1918
-			  &st->touch_st.channels_bitmask,
1919
-			  AT91_SAMA5D2_MAX_CHAN_IDX + 1)) {
1920
-		/* touchscreen enabling */
1921
-		return at91_adc_configure_touch(st, true);
1922
-	} else {
1923
-		return at91_adc_configure_trigger(st->trig, true);
1924
-	}
1956
+	ret = at91_adc_buffer_prepare(indio_dev);
1957
+	if (ret)
1958
+		goto vref_disable_resume;
19251959 
1926
-	/* not needed but more explicit */
1927
-	return 0;
1960
+	return at91_adc_configure_trigger(st->trig, true);
19281961 
19291962 vref_disable_resume:
19301963 	regulator_disable(st->vref);