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2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771 
 kernel/drivers/hwmon/jc42.c
....@@ -19,6 +19,7 @@
1919 #include <linux/err.h>
2020 #include <linux/mutex.h>
2121 #include <linux/of.h>
22
+#include <linux/regmap.h>
2223 
2324 /* Addresses to scan */
2425 static const unsigned short normal_i2c[] = {
....@@ -189,31 +190,14 @@
189190 	{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
190191 };
191192 
192
-enum temp_index {
193
-	t_input = 0,
194
-	t_crit,
195
-	t_min,
196
-	t_max,
197
-	t_num_temp
198
-};
199
-
200
-static const u8 temp_regs[t_num_temp] = {
201
-	[t_input] = JC42_REG_TEMP,
202
-	[t_crit] = JC42_REG_TEMP_CRITICAL,
203
-	[t_min] = JC42_REG_TEMP_LOWER,
204
-	[t_max] = JC42_REG_TEMP_UPPER,
205
-};
206
-
207193 /* Each client has this additional data */
208194 struct jc42_data {
209
-	struct i2c_client *client;
210195 	struct mutex	update_lock;	/* protect register access */
196
+	struct regmap	*regmap;
211197 	bool		extended;	/* true if extended range supported */
212198 	bool		valid;
213
-	unsigned long	last_updated;	/* In jiffies */
214199 	u16		orig_config;	/* original configuration */
215200 	u16		config;		/* current configuration */
216
-	u16		temp[t_num_temp];/* Temperatures */
217201 };
218202 
219203 #define JC42_TEMP_MIN_EXTENDED	(-40000)
....@@ -238,85 +222,102 @@
238222 	return reg * 125 / 2;
239223 }
240224 
241
-static struct jc42_data *jc42_update_device(struct device *dev)
242
-{
243
-	struct jc42_data *data = dev_get_drvdata(dev);
244
-	struct i2c_client *client = data->client;
245
-	struct jc42_data *ret = data;
246
-	int i, val;
247
-
248
-	mutex_lock(&data->update_lock);
249
-
250
-	if (time_after(jiffies, data->last_updated + HZ) || !data->valid) {
251
-		for (i = 0; i < t_num_temp; i++) {
252
-			val = i2c_smbus_read_word_swapped(client, temp_regs[i]);
253
-			if (val < 0) {
254
-				ret = ERR_PTR(val);
255
-				goto abort;
256
-			}
257
-			data->temp[i] = val;
258
-		}
259
-		data->last_updated = jiffies;
260
-		data->valid = true;
261
-	}
262
-abort:
263
-	mutex_unlock(&data->update_lock);
264
-	return ret;
265
-}
266
-
267225 static int jc42_read(struct device *dev, enum hwmon_sensor_types type,
268226 		     u32 attr, int channel, long *val)
269227 {
270
-	struct jc42_data *data = jc42_update_device(dev);
271
-	int temp, hyst;
228
+	struct jc42_data *data = dev_get_drvdata(dev);
229
+	unsigned int regval;
230
+	int ret, temp, hyst;
272231 
273
-	if (IS_ERR(data))
274
-		return PTR_ERR(data);
232
+	mutex_lock(&data->update_lock);
275233 
276234 	switch (attr) {
277235 	case hwmon_temp_input:
278
-		*val = jc42_temp_from_reg(data->temp[t_input]);
279
-		return 0;
236
+		ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval);
237
+		if (ret)
238
+			break;
239
+
240
+		*val = jc42_temp_from_reg(regval);
241
+		break;
280242 	case hwmon_temp_min:
281
-		*val = jc42_temp_from_reg(data->temp[t_min]);
282
-		return 0;
243
+		ret = regmap_read(data->regmap, JC42_REG_TEMP_LOWER, &regval);
244
+		if (ret)
245
+			break;
246
+
247
+		*val = jc42_temp_from_reg(regval);
248
+		break;
283249 	case hwmon_temp_max:
284
-		*val = jc42_temp_from_reg(data->temp[t_max]);
285
-		return 0;
250
+		ret = regmap_read(data->regmap, JC42_REG_TEMP_UPPER, &regval);
251
+		if (ret)
252
+			break;
253
+
254
+		*val = jc42_temp_from_reg(regval);
255
+		break;
286256 	case hwmon_temp_crit:
287
-		*val = jc42_temp_from_reg(data->temp[t_crit]);
288
-		return 0;
257
+		ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL,
258
+				  &regval);
259
+		if (ret)
260
+			break;
261
+
262
+		*val = jc42_temp_from_reg(regval);
263
+		break;
289264 	case hwmon_temp_max_hyst:
290
-		temp = jc42_temp_from_reg(data->temp[t_max]);
265
+		ret = regmap_read(data->regmap, JC42_REG_TEMP_UPPER, &regval);
266
+		if (ret)
267
+			break;
268
+
269
+		temp = jc42_temp_from_reg(regval);
291270 		hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
292271 						>> JC42_CFG_HYST_SHIFT];
293272 		*val = temp - hyst;
294
-		return 0;
273
+		break;
295274 	case hwmon_temp_crit_hyst:
296
-		temp = jc42_temp_from_reg(data->temp[t_crit]);
275
+		ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL,
276
+				  &regval);
277
+		if (ret)
278
+			break;
279
+
280
+		temp = jc42_temp_from_reg(regval);
297281 		hyst = jc42_hysteresis[(data->config & JC42_CFG_HYST_MASK)
298282 						>> JC42_CFG_HYST_SHIFT];
299283 		*val = temp - hyst;
300
-		return 0;
284
+		break;
301285 	case hwmon_temp_min_alarm:
302
-		*val = (data->temp[t_input] >> JC42_ALARM_MIN_BIT) & 1;
303
-		return 0;
286
+		ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval);
287
+		if (ret)
288
+			break;
289
+
290
+		*val = (regval >> JC42_ALARM_MIN_BIT) & 1;
291
+		break;
304292 	case hwmon_temp_max_alarm:
305
-		*val = (data->temp[t_input] >> JC42_ALARM_MAX_BIT) & 1;
306
-		return 0;
293
+		ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval);
294
+		if (ret)
295
+			break;
296
+
297
+		*val = (regval >> JC42_ALARM_MAX_BIT) & 1;
298
+		break;
307299 	case hwmon_temp_crit_alarm:
308
-		*val = (data->temp[t_input] >> JC42_ALARM_CRIT_BIT) & 1;
309
-		return 0;
300
+		ret = regmap_read(data->regmap, JC42_REG_TEMP, &regval);
301
+		if (ret)
302
+			break;
303
+
304
+		*val = (regval >> JC42_ALARM_CRIT_BIT) & 1;
305
+		break;
310306 	default:
311
-		return -EOPNOTSUPP;
307
+		ret = -EOPNOTSUPP;
308
+		break;
312309 	}
310
+
311
+	mutex_unlock(&data->update_lock);
312
+
313
+	return ret;
313314 }
314315 
315316 static int jc42_write(struct device *dev, enum hwmon_sensor_types type,
316317 		      u32 attr, int channel, long val)
317318 {
318319 	struct jc42_data *data = dev_get_drvdata(dev);
319
-	struct i2c_client *client = data->client;
320
+	unsigned int regval;
320321 	int diff, hyst;
321322 	int ret;
322323 
....@@ -324,21 +325,23 @@
324325 
325326 	switch (attr) {
326327 	case hwmon_temp_min:
327
-		data->temp[t_min] = jc42_temp_to_reg(val, data->extended);
328
-		ret = i2c_smbus_write_word_swapped(client, temp_regs[t_min],
329
-						   data->temp[t_min]);
328
+		ret = regmap_write(data->regmap, JC42_REG_TEMP_LOWER,
329
+				   jc42_temp_to_reg(val, data->extended));
330330 		break;
331331 	case hwmon_temp_max:
332
-		data->temp[t_max] = jc42_temp_to_reg(val, data->extended);
333
-		ret = i2c_smbus_write_word_swapped(client, temp_regs[t_max],
334
-						   data->temp[t_max]);
332
+		ret = regmap_write(data->regmap, JC42_REG_TEMP_UPPER,
333
+				   jc42_temp_to_reg(val, data->extended));
335334 		break;
336335 	case hwmon_temp_crit:
337
-		data->temp[t_crit] = jc42_temp_to_reg(val, data->extended);
338
-		ret = i2c_smbus_write_word_swapped(client, temp_regs[t_crit],
339
-						   data->temp[t_crit]);
336
+		ret = regmap_write(data->regmap, JC42_REG_TEMP_CRITICAL,
337
+				   jc42_temp_to_reg(val, data->extended));
340338 		break;
341339 	case hwmon_temp_crit_hyst:
340
+		ret = regmap_read(data->regmap, JC42_REG_TEMP_CRITICAL,
341
+				  &regval);
342
+		if (ret)
343
+			break;
344
+
342345 		/*
343346 		 * JC42.4 compliant chips only support four hysteresis values.
344347 		 * Pick best choice and go from there.
....@@ -346,7 +349,7 @@
346349 		val = clamp_val(val, (data->extended ? JC42_TEMP_MIN_EXTENDED
347350 						     : JC42_TEMP_MIN) - 6000,
348351 				JC42_TEMP_MAX);
349
-		diff = jc42_temp_from_reg(data->temp[t_crit]) - val;
352
+		diff = jc42_temp_from_reg(regval) - val;
350353 		hyst = 0;
351354 		if (diff > 0) {
352355 			if (diff < 2250)
....@@ -358,9 +361,8 @@
358361 		}
359362 		data->config = (data->config & ~JC42_CFG_HYST_MASK) |
360363 				(hyst << JC42_CFG_HYST_SHIFT);
361
-		ret = i2c_smbus_write_word_swapped(data->client,
362
-						   JC42_REG_CONFIG,
363
-						   data->config);
364
+		ret = regmap_write(data->regmap, JC42_REG_CONFIG,
365
+				   data->config);
364366 		break;
365367 	default:
366368 		ret = -EOPNOTSUPP;
....@@ -458,51 +460,80 @@
458460 	.info = jc42_info,
459461 };
460462 
463
+static bool jc42_readable_reg(struct device *dev, unsigned int reg)
464
+{
465
+	return (reg >= JC42_REG_CAP && reg <= JC42_REG_DEVICEID) ||
466
+		reg == JC42_REG_SMBUS;
467
+}
468
+
469
+static bool jc42_writable_reg(struct device *dev, unsigned int reg)
470
+{
471
+	return (reg >= JC42_REG_CONFIG && reg <= JC42_REG_TEMP_CRITICAL) ||
472
+		reg == JC42_REG_SMBUS;
473
+}
474
+
475
+static bool jc42_volatile_reg(struct device *dev, unsigned int reg)
476
+{
477
+	return reg == JC42_REG_CONFIG || reg == JC42_REG_TEMP;
478
+}
479
+
480
+static const struct regmap_config jc42_regmap_config = {
481
+	.reg_bits = 8,
482
+	.val_bits = 16,
483
+	.val_format_endian = REGMAP_ENDIAN_BIG,
484
+	.max_register = JC42_REG_SMBUS,
485
+	.writeable_reg = jc42_writable_reg,
486
+	.readable_reg = jc42_readable_reg,
487
+	.volatile_reg = jc42_volatile_reg,
488
+	.cache_type = REGCACHE_RBTREE,
489
+};
490
+
461491 static int jc42_probe(struct i2c_client *client)
462492 {
463493 	struct device *dev = &client->dev;
464494 	struct device *hwmon_dev;
495
+	unsigned int config, cap;
465496 	struct jc42_data *data;
466
-	int config, cap;
497
+	int ret;
467498 
468499 	data = devm_kzalloc(dev, sizeof(struct jc42_data), GFP_KERNEL);
469500 	if (!data)
470501 		return -ENOMEM;
471502 
472
-	data->client = client;
503
+	data->regmap = devm_regmap_init_i2c(client, &jc42_regmap_config);
504
+	if (IS_ERR(data->regmap))
505
+		return PTR_ERR(data->regmap);
506
+
473507 	i2c_set_clientdata(client, data);
474508 	mutex_init(&data->update_lock);
475509 
476
-	cap = i2c_smbus_read_word_swapped(client, JC42_REG_CAP);
477
-	if (cap < 0)
478
-		return cap;
510
+	ret = regmap_read(data->regmap, JC42_REG_CAP, &cap);
511
+	if (ret)
512
+		return ret;
479513 
480514 	data->extended = !!(cap & JC42_CAP_RANGE);
481515 
482516 	if (device_property_read_bool(dev, "smbus-timeout-disable")) {
483
-		int smbus;
484
-
485517 		/*
486518 		 * Not all chips support this register, but from a
487519 		 * quick read of various datasheets no chip appears
488520 		 * incompatible with the below attempt to disable
489521 		 * the timeout. And the whole thing is opt-in...
490522 		 */
491
-		smbus = i2c_smbus_read_word_swapped(client, JC42_REG_SMBUS);
492
-		if (smbus < 0)
493
-			return smbus;
494
-		i2c_smbus_write_word_swapped(client, JC42_REG_SMBUS,
495
-					     smbus | SMBUS_STMOUT);
523
+		ret = regmap_set_bits(data->regmap, JC42_REG_SMBUS,
524
+				      SMBUS_STMOUT);
525
+		if (ret)
526
+			return ret;
496527 	}
497528 
498
-	config = i2c_smbus_read_word_swapped(client, JC42_REG_CONFIG);
499
-	if (config < 0)
500
-		return config;
529
+	ret = regmap_read(data->regmap, JC42_REG_CONFIG, &config);
530
+	if (ret)
531
+		return ret;
501532 
502533 	data->orig_config = config;
503534 	if (config & JC42_CFG_SHUTDOWN) {
504535 		config &= ~JC42_CFG_SHUTDOWN;
505
-		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
536
+		regmap_write(data->regmap, JC42_REG_CONFIG, config);
506537 	}
507538 	data->config = config;
508539 
....@@ -523,7 +554,7 @@
523554 
524555 		config = (data->orig_config & ~JC42_CFG_HYST_MASK)
525556 		  | (data->config & JC42_CFG_HYST_MASK);
526
-		i2c_smbus_write_word_swapped(client, JC42_REG_CONFIG, config);
557
+		regmap_write(data->regmap, JC42_REG_CONFIG, config);
527558 	}
528559 	return 0;
529560 }
....@@ -535,8 +566,11 @@
535566 	struct jc42_data *data = dev_get_drvdata(dev);
536567 
537568 	data->config |= JC42_CFG_SHUTDOWN;
538
-	i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
539
-				     data->config);
569
+	regmap_write(data->regmap, JC42_REG_CONFIG, data->config);
570
+
571
+	regcache_cache_only(data->regmap, true);
572
+	regcache_mark_dirty(data->regmap);
573
+
540574 	return 0;
541575 }
542576 
....@@ -544,10 +578,13 @@
544578 {
545579 	struct jc42_data *data = dev_get_drvdata(dev);
546580 
581
+	regcache_cache_only(data->regmap, false);
582
+
547583 	data->config &= ~JC42_CFG_SHUTDOWN;
548
-	i2c_smbus_write_word_swapped(data->client, JC42_REG_CONFIG,
549
-				     data->config);
550
-	return 0;
584
+	regmap_write(data->regmap, JC42_REG_CONFIG, data->config);
585
+
586
+	/* Restore cached register values to hardware */
587
+	return regcache_sync(data->regmap);
551588 }
552589 
553590 static const struct dev_pm_ops jc42_dev_pm_ops = {