~hc/RK356X_SDK_RELEASE.git

..	..	@@ -27,16 +27,19 @@
27	27	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28	28	* DEALINGS IN THE SOFTWARE.
29	29	*/
30		-#include <linux/kernel.h>
31		-#include <linux/slab.h>
	30	+
32	31	#include <linux/hdmi.h>
33	32	#include <linux/i2c.h>
	33	+#include <linux/kernel.h>
34	34	#include <linux/module.h>
	35	+#include <linux/slab.h>
35	36	#include <linux/vga_switcheroo.h>
36		-#include <drm/drmP.h>
	37	+
	38	+#include <drm/drm_displayid.h>
	39	+#include <drm/drm_drv.h>
37	40	#include <drm/drm_edid.h>
38	41	#include <drm/drm_encoder.h>
39		-#include <drm/drm_displayid.h>
	42	+#include <drm/drm_print.h>
40	43	#include <drm/drm_scdc_helper.h>
41	44
42	45	#include "drm_crtc_internal.h"
..	..	@@ -68,8 +71,6 @@
68	71	* maximum size and use that.
69	72	*/
70	73	#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
71		-/* Monitor forgot to set the first detailed is preferred bit. */
72		-#define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
73	74	/* use +hsync +vsync for detailed mode */
74	75	#define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
75	76	/* Force reduced-blanking timings for detailed modes */
..	..	@@ -98,14 +99,6 @@
98	99	#define LEVEL_GTF2 2
99	100	#define LEVEL_CVT 3
100	101
101		-/Enum storing luminance types for HDR blocks in EDID/
102		-enum luminance_value {
103		- NO_LUMINANCE_DATA = 3,
104		- MAXIMUM_LUMINANCE = 4,
105		- FRAME_AVERAGE_LUMINANCE = 5,
106		- MINIMUM_LUMINANCE = 6
107		-};
108		-
109	102	static const struct edid_quirk {
110	103	char vendor[4];
111	104	int product_id;
..	..	@@ -115,8 +108,6 @@
115	108	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
116	109	/* Acer F51 */
117	110	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
118		- /* Unknown Acer */
119		- { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
120	111
121	112	/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
122	113	{ "AEO", 0, EDID_QUIRK_FORCE_6BPC },
..	..	@@ -152,12 +143,6 @@
152	143	/* LG Philips LCD LP154W01-A5 */
153	144	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
154	145	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
155		-
156		- /* Philips 107p5 CRT */
157		- { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
158		-
159		- /* Proview AY765C */
160		- { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
161	146
162	147	/* Samsung SyncMaster 205BW. Note: irony */
163	148	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
..	..	@@ -730,669 +715,667 @@
730	715	*
731	716	* Do not access directly, instead always use cea_mode_for_vic().
732	717	*/
733		-static const struct drm_display_mode edid_cea_modes_0[] = {
734		- /* 0 - dummy, VICs start at 1 */
735		- { },
	718	+static const struct drm_display_mode edid_cea_modes_1[] = {
736	719	/* 1 - 640x480@60Hz 4:3 */
737	720	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
738	721	752, 800, 0, 480, 490, 492, 525, 0,
739	722	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
740		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	723	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
741	724	/* 2 - 720x480@60Hz 4:3 */
742	725	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
743	726	798, 858, 0, 480, 489, 495, 525, 0,
744	727	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
745		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	728	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
746	729	/* 3 - 720x480@60Hz 16:9 */
747	730	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
748	731	798, 858, 0, 480, 489, 495, 525, 0,
749	732	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
750		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	733	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
751	734	/* 4 - 1280x720@60Hz 16:9 */
752	735	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
753	736	1430, 1650, 0, 720, 725, 730, 750, 0,
754	737	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
755		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	738	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
756	739	/* 5 - 1920x1080i@60Hz 16:9 */
757	740	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
758	741	2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
759	742	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
760	743	DRM_MODE_FLAG_INTERLACE),
761		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	744	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
762	745	/* 6 - 720(1440)x480i@60Hz 4:3 */
763	746	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
764	747	801, 858, 0, 480, 488, 494, 525, 0,
765	748	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
766	749	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
767		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	750	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
768	751	/* 7 - 720(1440)x480i@60Hz 16:9 */
769	752	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
770	753	801, 858, 0, 480, 488, 494, 525, 0,
771	754	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
772	755	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
773		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	756	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
774	757	/* 8 - 720(1440)x240@60Hz 4:3 */
775	758	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
776	759	801, 858, 0, 240, 244, 247, 262, 0,
777	760	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
778	761	DRM_MODE_FLAG_DBLCLK),
779		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	762	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
780	763	/* 9 - 720(1440)x240@60Hz 16:9 */
781	764	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
782	765	801, 858, 0, 240, 244, 247, 262, 0,
783	766	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
784	767	DRM_MODE_FLAG_DBLCLK),
785		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	768	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
786	769	/* 10 - 2880x480i@60Hz 4:3 */
787	770	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
788	771	3204, 3432, 0, 480, 488, 494, 525, 0,
789	772	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
790	773	DRM_MODE_FLAG_INTERLACE),
791		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	774	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
792	775	/* 11 - 2880x480i@60Hz 16:9 */
793	776	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
794	777	3204, 3432, 0, 480, 488, 494, 525, 0,
795	778	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
796	779	DRM_MODE_FLAG_INTERLACE),
797		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	780	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
798	781	/* 12 - 2880x240@60Hz 4:3 */
799	782	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
800	783	3204, 3432, 0, 240, 244, 247, 262, 0,
801	784	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
802		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	785	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
803	786	/* 13 - 2880x240@60Hz 16:9 */
804	787	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
805	788	3204, 3432, 0, 240, 244, 247, 262, 0,
806	789	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
807		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	790	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
808	791	/* 14 - 1440x480@60Hz 4:3 */
809	792	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
810	793	1596, 1716, 0, 480, 489, 495, 525, 0,
811	794	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
812		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	795	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
813	796	/* 15 - 1440x480@60Hz 16:9 */
814	797	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
815	798	1596, 1716, 0, 480, 489, 495, 525, 0,
816	799	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
817		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	800	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
818	801	/* 16 - 1920x1080@60Hz 16:9 */
819	802	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
820	803	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
821	804	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
822		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	805	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
823	806	/* 17 - 720x576@50Hz 4:3 */
824	807	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
825	808	796, 864, 0, 576, 581, 586, 625, 0,
826	809	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
827		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	810	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
828	811	/* 18 - 720x576@50Hz 16:9 */
829	812	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
830	813	796, 864, 0, 576, 581, 586, 625, 0,
831	814	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
832		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	815	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
833	816	/* 19 - 1280x720@50Hz 16:9 */
834	817	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
835	818	1760, 1980, 0, 720, 725, 730, 750, 0,
836	819	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
837		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	820	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
838	821	/* 20 - 1920x1080i@50Hz 16:9 */
839	822	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
840	823	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
841	824	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
842	825	DRM_MODE_FLAG_INTERLACE),
843		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	826	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
844	827	/* 21 - 720(1440)x576i@50Hz 4:3 */
845	828	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
846	829	795, 864, 0, 576, 580, 586, 625, 0,
847	830	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
848	831	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
849		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	832	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
850	833	/* 22 - 720(1440)x576i@50Hz 16:9 */
851	834	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
852	835	795, 864, 0, 576, 580, 586, 625, 0,
853	836	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
854	837	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
855		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	838	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
856	839	/* 23 - 720(1440)x288@50Hz 4:3 */
857	840	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
858	841	795, 864, 0, 288, 290, 293, 312, 0,
859	842	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
860	843	DRM_MODE_FLAG_DBLCLK),
861		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	844	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
862	845	/* 24 - 720(1440)x288@50Hz 16:9 */
863	846	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
864	847	795, 864, 0, 288, 290, 293, 312, 0,
865	848	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
866	849	DRM_MODE_FLAG_DBLCLK),
867		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	850	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
868	851	/* 25 - 2880x576i@50Hz 4:3 */
869	852	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
870	853	3180, 3456, 0, 576, 580, 586, 625, 0,
871	854	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
872	855	DRM_MODE_FLAG_INTERLACE),
873		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	856	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
874	857	/* 26 - 2880x576i@50Hz 16:9 */
875	858	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
876	859	3180, 3456, 0, 576, 580, 586, 625, 0,
877	860	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
878	861	DRM_MODE_FLAG_INTERLACE),
879		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	862	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
880	863	/* 27 - 2880x288@50Hz 4:3 */
881	864	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
882	865	3180, 3456, 0, 288, 290, 293, 312, 0,
883	866	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
884		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	867	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
885	868	/* 28 - 2880x288@50Hz 16:9 */
886	869	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
887	870	3180, 3456, 0, 288, 290, 293, 312, 0,
888	871	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
889		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	872	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
890	873	/* 29 - 1440x576@50Hz 4:3 */
891	874	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
892	875	1592, 1728, 0, 576, 581, 586, 625, 0,
893	876	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
894		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	877	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
895	878	/* 30 - 1440x576@50Hz 16:9 */
896	879	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
897	880	1592, 1728, 0, 576, 581, 586, 625, 0,
898	881	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
899		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	882	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
900	883	/* 31 - 1920x1080@50Hz 16:9 */
901	884	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
902	885	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
903	886	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
904		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	887	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
905	888	/* 32 - 1920x1080@24Hz 16:9 */
906	889	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
907	890	2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
908	891	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
909		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	892	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
910	893	/* 33 - 1920x1080@25Hz 16:9 */
911	894	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
912	895	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
913	896	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
914		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	897	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
915	898	/* 34 - 1920x1080@30Hz 16:9 */
916	899	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
917	900	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
918	901	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
919		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	902	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
920	903	/* 35 - 2880x480@60Hz 4:3 */
921	904	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
922	905	3192, 3432, 0, 480, 489, 495, 525, 0,
923	906	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
924		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	907	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
925	908	/* 36 - 2880x480@60Hz 16:9 */
926	909	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
927	910	3192, 3432, 0, 480, 489, 495, 525, 0,
928	911	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
929		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	912	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
930	913	/* 37 - 2880x576@50Hz 4:3 */
931	914	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
932	915	3184, 3456, 0, 576, 581, 586, 625, 0,
933	916	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
934		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	917	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
935	918	/* 38 - 2880x576@50Hz 16:9 */
936	919	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
937	920	3184, 3456, 0, 576, 581, 586, 625, 0,
938	921	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
939		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	922	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
940	923	/* 39 - 1920x1080i@50Hz 16:9 */
941	924	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
942	925	2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
943	926	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_NVSYNC \|
944	927	DRM_MODE_FLAG_INTERLACE),
945		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	928	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
946	929	/* 40 - 1920x1080i@100Hz 16:9 */
947	930	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
948	931	2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
949	932	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
950	933	DRM_MODE_FLAG_INTERLACE),
951		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	934	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
952	935	/* 41 - 1280x720@100Hz 16:9 */
953	936	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
954	937	1760, 1980, 0, 720, 725, 730, 750, 0,
955	938	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
956		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	939	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
957	940	/* 42 - 720x576@100Hz 4:3 */
958	941	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
959	942	796, 864, 0, 576, 581, 586, 625, 0,
960	943	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
961		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	944	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
962	945	/* 43 - 720x576@100Hz 16:9 */
963	946	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
964	947	796, 864, 0, 576, 581, 586, 625, 0,
965	948	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
966		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	949	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
967	950	/* 44 - 720(1440)x576i@100Hz 4:3 */
968	951	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
969	952	795, 864, 0, 576, 580, 586, 625, 0,
970	953	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
971	954	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
972		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	955	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
973	956	/* 45 - 720(1440)x576i@100Hz 16:9 */
974	957	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
975	958	795, 864, 0, 576, 580, 586, 625, 0,
976	959	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
977	960	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
978		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	961	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
979	962	/* 46 - 1920x1080i@120Hz 16:9 */
980	963	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
981	964	2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
982	965	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC \|
983	966	DRM_MODE_FLAG_INTERLACE),
984		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	967	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
985	968	/* 47 - 1280x720@120Hz 16:9 */
986	969	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
987	970	1430, 1650, 0, 720, 725, 730, 750, 0,
988	971	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
989		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	972	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
990	973	/* 48 - 720x480@120Hz 4:3 */
991	974	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
992	975	798, 858, 0, 480, 489, 495, 525, 0,
993	976	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
994		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	977	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
995	978	/* 49 - 720x480@120Hz 16:9 */
996	979	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
997	980	798, 858, 0, 480, 489, 495, 525, 0,
998	981	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
999		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	982	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1000	983	/* 50 - 720(1440)x480i@120Hz 4:3 */
1001	984	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
1002	985	801, 858, 0, 480, 488, 494, 525, 0,
1003	986	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
1004	987	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
1005		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	988	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1006	989	/* 51 - 720(1440)x480i@120Hz 16:9 */
1007	990	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
1008	991	801, 858, 0, 480, 488, 494, 525, 0,
1009	992	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
1010	993	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
1011		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	994	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1012	995	/* 52 - 720x576@200Hz 4:3 */
1013	996	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
1014	997	796, 864, 0, 576, 581, 586, 625, 0,
1015	998	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
1016		- .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	999	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1017	1000	/* 53 - 720x576@200Hz 16:9 */
1018	1001	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
1019	1002	796, 864, 0, 576, 581, 586, 625, 0,
1020	1003	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
1021		- .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1004	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1022	1005	/* 54 - 720(1440)x576i@200Hz 4:3 */
1023	1006	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
1024	1007	795, 864, 0, 576, 580, 586, 625, 0,
1025	1008	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
1026	1009	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
1027		- .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	1010	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1028	1011	/* 55 - 720(1440)x576i@200Hz 16:9 */
1029	1012	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
1030	1013	795, 864, 0, 576, 580, 586, 625, 0,
1031	1014	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
1032	1015	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
1033		- .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1016	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1034	1017	/* 56 - 720x480@240Hz 4:3 */
1035	1018	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
1036	1019	798, 858, 0, 480, 489, 495, 525, 0,
1037	1020	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
1038		- .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	1021	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1039	1022	/* 57 - 720x480@240Hz 16:9 */
1040	1023	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
1041	1024	798, 858, 0, 480, 489, 495, 525, 0,
1042	1025	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC),
1043		- .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1026	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1044	1027	/* 58 - 720(1440)x480i@240Hz 4:3 */
1045	1028	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
1046	1029	801, 858, 0, 480, 488, 494, 525, 0,
1047	1030	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
1048	1031	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
1049		- .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
	1032	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
1050	1033	/* 59 - 720(1440)x480i@240Hz 16:9 */
1051	1034	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
1052	1035	801, 858, 0, 480, 488, 494, 525, 0,
1053	1036	DRM_MODE_FLAG_NHSYNC \| DRM_MODE_FLAG_NVSYNC \|
1054	1037	DRM_MODE_FLAG_INTERLACE \| DRM_MODE_FLAG_DBLCLK),
1055		- .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1038	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1056	1039	/* 60 - 1280x720@24Hz 16:9 */
1057	1040	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1058	1041	3080, 3300, 0, 720, 725, 730, 750, 0,
1059	1042	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1060		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1043	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1061	1044	/* 61 - 1280x720@25Hz 16:9 */
1062	1045	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1063	1046	3740, 3960, 0, 720, 725, 730, 750, 0,
1064	1047	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1065		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1048	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1066	1049	/* 62 - 1280x720@30Hz 16:9 */
1067	1050	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1068	1051	3080, 3300, 0, 720, 725, 730, 750, 0,
1069	1052	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1070		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1053	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1071	1054	/* 63 - 1920x1080@120Hz 16:9 */
1072	1055	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1073	1056	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1074	1057	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1075		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1058	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1076	1059	/* 64 - 1920x1080@100Hz 16:9 */
1077	1060	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1078	1061	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1079	1062	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1080		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1063	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1081	1064	/* 65 - 1280x720@24Hz 64:27 */
1082	1065	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
1083	1066	3080, 3300, 0, 720, 725, 730, 750, 0,
1084	1067	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1085		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1068	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1086	1069	/* 66 - 1280x720@25Hz 64:27 */
1087	1070	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
1088	1071	3740, 3960, 0, 720, 725, 730, 750, 0,
1089	1072	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1090		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1073	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1091	1074	/* 67 - 1280x720@30Hz 64:27 */
1092	1075	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
1093	1076	3080, 3300, 0, 720, 725, 730, 750, 0,
1094	1077	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1095		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1078	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1096	1079	/* 68 - 1280x720@50Hz 64:27 */
1097	1080	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
1098	1081	1760, 1980, 0, 720, 725, 730, 750, 0,
1099	1082	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1100		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1083	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1101	1084	/* 69 - 1280x720@60Hz 64:27 */
1102	1085	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
1103	1086	1430, 1650, 0, 720, 725, 730, 750, 0,
1104	1087	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1105		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1088	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1106	1089	/* 70 - 1280x720@100Hz 64:27 */
1107	1090	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
1108	1091	1760, 1980, 0, 720, 725, 730, 750, 0,
1109	1092	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1110		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1093	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1111	1094	/* 71 - 1280x720@120Hz 64:27 */
1112	1095	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
1113	1096	1430, 1650, 0, 720, 725, 730, 750, 0,
1114	1097	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1115		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1098	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1116	1099	/* 72 - 1920x1080@24Hz 64:27 */
1117	1100	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
1118	1101	2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1119	1102	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1120		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1103	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1121	1104	/* 73 - 1920x1080@25Hz 64:27 */
1122	1105	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
1123	1106	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1124	1107	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1125		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1108	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1126	1109	/* 74 - 1920x1080@30Hz 64:27 */
1127	1110	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
1128	1111	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1129	1112	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1130		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1113	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1131	1114	/* 75 - 1920x1080@50Hz 64:27 */
1132	1115	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
1133	1116	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1134	1117	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1135		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1118	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1136	1119	/* 76 - 1920x1080@60Hz 64:27 */
1137	1120	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
1138	1121	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1139	1122	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1140		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1123	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1141	1124	/* 77 - 1920x1080@100Hz 64:27 */
1142	1125	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
1143	1126	2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
1144	1127	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1145		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1128	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1146	1129	/* 78 - 1920x1080@120Hz 64:27 */
1147	1130	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
1148	1131	2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
1149	1132	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1150		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1133	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1151	1134	/* 79 - 1680x720@24Hz 64:27 */
1152	1135	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 3040,
1153	1136	3080, 3300, 0, 720, 725, 730, 750, 0,
1154	1137	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1155		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1138	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1156	1139	/* 80 - 1680x720@25Hz 64:27 */
1157	1140	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2908,
1158	1141	2948, 3168, 0, 720, 725, 730, 750, 0,
1159	1142	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1160		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1143	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1161	1144	/* 81 - 1680x720@30Hz 64:27 */
1162	1145	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 59400, 1680, 2380,
1163	1146	2420, 2640, 0, 720, 725, 730, 750, 0,
1164	1147	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1165		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1148	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1166	1149	/* 82 - 1680x720@50Hz 64:27 */
1167	1150	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 82500, 1680, 1940,
1168	1151	1980, 2200, 0, 720, 725, 730, 750, 0,
1169	1152	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1170		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1153	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1171	1154	/* 83 - 1680x720@60Hz 64:27 */
1172	1155	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 1940,
1173	1156	1980, 2200, 0, 720, 725, 730, 750, 0,
1174	1157	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1175		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1158	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1176	1159	/* 84 - 1680x720@100Hz 64:27 */
1177	1160	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 165000, 1680, 1740,
1178	1161	1780, 2000, 0, 720, 725, 730, 825, 0,
1179	1162	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1180		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1163	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1181	1164	/* 85 - 1680x720@120Hz 64:27 */
1182	1165	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 198000, 1680, 1740,
1183	1166	1780, 2000, 0, 720, 725, 730, 825, 0,
1184	1167	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1185		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1168	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1186	1169	/* 86 - 2560x1080@24Hz 64:27 */
1187	1170	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 99000, 2560, 3558,
1188	1171	3602, 3750, 0, 1080, 1084, 1089, 1100, 0,
1189	1172	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1190		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1173	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1191	1174	/* 87 - 2560x1080@25Hz 64:27 */
1192	1175	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 90000, 2560, 3008,
1193	1176	3052, 3200, 0, 1080, 1084, 1089, 1125, 0,
1194	1177	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1195		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1178	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1196	1179	/* 88 - 2560x1080@30Hz 64:27 */
1197	1180	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 118800, 2560, 3328,
1198	1181	3372, 3520, 0, 1080, 1084, 1089, 1125, 0,
1199	1182	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1200		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1183	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1201	1184	/* 89 - 2560x1080@50Hz 64:27 */
1202	1185	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 185625, 2560, 3108,
1203	1186	3152, 3300, 0, 1080, 1084, 1089, 1125, 0,
1204	1187	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1205		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1188	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1206	1189	/* 90 - 2560x1080@60Hz 64:27 */
1207	1190	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 2808,
1208	1191	2852, 3000, 0, 1080, 1084, 1089, 1100, 0,
1209	1192	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1210		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1193	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1211	1194	/* 91 - 2560x1080@100Hz 64:27 */
1212	1195	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 371250, 2560, 2778,
1213	1196	2822, 2970, 0, 1080, 1084, 1089, 1250, 0,
1214	1197	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1215		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1198	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1216	1199	/* 92 - 2560x1080@120Hz 64:27 */
1217	1200	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 495000, 2560, 3108,
1218	1201	3152, 3300, 0, 1080, 1084, 1089, 1250, 0,
1219	1202	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1220		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1203	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1221	1204	/* 93 - 3840x2160@24Hz 16:9 */
1222	1205	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1223	1206	5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1224	1207	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1225		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1208	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1226	1209	/* 94 - 3840x2160@25Hz 16:9 */
1227	1210	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1228	1211	4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1229	1212	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1230		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1213	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1231	1214	/* 95 - 3840x2160@30Hz 16:9 */
1232	1215	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1233	1216	4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1234	1217	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1235		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1218	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1236	1219	/* 96 - 3840x2160@50Hz 16:9 */
1237	1220	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1238	1221	4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1239	1222	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1240		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1223	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1241	1224	/* 97 - 3840x2160@60Hz 16:9 */
1242	1225	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1243	1226	4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1244	1227	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1245		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1228	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1246	1229	/* 98 - 4096x2160@24Hz 256:135 */
1247	1230	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5116,
1248	1231	5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1249	1232	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1250		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1233	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1251	1234	/* 99 - 4096x2160@25Hz 256:135 */
1252	1235	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 5064,
1253	1236	5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1254	1237	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1255		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1238	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1256	1239	/* 100 - 4096x2160@30Hz 256:135 */
1257	1240	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000, 4096, 4184,
1258	1241	4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1259	1242	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1260		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1243	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1261	1244	/* 101 - 4096x2160@50Hz 256:135 */
1262	1245	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5064,
1263	1246	5152, 5280, 0, 2160, 2168, 2178, 2250, 0,
1264	1247	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1265		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1248	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1266	1249	/* 102 - 4096x2160@60Hz 256:135 */
1267	1250	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 4184,
1268	1251	4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1269	1252	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1270		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1253	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1271	1254	/* 103 - 3840x2160@24Hz 64:27 */
1272	1255	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 5116,
1273	1256	5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1274	1257	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1275		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1258	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1276	1259	/* 104 - 3840x2160@25Hz 64:27 */
1277	1260	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4896,
1278	1261	4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1279	1262	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1280		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1263	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1281	1264	/* 105 - 3840x2160@30Hz 64:27 */
1282	1265	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000, 3840, 4016,
1283	1266	4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1284	1267	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1285		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1268	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1286	1269	/* 106 - 3840x2160@50Hz 64:27 */
1287	1270	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4896,
1288	1271	4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1289	1272	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1290		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1273	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1291	1274	/* 107 - 3840x2160@60Hz 64:27 */
1292	1275	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 4016,
1293	1276	4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1294	1277	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1295		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1278	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1296	1279	/* 108 - 1280x720@48Hz 16:9 */
1297	1280	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240,
1298	1281	2280, 2500, 0, 720, 725, 730, 750, 0,
1299	1282	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1300		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1283	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1301	1284	/* 109 - 1280x720@48Hz 64:27 */
1302	1285	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 90000, 1280, 2240,
1303	1286	2280, 2500, 0, 720, 725, 730, 750, 0,
1304	1287	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1305		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1288	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1306	1289	/* 110 - 1680x720@48Hz 64:27 */
1307	1290	{ DRM_MODE("1680x720", DRM_MODE_TYPE_DRIVER, 99000, 1680, 2490,
1308	1291	2530, 2750, 0, 720, 725, 730, 750, 0,
1309	1292	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1310		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1293	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1311	1294	/* 111 - 1920x1080@48Hz 16:9 */
1312	1295	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558,
1313	1296	2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1314	1297	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1315		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1298	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1316	1299	/* 112 - 1920x1080@48Hz 64:27 */
1317	1300	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2558,
1318	1301	2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
1319	1302	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1320		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1303	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1321	1304	/* 113 - 2560x1080@48Hz 64:27 */
1322	1305	{ DRM_MODE("2560x1080", DRM_MODE_TYPE_DRIVER, 198000, 2560, 3558,
1323	1306	3602, 3750, 0, 1080, 1084, 1089, 1100, 0,
1324	1307	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1325		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1308	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1326	1309	/* 114 - 3840x2160@48Hz 16:9 */
1327	1310	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116,
1328	1311	5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1329	1312	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1330		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1313	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1331	1314	/* 115 - 4096x2160@48Hz 256:135 */
1332	1315	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 594000, 4096, 5116,
1333	1316	5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1334	1317	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1335		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1318	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1336	1319	/* 116 - 3840x2160@48Hz 64:27 */
1337	1320	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 594000, 3840, 5116,
1338	1321	5204, 5500, 0, 2160, 2168, 2178, 2250, 0,
1339	1322	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1340		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1323	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1341	1324	/* 117 - 3840x2160@100Hz 16:9 */
1342	1325	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896,
1343	1326	4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1344	1327	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1345		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1328	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1346	1329	/* 118 - 3840x2160@120Hz 16:9 */
1347	1330	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016,
1348	1331	4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1349	1332	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1350		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1333	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1351	1334	/* 119 - 3840x2160@100Hz 64:27 */
1352	1335	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4896,
1353	1336	4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1354	1337	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1355		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1338	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1356	1339	/* 120 - 3840x2160@120Hz 64:27 */
1357	1340	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 1188000, 3840, 4016,
1358	1341	4104, 4400, 0, 2160, 2168, 2178, 2250, 0,
1359	1342	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1360		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1343	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1361	1344	/* 121 - 5120x2160@24Hz 64:27 */
1362	1345	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 7116,
1363	1346	7204, 7500, 0, 2160, 2168, 2178, 2200, 0,
1364	1347	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1365		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1348	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1366	1349	/* 122 - 5120x2160@25Hz 64:27 */
1367	1350	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 6816,
1368	1351	6904, 7200, 0, 2160, 2168, 2178, 2200, 0,
1369	1352	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1370		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1353	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1371	1354	/* 123 - 5120x2160@30Hz 64:27 */
1372	1355	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 396000, 5120, 5784,
1373	1356	5872, 6000, 0, 2160, 2168, 2178, 2200, 0,
1374	1357	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1375		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1358	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1376	1359	/* 124 - 5120x2160@48Hz 64:27 */
1377	1360	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5866,
1378	1361	5954, 6250, 0, 2160, 2168, 2178, 2475, 0,
1379	1362	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1380		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1363	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1381	1364	/* 125 - 5120x2160@50Hz 64:27 */
1382	1365	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 6216,
1383	1366	6304, 6600, 0, 2160, 2168, 2178, 2250, 0,
1384	1367	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1385		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1368	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1386	1369	/* 126 - 5120x2160@60Hz 64:27 */
1387	1370	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 742500, 5120, 5284,
1388	1371	5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
1389	1372	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1390		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1373	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1391	1374	/* 127 - 5120x2160@100Hz 64:27 */
1392	1375	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 6216,
1393	1376	6304, 6600, 0, 2160, 2168, 2178, 2250, 0,
1394	1377	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1395		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1378	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1396	1379	};
1397	1380
1398	1381	/*
..	..	@@ -1405,137 +1388,137 @@
1405	1388	{ DRM_MODE("5120x2160", DRM_MODE_TYPE_DRIVER, 1485000, 5120, 5284,
1406	1389	5372, 5500, 0, 2160, 2168, 2178, 2250, 0,
1407	1390	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1408		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1391	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1409	1392	/* 194 - 7680x4320@24Hz 16:9 */
1410	1393	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
1411	1394	10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
1412	1395	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1413		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1396	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1414	1397	/* 195 - 7680x4320@25Hz 16:9 */
1415	1398	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
1416	1399	10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
1417	1400	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1418		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1401	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1419	1402	/* 196 - 7680x4320@30Hz 16:9 */
1420	1403	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
1421	1404	8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
1422	1405	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1423		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1406	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1424	1407	/* 197 - 7680x4320@48Hz 16:9 */
1425	1408	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
1426	1409	10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
1427	1410	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1428		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1411	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1429	1412	/* 198 - 7680x4320@50Hz 16:9 */
1430	1413	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
1431	1414	10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
1432	1415	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1433		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1416	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1434	1417	/* 199 - 7680x4320@60Hz 16:9 */
1435	1418	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
1436	1419	8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
1437	1420	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1438		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1421	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1439	1422	/* 200 - 7680x4320@100Hz 16:9 */
1440	1423	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
1441	1424	9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
1442	1425	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1443		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1426	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1444	1427	/* 201 - 7680x4320@120Hz 16:9 */
1445	1428	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
1446	1429	8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
1447	1430	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1448		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
	1431	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1449	1432	/* 202 - 7680x4320@24Hz 64:27 */
1450	1433	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10232,
1451	1434	10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
1452	1435	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1453		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1436	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1454	1437	/* 203 - 7680x4320@25Hz 64:27 */
1455	1438	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 10032,
1456	1439	10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
1457	1440	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1458		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1441	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1459	1442	/* 204 - 7680x4320@30Hz 64:27 */
1460	1443	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 1188000, 7680, 8232,
1461	1444	8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
1462	1445	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1463		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1446	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1464	1447	/* 205 - 7680x4320@48Hz 64:27 */
1465	1448	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10232,
1466	1449	10408, 11000, 0, 4320, 4336, 4356, 4500, 0,
1467	1450	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1468		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1451	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1469	1452	/* 206 - 7680x4320@50Hz 64:27 */
1470	1453	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 10032,
1471	1454	10208, 10800, 0, 4320, 4336, 4356, 4400, 0,
1472	1455	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1473		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1456	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1474	1457	/* 207 - 7680x4320@60Hz 64:27 */
1475	1458	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 2376000, 7680, 8232,
1476	1459	8408, 9000, 0, 4320, 4336, 4356, 4400, 0,
1477	1460	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1478		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1461	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1479	1462	/* 208 - 7680x4320@100Hz 64:27 */
1480	1463	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 9792,
1481	1464	9968, 10560, 0, 4320, 4336, 4356, 4500, 0,
1482	1465	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1483		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1466	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1484	1467	/* 209 - 7680x4320@120Hz 64:27 */
1485	1468	{ DRM_MODE("7680x4320", DRM_MODE_TYPE_DRIVER, 4752000, 7680, 8032,
1486	1469	8208, 8800, 0, 4320, 4336, 4356, 4500, 0,
1487	1470	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1488		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1471	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1489	1472	/* 210 - 10240x4320@24Hz 64:27 */
1490	1473	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 11732,
1491	1474	11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
1492	1475	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1493		- .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1476	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1494	1477	/* 211 - 10240x4320@25Hz 64:27 */
1495	1478	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 12732,
1496	1479	12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
1497	1480	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1498		- .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1481	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1499	1482	/* 212 - 10240x4320@30Hz 64:27 */
1500	1483	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 1485000, 10240, 10528,
1501	1484	10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
1502	1485	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1503		- .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1486	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1504	1487	/* 213 - 10240x4320@48Hz 64:27 */
1505	1488	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 11732,
1506	1489	11908, 12500, 0, 4320, 4336, 4356, 4950, 0,
1507	1490	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1508		- .vrefresh = 48, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1491	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1509	1492	/* 214 - 10240x4320@50Hz 64:27 */
1510	1493	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 12732,
1511	1494	12908, 13500, 0, 4320, 4336, 4356, 4400, 0,
1512	1495	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1513		- .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1496	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1514	1497	/* 215 - 10240x4320@60Hz 64:27 */
1515	1498	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 2970000, 10240, 10528,
1516	1499	10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
1517	1500	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1518		- .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1501	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1519	1502	/* 216 - 10240x4320@100Hz 64:27 */
1520	1503	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 12432,
1521	1504	12608, 13200, 0, 4320, 4336, 4356, 4500, 0,
1522	1505	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1523		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1506	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1524	1507	/* 217 - 10240x4320@120Hz 64:27 */
1525	1508	{ DRM_MODE("10240x4320", DRM_MODE_TYPE_DRIVER, 5940000, 10240, 10528,
1526	1509	10704, 11000, 0, 4320, 4336, 4356, 4500, 0,
1527	1510	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1528		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
	1511	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_64_27, },
1529	1512	/* 218 - 4096x2160@100Hz 256:135 */
1530	1513	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4896,
1531	1514	4984, 5280, 0, 2160, 2168, 2178, 2250, 0,
1532	1515	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1533		- .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1516	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1534	1517	/* 219 - 4096x2160@120Hz 256:135 */
1535	1518	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 1188000, 4096, 4184,
1536	1519	4272, 4400, 0, 2160, 2168, 2178, 2250, 0,
1537	1520	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1538		- .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
	1521	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1539	1522	};
1540	1523
1541	1524	/*
..	..	@@ -1549,25 +1532,25 @@
1549	1532	3840, 4016, 4104, 4400, 0,
1550	1533	2160, 2168, 2178, 2250, 0,
1551	1534	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1552		- .vrefresh = 30, },
	1535	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1553	1536	/* 2 - 3840x2160@25Hz */
1554	1537	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1555	1538	3840, 4896, 4984, 5280, 0,
1556	1539	2160, 2168, 2178, 2250, 0,
1557	1540	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1558		- .vrefresh = 25, },
	1541	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1559	1542	/* 3 - 3840x2160@24Hz */
1560	1543	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1561	1544	3840, 5116, 5204, 5500, 0,
1562	1545	2160, 2168, 2178, 2250, 0,
1563	1546	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1564		- .vrefresh = 24, },
	1547	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1565	1548	/* 4 - 4096x2160@24Hz (SMPTE) */
1566	1549	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1567	1550	4096, 5116, 5204, 5500, 0,
1568	1551	2160, 2168, 2178, 2250, 0,
1569	1552	DRM_MODE_FLAG_PHSYNC \| DRM_MODE_FLAG_PVSYNC),
1570		- .vrefresh = 24, },
	1553	+ .picture_aspect_ratio = HDMI_PICTURE_ASPECT_256_135, },
1571	1554	};
1572	1555
1573	1556	/* DDC fetch and block validation */
..	..	@@ -1601,18 +1584,27 @@
1601	1584	MODULE_PARM_DESC(edid_fixup,
1602	1585	"Minimum number of valid EDID header bytes (0-8, default 6)");
1603	1586
1604		-static void drm_get_displayid(struct drm_connector *connector,
1605		- struct edid *edid);
1606	1587	static int validate_displayid(u8 *displayid, int length, int idx);
1607	1588
1608	1589	static int drm_edid_block_checksum(const u8 *raw_edid)
1609	1590	{
1610	1591	int i;
1611		- u8 csum = 0;
1612		- for (i = 0; i < EDID_LENGTH; i++)
	1592	+ u8 csum = 0, crc = 0;
	1593	+
	1594	+ for (i = 0; i < EDID_LENGTH - 1; i++)
1613	1595	csum += raw_edid[i];
1614	1596
1615		- return csum;
	1597	+ crc = 0x100 - csum;
	1598	+
	1599	+ return crc;
	1600	+}
	1601	+
	1602	+static bool drm_edid_block_checksum_diff(const u8 *raw_edid, u8 real_checksum)
	1603	+{
	1604	+ if (raw_edid[EDID_LENGTH - 1] != real_checksum)
	1605	+ return true;
	1606	+ else
	1607	+ return false;
1616	1608	}
1617	1609
1618	1610	static bool drm_edid_is_zero(const u8 *in_edid, int length)
..	..	@@ -1622,6 +1614,37 @@
1622	1614
1623	1615	return true;
1624	1616	}
	1617	+
	1618	+/**
	1619	+ * drm_edid_are_equal - compare two edid blobs.
	1620	+ * @edid1: pointer to first blob
	1621	+ * @edid2: pointer to second blob
	1622	+ * This helper can be used during probing to determine if
	1623	+ * edid had changed.
	1624	+ */
	1625	+bool drm_edid_are_equal(const struct edid edid1, const struct edid edid2)
	1626	+{
	1627	+ int edid1_len, edid2_len;
	1628	+ bool edid1_present = edid1 != NULL;
	1629	+ bool edid2_present = edid2 != NULL;
	1630	+
	1631	+ if (edid1_present != edid2_present)
	1632	+ return false;
	1633	+
	1634	+ if (edid1) {
	1635	+ edid1_len = EDID_LENGTH * (1 + edid1->extensions);
	1636	+ edid2_len = EDID_LENGTH * (1 + edid2->extensions);
	1637	+
	1638	+ if (edid1_len != edid2_len)
	1639	+ return false;
	1640	+
	1641	+ if (memcmp(edid1, edid2, edid1_len))
	1642	+ return false;
	1643	+ }
	1644	+
	1645	+ return true;
	1646	+}
	1647	+EXPORT_SYMBOL(drm_edid_are_equal);
1625	1648
1626	1649	/**
1627	1650	* drm_edid_block_valid - Sanity check the EDID block (base or extension)
..	..	@@ -1649,6 +1672,7 @@
1649	1672
1650	1673	if (block == 0) {
1651	1674	int score = drm_edid_header_is_valid(raw_edid);
	1675	+
1652	1676	if (score == 8) {
1653	1677	if (edid_corrupt)
1654	1678	*edid_corrupt = false;
..	..	@@ -1670,7 +1694,7 @@
1670	1694	}
1671	1695
1672	1696	csum = drm_edid_block_checksum(raw_edid);
1673		- if (csum) {
	1697	+ if (drm_edid_block_checksum_diff(raw_edid, csum)) {
1674	1698	if (edid_corrupt)
1675	1699	*edid_corrupt = true;
1676	1700
..	..	@@ -1811,13 +1835,25 @@
1811	1835	u8 *edid, int num_blocks)
1812	1836	{
1813	1837	int i;
	1838	+ u8 last_block;
1814	1839
1815		- if (connector->bad_edid_counter++ && !(drm_debug & DRM_UT_KMS))
	1840	+ /*
	1841	+ * 0x7e in the EDID is the number of extension blocks. The EDID
	1842	+ * is 1 (base block) + num_ext_blocks big. That means we can think
	1843	+ * of 0x7e in the EDID of the _index_ of the last block in the
	1844	+ * combined chunk of memory.
	1845	+ */
	1846	+ last_block = edid[0x7e];
	1847	+
	1848	+ /* Calculate real checksum for the last edid extension block data */
	1849	+ if (last_block < num_blocks)
	1850	+ connector->real_edid_checksum =
	1851	+ drm_edid_block_checksum(edid + last_block * EDID_LENGTH);
	1852	+
	1853	+ if (connector->bad_edid_counter++ && !drm_debug_enabled(DRM_UT_KMS))
1816	1854	return;
1817	1855
1818		- dev_warn(connector->dev->dev,
1819		- "%s: EDID is invalid:\n",
1820		- connector->name);
	1856	+ drm_warn(connector->dev, "%s: EDID is invalid:\n", connector->name);
1821	1857	for (i = 0; i < num_blocks; i++) {
1822	1858	u8 block = edid + i EDID_LENGTH;
1823	1859	char prefix[20];
..	..	@@ -1879,6 +1915,76 @@
1879	1915	}
1880	1916	EXPORT_SYMBOL(drm_add_override_edid_modes);
1881	1917
	1918	+#ifdef CONFIG_NO_GKI
	1919	+/*
	1920	+ * References:
	1921	+ * - CTA-861-H section 7.3.3 CTA Extension Version 3
	1922	+ */
	1923	+static int cea_db_collection_size(const u8 *cta)
	1924	+{
	1925	+ u8 d = cta[2];
	1926	+
	1927	+ if (d < 4 \|\| d > 127)
	1928	+ return 0;
	1929	+
	1930	+ return d - 4;
	1931	+}
	1932	+
	1933	+#define CTA_EXT_DB_HF_EEODB 0x78
	1934	+#define CTA_DB_EXTENDED_TAG 7
	1935	+
	1936	+static int cea_db_tag(const u8 *db);
	1937	+static int cea_db_payload_len(const u8 *db);
	1938	+static int cea_db_extended_tag(const u8 *db);
	1939	+
	1940	+static bool cea_db_is_extended_tag(const void *db, int tag)
	1941	+{
	1942	+ return cea_db_tag(db) == CTA_DB_EXTENDED_TAG &&
	1943	+ cea_db_payload_len(db) >= 1 &&
	1944	+ cea_db_extended_tag(db) == tag;
	1945	+}
	1946	+
	1947	+static bool cea_db_is_hdmi_forum_eeodb(const void *db)
	1948	+{
	1949	+ return cea_db_is_extended_tag(db, CTA_EXT_DB_HF_EEODB) &&
	1950	+ cea_db_payload_len(db) >= 2;
	1951	+}
	1952	+
	1953	+static int edid_hfeeodb_extension_block_count(const struct edid *edid)
	1954	+{
	1955	+ const u8 *cta;
	1956	+
	1957	+ /* No extensions according to base block, no HF-EEODB. */
	1958	+ if (!edid->extensions)
	1959	+ return 0;
	1960	+
	1961	+ /* HF-EEODB is always in the first EDID extension block only */
	1962	+ cta = (u8 )edid + EDID_LENGTH 1;
	1963	+ if (cta[0] != CEA_EXT \|\| cta[1] < 3)
	1964	+ return 0;
	1965	+
	1966	+ /* Need to have the data block collection, and at least 3 bytes. */
	1967	+ if (cea_db_collection_size(cta) < 3)
	1968	+ return 0;
	1969	+
	1970	+ /*
	1971	+ * Sinks that include the HF-EEODB in their E-EDID shall include one and
	1972	+ * only one instance of the HF-EEODB in the E-EDID, occupying bytes 4
	1973	+ * through 6 of Block 1 of the E-EDID.
	1974	+ */
	1975	+ if (!cea_db_is_hdmi_forum_eeodb(&cta[4]))
	1976	+ return 0;
	1977	+
	1978	+ return cta[4 + 2];
	1979	+}
	1980	+
	1981	+static int edid_hfeeodb_block_count(const struct edid *edid)
	1982	+{
	1983	+ int eeodb = edid_hfeeodb_extension_block_count(edid);
	1984	+
	1985	+ return eeodb ? eeodb + 1 : 0;
	1986	+}
	1987	+
1882	1988	/**
1883	1989	* drm_do_get_edid - get EDID data using a custom EDID block read function
1884	1990	* @connector: connector we're probing
..	..	@@ -1899,6 +2005,120 @@
1899	2005	*
1900	2006	* Return: Pointer to valid EDID or NULL if we couldn't find any.
1901	2007	*/
	2008	+struct edid drm_do_get_edid(struct drm_connector connector,
	2009	+ int (get_edid_block)(void data, u8 *buf, unsigned int block,
	2010	+ size_t len),
	2011	+ void *data)
	2012	+{
	2013	+ int i, j = 0, valid_extensions = 0, num_blocks, invalid_blocks = 0;
	2014	+ u8 edid, new;
	2015	+ struct edid *override;
	2016	+
	2017	+ override = drm_get_override_edid(connector);
	2018	+ if (override)
	2019	+ return override;
	2020	+
	2021	+ edid = kmalloc(EDID_LENGTH, GFP_KERNEL);
	2022	+ if (!edid)
	2023	+ return NULL;
	2024	+
	2025	+ /* base block fetch */
	2026	+ for (i = 0; i < 4; i++) {
	2027	+ if (get_edid_block(data, edid, 0, EDID_LENGTH))
	2028	+ goto out;
	2029	+ if (drm_edid_block_valid(edid, 0, false,
	2030	+ &connector->edid_corrupt))
	2031	+ break;
	2032	+ if (i == 0 && drm_edid_is_zero(edid, EDID_LENGTH)) {
	2033	+ connector->null_edid_counter++;
	2034	+ goto out;
	2035	+ }
	2036	+ }
	2037	+ if (i == 4)
	2038	+ goto out;
	2039	+
	2040	+ /* if there's no extensions, we're done */
	2041	+ valid_extensions = edid[0x7e];
	2042	+ if (valid_extensions == 0)
	2043	+ return (struct edid *)edid;
	2044	+
	2045	+ new = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
	2046	+ if (!new)
	2047	+ goto out;
	2048	+ edid = new;
	2049	+
	2050	+ num_blocks = edid[0x7e] + 1;
	2051	+
	2052	+ for (j = 1; j < num_blocks; j++) {
	2053	+ u8 block = edid + j EDID_LENGTH;
	2054	+
	2055	+ for (i = 0; i < 4; i++) {
	2056	+ if (get_edid_block(data, block, j, EDID_LENGTH))
	2057	+ goto out;
	2058	+ if (drm_edid_block_valid(block, j, false, NULL))
	2059	+ break;
	2060	+ }
	2061	+
	2062	+ if (i == 4)
	2063	+ invalid_blocks++;
	2064	+
	2065	+ if (j == 1) {
	2066	+ /*
	2067	+ * If the first EDID extension is a CTA extension, and
	2068	+ * the first Data Block is HF-EEODB, override the
	2069	+ * extension block count.
	2070	+ *
	2071	+ * Note: HF-EEODB could specify a smaller extension
	2072	+ * count too, but we can't risk allocating a smaller
	2073	+ * amount.
	2074	+ */
	2075	+ int eeodb = edid_hfeeodb_block_count((const struct edid *)edid);
	2076	+
	2077	+ if (eeodb > num_blocks) {
	2078	+ num_blocks = eeodb;
	2079	+ new = krealloc(edid, num_blocks * EDID_LENGTH, GFP_KERNEL);
	2080	+ if (!new)
	2081	+ goto out;
	2082	+ edid = new;
	2083	+ }
	2084	+ }
	2085	+ }
	2086	+
	2087	+ if (invalid_blocks) {
	2088	+ u8 *base;
	2089	+
	2090	+ connector_bad_edid(connector, edid, edid[0x7e] + 1);
	2091	+
	2092	+ new = kmalloc_array(valid_extensions + 1, EDID_LENGTH,
	2093	+ GFP_KERNEL);
	2094	+ if (!new)
	2095	+ goto out;
	2096	+
	2097	+ base = new;
	2098	+ for (i = 0; i <= edid[0x7e]; i++) {
	2099	+ u8 block = edid + i EDID_LENGTH;
	2100	+
	2101	+ if (!drm_edid_block_valid(block, i, false, NULL))
	2102	+ continue;
	2103	+
	2104	+ memcpy(base, block, EDID_LENGTH);
	2105	+ base += EDID_LENGTH;
	2106	+ }
	2107	+
	2108	+ new[EDID_LENGTH - 1] += new[0x7e] - valid_extensions;
	2109	+ new[0x7e] = valid_extensions;
	2110	+
	2111	+ kfree(edid);
	2112	+ edid = new;
	2113	+ }
	2114	+
	2115	+ return (struct edid *)edid;
	2116	+
	2117	+out:
	2118	+ kfree(edid);
	2119	+ return NULL;
	2120	+}
	2121	+#else
1902	2122	struct edid drm_do_get_edid(struct drm_connector connector,
1903	2123	int (get_edid_block)(void data, u8 *buf, unsigned int block,
1904	2124	size_t len),
..	..	@@ -1959,9 +2179,6 @@
1959	2179
1960	2180	connector_bad_edid(connector, edid, edid[0x7e] + 1);
1961	2181
1962		- edid[EDID_LENGTH-1] += edid[0x7e] - valid_extensions;
1963		- edid[0x7e] = valid_extensions;
1964		-
1965	2182	new = kmalloc_array(valid_extensions + 1, EDID_LENGTH,
1966	2183	GFP_KERNEL);
1967	2184	if (!new)
..	..	@@ -1978,6 +2195,9 @@
1978	2195	base += EDID_LENGTH;
1979	2196	}
1980	2197
	2198	+ new[EDID_LENGTH - 1] += new[0x7e] - valid_extensions;
	2199	+ new[0x7e] = valid_extensions;
	2200	+
1981	2201	kfree(edid);
1982	2202	edid = new;
1983	2203	}
..	..	@@ -1990,6 +2210,7 @@
1990	2210	kfree(edid);
1991	2211	return NULL;
1992	2212	}
	2213	+#endif
1993	2214	EXPORT_SYMBOL_GPL(drm_do_get_edid);
1994	2215
1995	2216	/**
..	..	@@ -2029,8 +2250,7 @@
2029	2250	return NULL;
2030	2251
2031	2252	edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
2032		- if (edid)
2033		- drm_get_displayid(connector, edid);
	2253	+ drm_connector_update_edid_property(connector, edid);
2034	2254	return edid;
2035	2255	}
2036	2256	EXPORT_SYMBOL(drm_get_edid);
..	..	@@ -2154,10 +2374,8 @@
2154	2374	if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
2155	2375	preferred_mode = cur_mode;
2156	2376
2157		- cur_vrefresh = cur_mode->vrefresh ?
2158		- cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
2159		- preferred_vrefresh = preferred_mode->vrefresh ?
2160		- preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
	2377	+ cur_vrefresh = drm_mode_vrefresh(cur_mode);
	2378	+ preferred_vrefresh = drm_mode_vrefresh(preferred_mode);
2161	2379	/* At a given size, try to get closest to target refresh */
2162	2380	if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
2163	2381	MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
..	..	@@ -2198,6 +2416,7 @@
2198	2416
2199	2417	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2200	2418	const struct drm_display_mode *ptr = &drm_dmt_modes[i];
	2419	+
2201	2420	if (hsize != ptr->hdisplay)
2202	2421	continue;
2203	2422	if (vsize != ptr->vdisplay)
..	..	@@ -2214,14 +2433,28 @@
2214	2433	}
2215	2434	EXPORT_SYMBOL(drm_mode_find_dmt);
2216	2435
	2436	+static bool is_display_descriptor(const u8 d[18], u8 tag)
	2437	+{
	2438	+ return d[0] == 0x00 && d[1] == 0x00 &&
	2439	+ d[2] == 0x00 && d[3] == tag;
	2440	+}
	2441	+
	2442	+static bool is_detailed_timing_descriptor(const u8 d[18])
	2443	+{
	2444	+ return d[0] != 0x00 \|\| d[1] != 0x00;
	2445	+}
	2446	+
2217	2447	typedef void detailed_cb(struct detailed_timing timing, void closure);
2218	2448
2219	2449	static void
2220	2450	cea_for_each_detailed_block(u8 ext, detailed_cb cb, void *closure)
2221	2451	{
2222		- int i, n = 0;
	2452	+ int i, n;
2223	2453	u8 d = ext[0x02];
2224	2454	u8 *det_base = ext + d;
	2455	+
	2456	+ if (d < 4 \|\| d > 127)
	2457	+ return;
2225	2458
2226	2459	n = (127 - d) / 18;
2227	2460	for (i = 0; i < n; i++)
..	..	@@ -2255,6 +2488,7 @@
2255	2488
2256	2489	for (i = 1; i <= raw_edid[0x7e]; i++) {
2257	2490	u8 ext = raw_edid + (i EDID_LENGTH);
	2491	+
2258	2492	switch (*ext) {
2259	2493	case CEA_EXT:
2260	2494	cea_for_each_detailed_block(ext, cb, closure);
..	..	@@ -2272,9 +2506,12 @@
2272	2506	is_rb(struct detailed_timing t, void data)
2273	2507	{
2274	2508	u8 r = (u8 )t;
2275		- if (r[3] == EDID_DETAIL_MONITOR_RANGE)
2276		- if (r[15] & 0x10)
2277		- (bool )data = true;
	2509	+
	2510	+ if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
	2511	+ return;
	2512	+
	2513	+ if (r[15] & 0x10)
	2514	+ (bool )data = true;
2278	2515	}
2279	2516
2280	2517	/* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
..	..	@@ -2283,6 +2520,7 @@
2283	2520	{
2284	2521	if (edid->revision >= 4) {
2285	2522	bool ret = false;
	2523	+
2286	2524	drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
2287	2525	return ret;
2288	2526	}
..	..	@@ -2294,7 +2532,11 @@
2294	2532	find_gtf2(struct detailed_timing t, void data)
2295	2533	{
2296	2534	u8 r = (u8 )t;
2297		- if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
	2535	+
	2536	+ if (!is_display_descriptor(r, EDID_DETAIL_MONITOR_RANGE))
	2537	+ return;
	2538	+
	2539	+ if (r[10] == 0x02)
2298	2540	(u8 *)data = r;
2299	2541	}
2300	2542
..	..	@@ -2303,6 +2545,7 @@
2303	2545	drm_gtf2_hbreak(struct edid *edid)
2304	2546	{
2305	2547	u8 *r = NULL;
	2548	+
2306	2549	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2307	2550	return r ? (r[12] * 2) : 0;
2308	2551	}
..	..	@@ -2311,6 +2554,7 @@
2311	2554	drm_gtf2_2c(struct edid *edid)
2312	2555	{
2313	2556	u8 *r = NULL;
	2557	+
2314	2558	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2315	2559	return r ? r[13] : 0;
2316	2560	}
..	..	@@ -2319,6 +2563,7 @@
2319	2563	drm_gtf2_m(struct edid *edid)
2320	2564	{
2321	2565	u8 *r = NULL;
	2566	+
2322	2567	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2323	2568	return r ? (r[15] << 8) + r[14] : 0;
2324	2569	}
..	..	@@ -2327,6 +2572,7 @@
2327	2572	drm_gtf2_k(struct edid *edid)
2328	2573	{
2329	2574	u8 *r = NULL;
	2575	+
2330	2576	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2331	2577	return r ? r[16] : 0;
2332	2578	}
..	..	@@ -2335,6 +2581,7 @@
2335	2581	drm_gtf2_2j(struct edid *edid)
2336	2582	{
2337	2583	u8 *r = NULL;
	2584	+
2338	2585	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
2339	2586	return r ? r[17] : 0;
2340	2587	}
..	..	@@ -2350,7 +2597,8 @@
2350	2597	return LEVEL_CVT;
2351	2598	if (drm_gtf2_hbreak(edid))
2352	2599	return LEVEL_GTF2;
2353		- return LEVEL_GTF;
	2600	+ if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
	2601	+ return LEVEL_GTF;
2354	2602	}
2355	2603	return LEVEL_DMT;
2356	2604	}
..	..	@@ -2365,6 +2613,14 @@
2365	2613	return (a == 0x00 && b == 0x00) \|\|
2366	2614	(a == 0x01 && b == 0x01) \|\|
2367	2615	(a == 0x20 && b == 0x20);
	2616	+}
	2617	+
	2618	+static int drm_mode_hsync(const struct drm_display_mode *mode)
	2619	+{
	2620	+ if (mode->htotal <= 0)
	2621	+ return 0;
	2622	+
	2623	+ return DIV_ROUND_CLOSEST(mode->clock, mode->htotal);
2368	2624	}
2369	2625
2370	2626	/**
..	..	@@ -2632,7 +2888,6 @@
2632	2888	}
2633	2889
2634	2890	mode->type = DRM_MODE_TYPE_DRIVER;
2635		- mode->vrefresh = drm_mode_vrefresh(mode);
2636	2891	drm_mode_set_name(mode);
2637	2892
2638	2893	return mode;
..	..	@@ -2778,6 +3033,7 @@
2778	3033
2779	3034	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2780	3035	const struct minimode *m = &extra_modes[i];
	3036	+
2781	3037	newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2782	3038	if (!newmode)
2783	3039	return modes;
..	..	@@ -2807,6 +3063,7 @@
2807	3063
2808	3064	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2809	3065	const struct minimode *m = &extra_modes[i];
	3066	+
2810	3067	newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2811	3068	if (!newmode)
2812	3069	return modes;
..	..	@@ -2832,13 +3089,13 @@
2832	3089	struct detailed_non_pixel *data = &timing->data.other_data;
2833	3090	struct detailed_data_monitor_range *range = &data->data.range;
2834	3091
2835		- if (data->type != EDID_DETAIL_MONITOR_RANGE)
	3092	+ if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
2836	3093	return;
2837	3094
2838	3095	closure->modes += drm_dmt_modes_for_range(closure->connector,
2839	3096	closure->edid,
2840	3097	timing);
2841		-
	3098	+
2842	3099	if (!version_greater(closure->edid, 1, 1))
2843	3100	return; /* GTF not defined yet */
2844	3101
..	..	@@ -2911,10 +3168,11 @@
2911	3168	do_established_modes(struct detailed_timing timing, void c)
2912	3169	{
2913	3170	struct detailed_mode_closure *closure = c;
2914		- struct detailed_non_pixel *data = &timing->data.other_data;
2915	3171
2916		- if (data->type == EDID_DETAIL_EST_TIMINGS)
2917		- closure->modes += drm_est3_modes(closure->connector, timing);
	3172	+ if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_EST_TIMINGS))
	3173	+ return;
	3174	+
	3175	+ closure->modes += drm_est3_modes(closure->connector, timing);
2918	3176	}
2919	3177
2920	3178	/**
..	..	@@ -2941,6 +3199,7 @@
2941	3199	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2942	3200	if (est_bits & (1<<i)) {
2943	3201	struct drm_display_mode *newmode;
	3202	+
2944	3203	newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2945	3204	if (newmode) {
2946	3205	drm_mode_probed_add(connector, newmode);
..	..	@@ -2963,19 +3222,19 @@
2963	3222	struct detailed_non_pixel *data = &timing->data.other_data;
2964	3223	struct drm_connector *connector = closure->connector;
2965	3224	struct edid *edid = closure->edid;
	3225	+ int i;
2966	3226
2967		- if (data->type == EDID_DETAIL_STD_MODES) {
2968		- int i;
2969		- for (i = 0; i < 6; i++) {
2970		- struct std_timing *std;
2971		- struct drm_display_mode *newmode;
	3227	+ if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_STD_MODES))
	3228	+ return;
2972	3229
2973		- std = &data->data.timings[i];
2974		- newmode = drm_mode_std(connector, edid, std);
2975		- if (newmode) {
2976		- drm_mode_probed_add(connector, newmode);
2977		- closure->modes++;
2978		- }
	3230	+ for (i = 0; i < 6; i++) {
	3231	+ struct std_timing *std = &data->data.timings[i];
	3232	+ struct drm_display_mode *newmode;
	3233	+
	3234	+ newmode = drm_mode_std(connector, edid, std);
	3235	+ if (newmode) {
	3236	+ drm_mode_probed_add(connector, newmode);
	3237	+ closure->modes++;
2979	3238	}
2980	3239	}
2981	3240	}
..	..	@@ -3028,7 +3287,8 @@
3028	3287	const u8 empty[3] = { 0, 0, 0 };
3029	3288
3030	3289	for (i = 0; i < 4; i++) {
3031		- int uninitialized_var(width), height;
	3290	+ int width, height;
	3291	+
3032	3292	cvt = &(timing->data.other_data.data.cvt[i]);
3033	3293
3034	3294	if (!memcmp(cvt->code, empty, 3))
..	..	@@ -3036,6 +3296,8 @@
3036	3296
3037	3297	height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
3038	3298	switch (cvt->code[1] & 0x0c) {
	3299	+ /* default - because compiler doesn't see that we've enumerated all cases */
	3300	+ default:
3039	3301	case 0x00:
3040	3302	width = height * 4 / 3;
3041	3303	break;
..	..	@@ -3070,15 +3332,16 @@
3070	3332	do_cvt_mode(struct detailed_timing timing, void c)
3071	3333	{
3072	3334	struct detailed_mode_closure *closure = c;
3073		- struct detailed_non_pixel *data = &timing->data.other_data;
3074	3335
3075		- if (data->type == EDID_DETAIL_CVT_3BYTE)
3076		- closure->modes += drm_cvt_modes(closure->connector, timing);
	3336	+ if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_CVT_3BYTE))
	3337	+ return;
	3338	+
	3339	+ closure->modes += drm_cvt_modes(closure->connector, timing);
3077	3340	}
3078	3341
3079	3342	static int
3080	3343	add_cvt_modes(struct drm_connector connector, struct edid edid)
3081		-{
	3344	+{
3082	3345	struct detailed_mode_closure closure = {
3083	3346	.connector = connector,
3084	3347	.edid = edid,
..	..	@@ -3100,27 +3363,28 @@
3100	3363	struct detailed_mode_closure *closure = c;
3101	3364	struct drm_display_mode *newmode;
3102	3365
3103		- if (timing->pixel_clock) {
3104		- newmode = drm_mode_detailed(closure->connector->dev,
3105		- closure->edid, timing,
3106		- closure->quirks);
3107		- if (!newmode)
3108		- return;
	3366	+ if (!is_detailed_timing_descriptor((const u8 *)timing))
	3367	+ return;
3109	3368
3110		- if (closure->preferred)
3111		- newmode->type \|= DRM_MODE_TYPE_PREFERRED;
	3369	+ newmode = drm_mode_detailed(closure->connector->dev,
	3370	+ closure->edid, timing,
	3371	+ closure->quirks);
	3372	+ if (!newmode)
	3373	+ return;
3112	3374
3113		- /*
3114		- * Detailed modes are limited to 10kHz pixel clock resolution,
3115		- * so fix up anything that looks like CEA/HDMI mode, but the clock
3116		- * is just slightly off.
3117		- */
3118		- fixup_detailed_cea_mode_clock(newmode);
	3375	+ if (closure->preferred)
	3376	+ newmode->type \|= DRM_MODE_TYPE_PREFERRED;
3119	3377
3120		- drm_mode_probed_add(closure->connector, newmode);
3121		- closure->modes++;
3122		- closure->preferred = false;
3123		- }
	3378	+ /*
	3379	+ * Detailed modes are limited to 10kHz pixel clock resolution,
	3380	+ * so fix up anything that looks like CEA/HDMI mode, but the clock
	3381	+ * is just slightly off.
	3382	+ */
	3383	+ fixup_detailed_cea_mode_clock(newmode);
	3384	+
	3385	+ drm_mode_probed_add(closure->connector, newmode);
	3386	+ closure->modes++;
	3387	+ closure->preferred = false;
3124	3388	}
3125	3389
3126	3390	/*
..	..	@@ -3148,21 +3412,16 @@
3148	3412
3149	3413	return closure.modes;
3150	3414	}
3151		-#define VIDEO_CAPABILITY_EXTENDED_DATA_BLOCK 0x0
	3415	+
3152	3416	#define AUDIO_BLOCK 0x01
3153	3417	#define VIDEO_BLOCK 0x02
3154	3418	#define VENDOR_BLOCK 0x03
3155	3419	#define SPEAKER_BLOCK 0x04
3156		-#define COLORIMETRY_DATA_BLOCK 0x5
3157		-#define COLORIMETRY_EXTENDED_DATA_BLOCK 0x05
3158	3420	#define HDR_STATIC_METADATA_BLOCK 0x6
3159	3421	#define USE_EXTENDED_TAG 0x07
3160	3422	#define EXT_VIDEO_CAPABILITY_BLOCK 0x00
3161	3423	#define EXT_VIDEO_DATA_BLOCK_420 0x0E
3162	3424	#define EXT_VIDEO_CAP_BLOCK_Y420CMDB 0x0F
3163		-#define VENDOR_SPECIFIC_VIDEO_DATA_BLOCK 0x01
3164		-#define VSVDB_HDR10_PLUS_IEEE_CODE 0x90848b
3165		-#define VSVDB_HDR10_PLUS_APP_VER_MASK 0x3
3166	3425	#define EDID_BASIC_AUDIO (1 << 6)
3167	3426	#define EDID_CEA_YCRCB444 (1 << 5)
3168	3427	#define EDID_CEA_YCRCB422 (1 << 4)
..	..	@@ -3171,7 +3430,41 @@
3171	3430	/*
3172	3431	* Search EDID for CEA extension block.
3173	3432	*/
3174		-static u8 drm_find_edid_extension(const struct edid edid, int ext_id)
	3433	+#ifdef CONFIG_NO_GKI
	3434	+static u8 drm_find_edid_extension(const struct edid edid,
	3435	+ int ext_id, int *ext_index)
	3436	+{
	3437	+ u8 *edid_ext = NULL;
	3438	+ int i;
	3439	+ int len;
	3440	+
	3441	+ /* No EDID or EDID extensions */
	3442	+ if (edid == NULL \|\| edid->extensions == 0)
	3443	+ return NULL;
	3444	+
	3445	+ if (edid_hfeeodb_extension_block_count(edid))
	3446	+ len = edid_hfeeodb_extension_block_count(edid);
	3447	+ else
	3448	+ len = edid->extensions;
	3449	+
	3450	+ /* Find CEA extension */
	3451	+ for (i = *ext_index; i < len; i++) {
	3452	+ edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
	3453	+
	3454	+ if (edid_ext[0] == ext_id)
	3455	+ break;
	3456	+ }
	3457	+
	3458	+ if (i >= len)
	3459	+ return NULL;
	3460	+
	3461	+ *ext_index = i + 1;
	3462	+
	3463	+ return edid_ext;
	3464	+}
	3465	+#else
	3466	+static u8 drm_find_edid_extension(const struct edid edid,
	3467	+ int ext_id, int *ext_index)
3175	3468	{
3176	3469	u8 *edid_ext = NULL;
3177	3470	int i;
..	..	@@ -3181,64 +3474,86 @@
3181	3474	return NULL;
3182	3475
3183	3476	/* Find CEA extension */
3184		- for (i = 0; i < edid->extensions; i++) {
	3477	+ for (i = *ext_index; i < edid->extensions; i++) {
3185	3478	edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
3186	3479	if (edid_ext[0] == ext_id)
3187	3480	break;
3188	3481	}
3189	3482
3190		- if (i == edid->extensions)
	3483	+ if (i >= edid->extensions)
3191	3484	return NULL;
	3485	+
	3486	+ *ext_index = i + 1;
3192	3487
3193	3488	return edid_ext;
3194	3489	}
	3490	+#endif
3195	3491
3196		-
3197		-static u8 drm_find_displayid_extension(const struct edid edid)
	3492	+static u8 drm_find_displayid_extension(const struct edid edid,
	3493	+ int length, int idx,
	3494	+ int *ext_index)
3198	3495	{
3199		- return drm_find_edid_extension(edid, DISPLAYID_EXT);
	3496	+ u8 *displayid = drm_find_edid_extension(edid, DISPLAYID_EXT, ext_index);
	3497	+ struct displayid_hdr *base;
	3498	+ int ret;
	3499	+
	3500	+ if (!displayid)
	3501	+ return NULL;
	3502	+
	3503	+ /* EDID extensions block checksum isn't for us */
	3504	+ *length = EDID_LENGTH - 1;
	3505	+ *idx = 1;
	3506	+
	3507	+ ret = validate_displayid(displayid, length, idx);
	3508	+ if (ret)
	3509	+ return NULL;
	3510	+
	3511	+ base = (struct displayid_hdr )&displayid[idx];
	3512	+ length = idx + sizeof(*base) + base->bytes;
	3513	+
	3514	+ return displayid;
3200	3515	}
3201	3516
3202	3517	static u8 drm_find_cea_extension(const struct edid edid)
3203	3518	{
3204		- int ret;
3205		- int idx = 1;
3206		- int length = EDID_LENGTH;
	3519	+ int length, idx;
3207	3520	struct displayid_block *block;
3208	3521	u8 *cea;
3209	3522	u8 *displayid;
	3523	+ int ext_index;
3210	3524
3211	3525	/* Look for a top level CEA extension block */
3212		- cea = drm_find_edid_extension(edid, CEA_EXT);
	3526	+ /* FIXME: make callers iterate through multiple CEA ext blocks? */
	3527	+ ext_index = 0;
	3528	+ cea = drm_find_edid_extension(edid, CEA_EXT, &ext_index);
3213	3529	if (cea)
3214	3530	return cea;
3215	3531
3216	3532	/* CEA blocks can also be found embedded in a DisplayID block */
3217		- displayid = drm_find_displayid_extension(edid);
3218		- if (!displayid)
3219		- return NULL;
	3533	+ ext_index = 0;
	3534	+ for (;;) {
	3535	+ displayid = drm_find_displayid_extension(edid, &length, &idx,
	3536	+ &ext_index);
	3537	+ if (!displayid)
	3538	+ return NULL;
3220	3539
3221		- ret = validate_displayid(displayid, length, idx);
3222		- if (ret)
3223		- return NULL;
3224		-
3225		- idx += sizeof(struct displayid_hdr);
3226		- for_each_displayid_db(displayid, block, idx, length) {
3227		- if (block->tag == DATA_BLOCK_CTA) {
3228		- cea = (u8 *)block;
3229		- break;
	3540	+ idx += sizeof(struct displayid_hdr);
	3541	+ for_each_displayid_db(displayid, block, idx, length) {
	3542	+ if (block->tag == DATA_BLOCK_CTA)
	3543	+ return (u8 *)block;
3230	3544	}
3231	3545	}
3232	3546
3233		- return cea;
	3547	+ return NULL;
3234	3548	}
3235	3549
3236		-static const struct drm_display_mode *cea_mode_for_vic(u8 vic)
	3550	+static __always_inline const struct drm_display_mode *cea_mode_for_vic(u8 vic)
3237	3551	{
3238		- if (!vic)
3239		- return NULL;
3240		- if (vic < ARRAY_SIZE(edid_cea_modes_0))
3241		- return &edid_cea_modes_0[vic];
	3552	+ BUILD_BUG_ON(1 + ARRAY_SIZE(edid_cea_modes_1) - 1 != 127);
	3553	+ BUILD_BUG_ON(193 + ARRAY_SIZE(edid_cea_modes_193) - 1 != 219);
	3554	+
	3555	+ if (vic >= 1 && vic < 1 + ARRAY_SIZE(edid_cea_modes_1))
	3556	+ return &edid_cea_modes_1[vic - 1];
3242	3557	if (vic >= 193 && vic < 193 + ARRAY_SIZE(edid_cea_modes_193))
3243	3558	return &edid_cea_modes_193[vic - 193];
3244	3559	return NULL;
..	..	@@ -3251,7 +3566,7 @@
3251	3566
3252	3567	static u8 cea_next_vic(u8 vic)
3253	3568	{
3254		- if (++vic == ARRAY_SIZE(edid_cea_modes_0))
	3569	+ if (++vic == 1 + ARRAY_SIZE(edid_cea_modes_1))
3255	3570	vic = 193;
3256	3571	return vic;
3257	3572	}
..	..	@@ -3265,7 +3580,7 @@
3265	3580	{
3266	3581	unsigned int clock = cea_mode->clock;
3267	3582
3268		- if (cea_mode->vrefresh % 6 != 0)
	3583	+ if (drm_mode_vrefresh(cea_mode) % 6 != 0)
3269	3584	return clock;
3270	3585
3271	3586	/*
..	..	@@ -3394,14 +3709,7 @@
3394	3709	return cea_mode_for_vic(vic) != NULL;
3395	3710	}
3396	3711
3397		-/**
3398		- * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
3399		- * the input VIC from the CEA mode list
3400		- * @video_code: ID given to each of the CEA modes
3401		- *
3402		- * Returns picture aspect ratio
3403		- */
3404		-enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
	3712	+static enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
3405	3713	{
3406	3714	const struct drm_display_mode *mode = cea_mode_for_vic(video_code);
3407	3715
..	..	@@ -3410,22 +3718,19 @@
3410	3718
3411	3719	return HDMI_PICTURE_ASPECT_NONE;
3412	3720	}
3413		-EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
	3721	+
	3722	+static enum hdmi_picture_aspect drm_get_hdmi_aspect_ratio(const u8 video_code)
	3723	+{
	3724	+ return edid_4k_modes[video_code].picture_aspect_ratio;
	3725	+}
3414	3726
3415	3727	/*
3416	3728	* Calculate the alternate clock for HDMI modes (those from the HDMI vendor
3417	3729	* specific block).
3418		- *
3419		- * It's almost like cea_mode_alternate_clock(), we just need to add an
3420		- * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
3421		- * one.
3422	3730	*/
3423	3731	static unsigned int
3424	3732	hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
3425	3733	{
3426		- if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
3427		- return hdmi_mode->clock;
3428		-
3429	3734	return cea_mode_alternate_clock(hdmi_mode);
3430	3735	}
3431	3736
..	..	@@ -3437,6 +3742,9 @@
3437	3742
3438	3743	if (!to_match->clock)
3439	3744	return 0;
	3745	+
	3746	+ if (to_match->picture_aspect_ratio)
	3747	+ match_flags \|= DRM_MODE_MATCH_ASPECT_RATIO;
3440	3748
3441	3749	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
3442	3750	const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
..	..	@@ -3472,6 +3780,9 @@
3472	3780
3473	3781	if (!to_match->clock)
3474	3782	return 0;
	3783	+
	3784	+ if (to_match->picture_aspect_ratio)
	3785	+ match_flags \|= DRM_MODE_MATCH_ASPECT_RATIO;
3475	3786
3476	3787	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
3477	3788	const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
..	..	@@ -3596,8 +3907,6 @@
3596	3907	if (!newmode)
3597	3908	return NULL;
3598	3909
3599		- newmode->vrefresh = 0;
3600		-
3601	3910	return newmode;
3602	3911	}
3603	3912
..	..	@@ -3658,6 +3967,34 @@
3658	3967	bitmap_set(hdmi->y420_cmdb_modes, vic, 1);
3659	3968	}
3660	3969
	3970	+/**
	3971	+ * drm_display_mode_from_cea_vic() - return a mode for CEA VIC
	3972	+ * @dev: DRM device
	3973	+ * @video_code: CEA VIC of the mode
	3974	+ *
	3975	+ * Creates a new mode matching the specified CEA VIC.
	3976	+ *
	3977	+ * Returns: A new drm_display_mode on success or NULL on failure
	3978	+ */
	3979	+struct drm_display_mode *
	3980	+drm_display_mode_from_cea_vic(struct drm_device *dev,
	3981	+ u8 video_code)
	3982	+{
	3983	+ const struct drm_display_mode *cea_mode;
	3984	+ struct drm_display_mode *newmode;
	3985	+
	3986	+ cea_mode = cea_mode_for_vic(video_code);
	3987	+ if (!cea_mode)
	3988	+ return NULL;
	3989	+
	3990	+ newmode = drm_mode_duplicate(dev, cea_mode);
	3991	+ if (!newmode)
	3992	+ return NULL;
	3993	+
	3994	+ return newmode;
	3995	+}
	3996	+EXPORT_SYMBOL(drm_display_mode_from_cea_vic);
	3997	+
3661	3998	static int
3662	3999	do_cea_modes(struct drm_connector connector, const u8 db, u8 len)
3663	4000	{
..	..	@@ -3666,6 +4003,7 @@
3666	4003
3667	4004	for (i = 0; i < len; i++) {
3668	4005	struct drm_display_mode *mode;
	4006	+
3669	4007	mode = drm_display_mode_from_vic_index(connector, db, len, i);
3670	4008	if (mode) {
3671	4009	/*
..	..	@@ -3978,6 +4316,13 @@
3978	4316	static int
3979	4317	cea_revision(const u8 *cea)
3980	4318	{
	4319	+ /*
	4320	+ * FIXME is this correct for the DispID variant?
	4321	+ * The DispID spec doesn't really specify whether
	4322	+ * this is the revision of the CEA extension or
	4323	+ * the DispID CEA data block. And the only value
	4324	+ * given as an example is 0.
	4325	+ */
3981	4326	return cea[1];
3982	4327	}
3983	4328
..	..	@@ -4002,6 +4347,10 @@
4002	4347	* no non-DTD data.
4003	4348	*/
4004	4349	if (cea[0] == DATA_BLOCK_CTA) {
	4350	+ /*
	4351	+ * for_each_displayid_db() has already verified
	4352	+ * that these stay within expected bounds.
	4353	+ */
4005	4354	*start = 3;
4006	4355	end = start + cea[2];
4007	4356	} else if (cea[0] == CEA_EXT) {
..	..	@@ -4013,7 +4362,7 @@
4013	4362	if (end < 4 \|\| end > 127)
4014	4363	return -ERANGE;
4015	4364	} else {
4016		- return -ENOTSUPP;
	4365	+ return -EOPNOTSUPP;
4017	4366	}
4018	4367
4019	4368	return 0;
..	..	@@ -4047,6 +4396,20 @@
4047	4396	oui = db[3] << 16 \| db[2] << 8 \| db[1];
4048	4397
4049	4398	return oui == HDMI_FORUM_IEEE_OUI;
	4399	+}
	4400	+
	4401	+static bool cea_db_is_vcdb(const u8 *db)
	4402	+{
	4403	+ if (cea_db_tag(db) != USE_EXTENDED_TAG)
	4404	+ return false;
	4405	+
	4406	+ if (cea_db_payload_len(db) != 2)
	4407	+ return false;
	4408	+
	4409	+ if (cea_db_extended_tag(db) != EXT_VIDEO_CAPABILITY_BLOCK)
	4410	+ return false;
	4411	+
	4412	+ return true;
4050	4413	}
4051	4414
4052	4415	static bool cea_db_is_y420cmdb(const u8 *db)
..	..	@@ -4121,55 +4484,6 @@
4121	4484	}
4122	4485
4123	4486	#ifdef CONFIG_NO_GKI
4124		-static int drm_find_all_edid_extension(const struct edid *edid,
4125		- int ext_id, int *ext_list)
4126		-{
4127		- u8 *edid_ext = NULL;
4128		- int i, count = 0;
4129		-
4130		- /* No EDID or EDID extensions */
4131		- if (edid == NULL \|\| edid->extensions == 0)
4132		- return -EINVAL;
4133		-
4134		- /* too many EDID extensions */
4135		- if (edid->extensions > 32)
4136		- return -EINVAL;
4137		-
4138		- /* Find CEA extension */
4139		- for (i = 0; i < edid->extensions; i++) {
4140		- edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
4141		- if (edid_ext[0] == ext_id) {
4142		- *ext_list = i;
4143		- ext_list++;
4144		- count++;
4145		- }
4146		- }
4147		-
4148		- return count;
4149		-}
4150		-
4151		-/*
4152		- * Search EDID for CEA extension block.
4153		- */
4154		-static u8 drm_find_edid_extension_from_index(const struct edid edid,
4155		- int ext_id, int *ext_index)
4156		-{
4157		- u8 *edid_ext = NULL;
4158		- int i;
4159		- /* No EDID or EDID extensions */
4160		- if (edid == NULL \|\| edid->extensions == 0)
4161		- return NULL;
4162		- /* Find CEA extension */
4163		- for (i = *ext_index; i < edid->extensions; i++) {
4164		- edid_ext = (u8 )edid + EDID_LENGTH (i + 1);
4165		- if (edid_ext[0] == ext_id)
4166		- break;
4167		- }
4168		- if (i >= edid->extensions)
4169		- return NULL;
4170		- *ext_index = i + 1;
4171		- return edid_ext;
4172		-}
4173	4487
4174	4488	static int
4175	4489	add_cea_modes(struct drm_connector connector, struct edid edid)
..	..	@@ -4179,12 +4493,16 @@
4179	4493	u8 dbl, hdmi_len, video_len = 0;
4180	4494	int i, count = 0, modes = 0;
4181	4495	int ext_index = 0;
4182		- int ext_list[32];
4183	4496
4184		- count = drm_find_all_edid_extension(edid, CEA_EXT, ext_list);
	4497	+ if (edid_hfeeodb_extension_block_count(edid))
	4498	+ count = edid_hfeeodb_extension_block_count(edid);
	4499	+ else
	4500	+ count = edid->extensions;
	4501	+
4185	4502	for (i = 0; i < count; i++) {
4186		- ext_index = ext_list[i];
4187		- cea = drm_find_edid_extension_from_index(edid, CEA_EXT, &ext_index);
	4503	+ ext_index = i;
	4504	+
	4505	+ cea = drm_find_edid_extension(edid, CEA_EXT, &ext_index);
4188	4506	if (cea && cea_revision(cea) >= 3) {
4189	4507	int i, start, end;
4190	4508
..	..	@@ -4318,28 +4636,6 @@
4318	4636	mode->clock = clock;
4319	4637	}
4320	4638
4321		-static bool cea_db_is_hdmi_colorimetry_data_block(const u8 *db)
4322		-{
4323		- if (cea_db_tag(db) != USE_EXTENDED_TAG)
4324		- return false;
4325		-
4326		- if (db[1] != COLORIMETRY_DATA_BLOCK)
4327		- return false;
4328		-
4329		- return true;
4330		-}
4331		-
4332		-static void
4333		-drm_parse_colorimetry_data_block(struct drm_connector connector, const u8 db)
4334		-{
4335		- struct drm_hdmi_info *info = &connector->display_info.hdmi;
4336		- u16 len;
4337		-
4338		- len = cea_db_payload_len(db);
4339		- /* As per CEA 861-G spec */
4340		- info->colorimetry = ((db[3] & (0x1 << 7)) << 1) \| db[2];
4341		-}
4342		-
4343	4639	static bool cea_db_is_hdmi_hdr_metadata_block(const u8 *db)
4344	4640	{
4345	4641	if (cea_db_tag(db) != USE_EXTENDED_TAG)
..	..	@@ -4420,396 +4716,13 @@
4420	4716	connector->audio_latency[1]);
4421	4717	}
4422	4718
4423		-/*
4424		- * drm_extract_vcdb_info - Parse the HDMI Video Capability Data Block
4425		- * @connector: connector corresponding to the HDMI sink
4426		- * @db: start of the CEA vendor specific block
4427		- *
4428		- * Parses the HDMI VCDB to extract sink info for @connector.
4429		- */
4430		-static void
4431		-drm_extract_vcdb_info(struct drm_connector connector, const u8 db)
4432		-{
4433		- /*
4434		- * Check if the sink specifies underscan
4435		- * support for:
4436		- * BIT 5: preferred video format
4437		- * BIT 3: IT video format
4438		- * BIT 1: CE video format
4439		- */
4440		-
4441		- connector->pt_scan_info =
4442		- (db[2] & (BIT(4) \| BIT(5))) >> 4;
4443		- connector->it_scan_info =
4444		- (db[2] & (BIT(3) \| BIT(2))) >> 2;
4445		- connector->ce_scan_info =
4446		- db[2] & (BIT(1) \| BIT(0));
4447		-
4448		- DRM_DEBUG_KMS("Scan Info (pt\|it\|ce): (%d\|%d\|%d)",
4449		- (int) connector->pt_scan_info,
4450		- (int) connector->it_scan_info,
4451		- (int) connector->ce_scan_info);
4452		-}
4453		-
4454		-static void
4455		-drm_parse_vsvdb_hdr_plus(struct drm_connector connector, const u8 db)
4456		-{
4457		- connector->hdr_plus_app_ver = db[5] & VSVDB_HDR10_PLUS_APP_VER_MASK;
4458		-}
4459		-
4460		-static void
4461		-drm_extract_vsvdb_info(struct drm_connector connector, const u8 db)
4462		-{
4463		- u8 db_len = cea_db_payload_len(db);
4464		- u32 ieee_code = 0;
4465		-
4466		- if (db_len < 5)
4467		- return;
4468		-
4469		- /* Bytes 2-4: IEEE 24-bit code, LSB first */
4470		- ieee_code = db[2] \| (db[3] << 8) \| (db[4] << 16);
4471		- DRM_DEBUG_KMS("found VSVDB with IEEE code 0x%x\n", ieee_code);
4472		- if (ieee_code == VSVDB_HDR10_PLUS_IEEE_CODE)
4473		- drm_parse_vsvdb_hdr_plus(connector, db);
4474		-}
4475		-
4476		-static bool drm_edid_is_luminance_value_present(
4477		-u32 block_length, enum luminance_value value)
4478		-{
4479		- return block_length > NO_LUMINANCE_DATA && value <= block_length;
4480		-}
4481		-
4482		-/*
4483		- * drm_extract_clrmetry_db - Parse the HDMI colorimetry extended block
4484		- * @connector: connector corresponding to the HDMI sink
4485		- * @db: start of the HDMI colorimetry extended block
4486		- *
4487		- * Parses the HDMI colorimetry block to extract sink info for @connector.
4488		- */
4489		-static void
4490		-drm_extract_clrmetry_db(struct drm_connector connector, const u8 db)
4491		-{
4492		-
4493		- if (!db) {
4494		- DRM_ERROR("invalid db\n");
4495		- return;
4496		- }
4497		-
4498		- /* Byte 3 Bit 0: xvYCC_601 */
4499		- if (db[2] & BIT(0))
4500		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_xvYCC_601;
4501		- /* Byte 3 Bit 1: xvYCC_709 */
4502		- if (db[2] & BIT(1))
4503		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_xvYCC_709;
4504		- /* Byte 3 Bit 2: sYCC_601 */
4505		- if (db[2] & BIT(2))
4506		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_sYCC_601;
4507		- /* Byte 3 Bit 3: ADBYCC_601 */
4508		- if (db[2] & BIT(3))
4509		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_ADBYCC_601;
4510		- /* Byte 3 Bit 4: ADB_RGB */
4511		- if (db[2] & BIT(4))
4512		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_ADB_RGB;
4513		- /* Byte 3 Bit 5: BT2020_CYCC */
4514		- if (db[2] & BIT(5))
4515		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_BT2020_CYCC;
4516		- /* Byte 3 Bit 6: BT2020_YCC */
4517		- if (db[2] & BIT(6))
4518		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_BT2020_YCC;
4519		- /* Byte 3 Bit 7: BT2020_RGB */
4520		- if (db[2] & BIT(7))
4521		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_BT2020_RGB;
4522		- /* Byte 4 Bit 7: DCI-P3 */
4523		- if (db[3] & BIT(7))
4524		- connector->color_enc_fmt \|= DRM_EDID_CLRMETRY_DCI_P3;
4525		-
4526		- DRM_DEBUG_KMS("colorimetry fmts = 0x%x\n", connector->color_enc_fmt);
4527		-}
4528		-
4529		-/*
4530		- * drm_extract_hdr_db - Parse the HDMI HDR extended block
4531		- * @connector: connector corresponding to the HDMI sink
4532		- * @db: start of the HDMI HDR extended block
4533		- *
4534		- * Parses the HDMI HDR extended block to extract sink info for @connector.
4535		- */
4536		-static void
4537		-drm_extract_hdr_db(struct drm_connector connector, const u8 db)
4538		-{
4539		-
4540		- u8 len = 0;
4541		-
4542		- if (!db)
4543		- return;
4544		-
4545		- len = db[0] & 0x1f;
4546		- /* Byte 3: Electro-Optical Transfer Functions */
4547		- connector->hdr_eotf = db[2] & 0x3F;
4548		-
4549		- /* Byte 4: Static Metadata Descriptor Type 1 */
4550		- connector->hdr_metadata_type_one = (db[3] & BIT(0));
4551		-
4552		- /* Byte 5: Desired Content Maximum Luminance */
4553		- if (drm_edid_is_luminance_value_present(len, MAXIMUM_LUMINANCE))
4554		- connector->hdr_max_luminance =
4555		- db[MAXIMUM_LUMINANCE];
4556		-
4557		- /* Byte 6: Desired Content Max Frame-average Luminance */
4558		- if (drm_edid_is_luminance_value_present(len, FRAME_AVERAGE_LUMINANCE))
4559		- connector->hdr_avg_luminance =
4560		- db[FRAME_AVERAGE_LUMINANCE];
4561		-
4562		- /* Byte 7: Desired Content Min Luminance */
4563		- if (drm_edid_is_luminance_value_present(len, MINIMUM_LUMINANCE))
4564		- connector->hdr_min_luminance =
4565		- db[MINIMUM_LUMINANCE];
4566		-
4567		- connector->hdr_supported = true;
4568		-
4569		- DRM_DEBUG_KMS("HDR electro-optical %d\n", connector->hdr_eotf);
4570		- DRM_DEBUG_KMS("metadata desc 1 %d\n", connector->hdr_metadata_type_one);
4571		- DRM_DEBUG_KMS("max luminance %d\n", connector->hdr_max_luminance);
4572		- DRM_DEBUG_KMS("avg luminance %d\n", connector->hdr_avg_luminance);
4573		- DRM_DEBUG_KMS("min luminance %d\n", connector->hdr_min_luminance);
4574		-}
4575		-/*
4576		- * drm_hdmi_extract_extended_blk_info - Parse the HDMI extended tag blocks
4577		- * @connector: connector corresponding to the HDMI sink
4578		- * @edid: handle to the EDID structure
4579		- * Parses the all extended tag blocks extract sink info for @connector.
4580		- */
4581		-static void
4582		-drm_hdmi_extract_extended_blk_info(struct drm_connector *connector,
4583		- const struct edid *edid)
4584		-{
4585		- const u8 *cea = drm_find_cea_extension(edid);
4586		- const u8 *db = NULL;
4587		-
4588		- if (cea && cea_revision(cea) >= 3) {
4589		- int i, start, end;
4590		-
4591		- if (cea_db_offsets(cea, &start, &end))
4592		- return;
4593		-
4594		- for_each_cea_db(cea, i, start, end) {
4595		- db = &cea[i];
4596		-
4597		- if (cea_db_tag(db) == USE_EXTENDED_TAG) {
4598		- DRM_DEBUG_KMS("found extended tag block = %d\n",
4599		- db[1]);
4600		- switch (db[1]) {
4601		- case VIDEO_CAPABILITY_EXTENDED_DATA_BLOCK:
4602		- drm_extract_vcdb_info(connector, db);
4603		- break;
4604		- case VENDOR_SPECIFIC_VIDEO_DATA_BLOCK:
4605		- drm_extract_vsvdb_info(connector, db);
4606		- break;
4607		- case HDR_STATIC_METADATA_BLOCK:
4608		- drm_extract_hdr_db(connector, db);
4609		- break;
4610		- case COLORIMETRY_EXTENDED_DATA_BLOCK:
4611		- drm_extract_clrmetry_db(connector, db);
4612		- break;
4613		- default:
4614		- break;
4615		- }
4616		- }
4617		- }
4618		- }
4619		-}
4620		-
4621		-static void
4622		-parse_hdmi_hf_vsdb(struct drm_connector connector, const u8 db)
4623		-{
4624		- u8 len = cea_db_payload_len(db);
4625		-
4626		- if (len < 7)
4627		- return;
4628		-
4629		- if (db[4] != 1)
4630		- return; /* invalid version */
4631		-
4632		- connector->max_tmds_char = db[5] * 5;
4633		- connector->scdc_present = db[6] & (1 << 7);
4634		- connector->rr_capable = db[6] & (1 << 6);
4635		- connector->flags_3d = db[6] & 0x7;
4636		- connector->supports_scramble = connector->scdc_present &&
4637		- (db[6] & (1 << 3));
4638		-
4639		- DRM_DEBUG_KMS(
4640		- "HDMI v2: max TMDS char %d, scdc %s, rr %s,3D flags 0x%x, scramble %s\n",
4641		- connector->max_tmds_char,
4642		- connector->scdc_present ? "available" : "not available",
4643		- connector->rr_capable ? "capable" : "not capable",
4644		- connector->flags_3d,
4645		- connector->supports_scramble ? "supported" : "not supported");
4646		-}
4647		-
4648		-static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
4649		- const u8 *db)
4650		-{
4651		- u8 dc_mask;
4652		- struct drm_hdmi_info *hdmi = &connector->display_info.hdmi;
4653		-
4654		- dc_mask = db[7] & DRM_EDID_YCBCR420_DC_MASK;
4655		- hdmi->y420_dc_modes = dc_mask;
4656		-}
4657		-
4658		-static
4659		-void drm_get_max_frl_rate(int max_frl_rate, u8 max_lanes, u8 max_rate_per_lane)
4660		-{
4661		- switch (max_frl_rate) {
4662		- case 1:
4663		- *max_lanes = 3;
4664		- *max_rate_per_lane = 3;
4665		- break;
4666		- case 2:
4667		- *max_lanes = 3;
4668		- *max_rate_per_lane = 6;
4669		- break;
4670		- case 3:
4671		- *max_lanes = 4;
4672		- *max_rate_per_lane = 6;
4673		- break;
4674		- case 4:
4675		- *max_lanes = 4;
4676		- *max_rate_per_lane = 8;
4677		- break;
4678		- case 5:
4679		- *max_lanes = 4;
4680		- *max_rate_per_lane = 10;
4681		- break;
4682		- case 6:
4683		- *max_lanes = 4;
4684		- *max_rate_per_lane = 12;
4685		- break;
4686		- case 0:
4687		- default:
4688		- *max_lanes = 0;
4689		- *max_rate_per_lane = 0;
4690		- }
4691		-}
4692		-
4693		-static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector,
4694		- const u8 *hf_vsdb)
4695		-{
4696		- struct drm_display_info *display = &connector->display_info;
4697		- struct drm_hdmi_info *hdmi = &display->hdmi;
4698		-
4699		- display->has_hdmi_infoframe = true;
4700		-
4701		- if (hf_vsdb[6] & 0x80) {
4702		- hdmi->scdc.supported = true;
4703		- if (hf_vsdb[6] & 0x40)
4704		- hdmi->scdc.read_request = true;
4705		- }
4706		-
4707		- /*
4708		- * All HDMI 2.0 monitors must support scrambling at rates > 340 MHz.
4709		- * And as per the spec, three factors confirm this:
4710		- * * Availability of a HF-VSDB block in EDID (check)
4711		- * * Non zero Max_TMDS_Char_Rate filed in HF-VSDB (let's check)
4712		- * * SCDC support available (let's check)
4713		- * Lets check it out.
4714		- */
4715		-
4716		- if (hf_vsdb[5]) {
4717		- /* max clock is 5000 KHz times block value */
4718		- u32 max_tmds_clock = hf_vsdb[5] * 5000;
4719		- struct drm_scdc *scdc = &hdmi->scdc;
4720		-
4721		- if (max_tmds_clock > 340000) {
4722		- display->max_tmds_clock = max_tmds_clock;
4723		- DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n",
4724		- display->max_tmds_clock);
4725		- }
4726		-
4727		- if (scdc->supported) {
4728		- scdc->scrambling.supported = true;
4729		-
4730		- /* Few sinks support scrambling for cloks < 340M */
4731		- if ((hf_vsdb[6] & 0x8))
4732		- scdc->scrambling.low_rates = true;
4733		- }
4734		- }
4735		-
4736		- if (hf_vsdb[7]) {
4737		- u8 max_frl_rate;
4738		- u8 dsc_max_frl_rate;
4739		- u8 dsc_max_slices;
4740		- struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
4741		-
4742		- DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
4743		- max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
4744		- drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
4745		- &hdmi->max_frl_rate_per_lane);
4746		- hdmi_dsc->v_1p2 = hf_vsdb[11] & DRM_EDID_DSC_1P2;
4747		-
4748		- if (hdmi_dsc->v_1p2) {
4749		- hdmi_dsc->native_420 = hf_vsdb[11] & DRM_EDID_DSC_NATIVE_420;
4750		- hdmi_dsc->all_bpp = hf_vsdb[11] & DRM_EDID_DSC_ALL_BPP;
4751		-
4752		- if (hf_vsdb[11] & DRM_EDID_DSC_16BPC)
4753		- hdmi_dsc->bpc_supported = 16;
4754		- else if (hf_vsdb[11] & DRM_EDID_DSC_12BPC)
4755		- hdmi_dsc->bpc_supported = 12;
4756		- else if (hf_vsdb[11] & DRM_EDID_DSC_10BPC)
4757		- hdmi_dsc->bpc_supported = 10;
4758		- else
4759		- hdmi_dsc->bpc_supported = 0;
4760		-
4761		- dsc_max_frl_rate = (hf_vsdb[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
4762		- drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
4763		- &hdmi_dsc->max_frl_rate_per_lane);
4764		- hdmi_dsc->total_chunk_kbytes = hf_vsdb[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
4765		-
4766		- dsc_max_slices = hf_vsdb[12] & DRM_EDID_DSC_MAX_SLICES;
4767		- switch (dsc_max_slices) {
4768		- case 1:
4769		- hdmi_dsc->max_slices = 1;
4770		- hdmi_dsc->clk_per_slice = 340;
4771		- break;
4772		- case 2:
4773		- hdmi_dsc->max_slices = 2;
4774		- hdmi_dsc->clk_per_slice = 340;
4775		- break;
4776		- case 3:
4777		- hdmi_dsc->max_slices = 4;
4778		- hdmi_dsc->clk_per_slice = 340;
4779		- break;
4780		- case 4:
4781		- hdmi_dsc->max_slices = 8;
4782		- hdmi_dsc->clk_per_slice = 340;
4783		- break;
4784		- case 5:
4785		- hdmi_dsc->max_slices = 8;
4786		- hdmi_dsc->clk_per_slice = 400;
4787		- break;
4788		- case 6:
4789		- hdmi_dsc->max_slices = 12;
4790		- hdmi_dsc->clk_per_slice = 400;
4791		- break;
4792		- case 7:
4793		- hdmi_dsc->max_slices = 16;
4794		- hdmi_dsc->clk_per_slice = 400;
4795		- break;
4796		- case 0:
4797		- default:
4798		- hdmi_dsc->max_slices = 0;
4799		- hdmi_dsc->clk_per_slice = 0;
4800		- }
4801		- }
4802		- }
4803		-
4804		- drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);
4805		- parse_hdmi_hf_vsdb(connector, hf_vsdb);
4806		-}
4807		-
4808	4719	static void
4809	4720	monitor_name(struct detailed_timing t, void data)
4810	4721	{
4811		- if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
4812		- (u8 *)data = t->data.other_data.data.str.str;
	4722	+ if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
	4723	+ return;
	4724	+
	4725	+ (u8 *)data = t->data.other_data.data.str.str;
4813	4726	}
4814	4727
4815	4728	static int get_monitor_name(struct edid *edid, char name[13])
..	..	@@ -4842,7 +4755,7 @@
4842	4755	{
4843	4756	int name_length;
4844	4757	char buf[13];
4845		-
	4758	+
4846	4759	if (bufsize <= 0)
4847	4760	return;
4848	4761
..	..	@@ -4907,6 +4820,7 @@
4907	4820
4908	4821	if (cea_revision(cea) >= 3) {
4909	4822	int i, start, end;
	4823	+ int sad_count;
4910	4824
4911	4825	if (cea_db_offsets(cea, &start, &end)) {
4912	4826	start = 0;
..	..	@@ -4918,8 +4832,6 @@
4918	4832	dbl = cea_db_payload_len(db);
4919	4833
4920	4834	switch (cea_db_tag(db)) {
4921		- int sad_count;
4922		-
4923	4835	case AUDIO_BLOCK:
4924	4836	/* Audio Data Block, contains SADs */
4925	4837	sad_count = min(dbl / 3, 15 - total_sad_count);
..	..	@@ -4937,10 +4849,6 @@
4937	4849	/* HDMI Vendor-Specific Data Block */
4938	4850	if (cea_db_is_hdmi_vsdb(db))
4939	4851	drm_parse_hdmi_vsdb_audio(connector, db);
4940		- /* HDMI Forum Vendor-Specific Data Block */
4941		- else if (cea_db_is_hdmi_forum_vsdb(db))
4942		- drm_parse_hdmi_forum_vsdb(connector,
4943		- db);
4944	4852	break;
4945	4853	default:
4946	4854	break;
..	..	@@ -4982,12 +4890,12 @@
4982	4890	cea = drm_find_cea_extension(edid);
4983	4891	if (!cea) {
4984	4892	DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
4985		- return -ENOENT;
	4893	+ return 0;
4986	4894	}
4987	4895
4988	4896	if (cea_revision(cea) < 3) {
4989	4897	DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
4990		- return -ENOTSUPP;
	4898	+ return 0;
4991	4899	}
4992	4900
4993	4901	if (cea_db_offsets(cea, &start, &end)) {
..	..	@@ -5000,6 +4908,7 @@
5000	4908
5001	4909	if (cea_db_tag(db) == AUDIO_BLOCK) {
5002	4910	int j;
	4911	+
5003	4912	dbl = cea_db_payload_len(db);
5004	4913
5005	4914	count = dbl / 3; /* SAD is 3B */
..	..	@@ -5043,12 +4952,12 @@
5043	4952	cea = drm_find_cea_extension(edid);
5044	4953	if (!cea) {
5045	4954	DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
5046		- return -ENOENT;
	4955	+ return 0;
5047	4956	}
5048	4957
5049	4958	if (cea_revision(cea) < 3) {
5050	4959	DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
5051		- return -ENOTSUPP;
	4960	+ return 0;
5052	4961	}
5053	4962
5054	4963	if (cea_db_offsets(cea, &start, &end)) {
..	..	@@ -5124,6 +5033,9 @@
5124	5033	*
5125	5034	* Parse the CEA extension according to CEA-861-B.
5126	5035	*
	5036	+ * Drivers that have added the modes parsed from EDID to drm_display_info
	5037	+ * should use &drm_display_info.is_hdmi instead of calling this function.
	5038	+ *
5127	5039	* Return: True if the monitor is HDMI, false if not or unknown.
5128	5040	*/
5129	5041	bool drm_detect_hdmi_monitor(struct edid *edid)
..	..	@@ -5175,7 +5087,8 @@
5175	5087	if (!edid_ext)
5176	5088	goto end;
5177	5089
5178		- has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
	5090	+ has_audio = (edid_ext[0] == CEA_EXT &&
	5091	+ (edid_ext[3] & EDID_BASIC_AUDIO) != 0);
5179	5092
5180	5093	if (has_audio) {
5181	5094	DRM_DEBUG_KMS("Monitor has basic audio support\n");
..	..	@@ -5199,41 +5112,6 @@
5199	5112	}
5200	5113	EXPORT_SYMBOL(drm_detect_monitor_audio);
5201	5114
5202		-/**
5203		- * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
5204		- * @edid: EDID block to scan
5205		- *
5206		- * Check whether the monitor reports the RGB quantization range selection
5207		- * as supported. The AVI infoframe can then be used to inform the monitor
5208		- * which quantization range (full or limited) is used.
5209		- *
5210		- * Return: True if the RGB quantization range is selectable, false otherwise.
5211		- */
5212		-bool drm_rgb_quant_range_selectable(struct edid *edid)
5213		-{
5214		- u8 *edid_ext;
5215		- int i, start, end;
5216		-
5217		- edid_ext = drm_find_cea_extension(edid);
5218		- if (!edid_ext)
5219		- return false;
5220		-
5221		- if (cea_db_offsets(edid_ext, &start, &end))
5222		- return false;
5223		-
5224		- for_each_cea_db(edid_ext, i, start, end) {
5225		- if (cea_db_tag(&edid_ext[i]) == USE_EXTENDED_TAG &&
5226		- cea_db_payload_len(&edid_ext[i]) == 2 &&
5227		- cea_db_extended_tag(&edid_ext[i]) ==
5228		- EXT_VIDEO_CAPABILITY_BLOCK) {
5229		- DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
5230		- return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
5231		- }
5232		- }
5233		-
5234		- return false;
5235		-}
5236		-EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
5237	5115
5238	5116	/**
5239	5117	* drm_default_rgb_quant_range - default RGB quantization range
..	..	@@ -5253,6 +5131,179 @@
5253	5131	HDMI_QUANTIZATION_RANGE_FULL;
5254	5132	}
5255	5133	EXPORT_SYMBOL(drm_default_rgb_quant_range);
	5134	+
	5135	+static void drm_parse_vcdb(struct drm_connector connector, const u8 db)
	5136	+{
	5137	+ struct drm_display_info *info = &connector->display_info;
	5138	+
	5139	+ DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", db[2]);
	5140	+
	5141	+ if (db[2] & EDID_CEA_VCDB_QS)
	5142	+ info->rgb_quant_range_selectable = true;
	5143	+}
	5144	+
	5145	+#ifdef CONFIG_NO_GKI
	5146	+static
	5147	+void drm_get_max_frl_rate(int max_frl_rate, u8 max_lanes, u8 max_rate_per_lane)
	5148	+{
	5149	+ switch (max_frl_rate) {
	5150	+ case 1:
	5151	+ *max_lanes = 3;
	5152	+ *max_rate_per_lane = 3;
	5153	+ break;
	5154	+ case 2:
	5155	+ *max_lanes = 3;
	5156	+ *max_rate_per_lane = 6;
	5157	+ break;
	5158	+ case 3:
	5159	+ *max_lanes = 4;
	5160	+ *max_rate_per_lane = 6;
	5161	+ break;
	5162	+ case 4:
	5163	+ *max_lanes = 4;
	5164	+ *max_rate_per_lane = 8;
	5165	+ break;
	5166	+ case 5:
	5167	+ *max_lanes = 4;
	5168	+ *max_rate_per_lane = 10;
	5169	+ break;
	5170	+ case 6:
	5171	+ *max_lanes = 4;
	5172	+ *max_rate_per_lane = 12;
	5173	+ break;
	5174	+ case 0:
	5175	+ default:
	5176	+ *max_lanes = 0;
	5177	+ *max_rate_per_lane = 0;
	5178	+ }
	5179	+}
	5180	+#endif
	5181	+
	5182	+static void drm_parse_ycbcr420_deep_color_info(struct drm_connector *connector,
	5183	+ const u8 *db)
	5184	+{
	5185	+ u8 dc_mask;
	5186	+ struct drm_hdmi_info *hdmi = &connector->display_info.hdmi;
	5187	+
	5188	+ dc_mask = db[7] & DRM_EDID_YCBCR420_DC_MASK;
	5189	+ hdmi->y420_dc_modes = dc_mask;
	5190	+}
	5191	+
	5192	+static void drm_parse_hdmi_forum_vsdb(struct drm_connector *connector,
	5193	+ const u8 *hf_vsdb)
	5194	+{
	5195	+ struct drm_display_info *display = &connector->display_info;
	5196	+ struct drm_hdmi_info *hdmi = &display->hdmi;
	5197	+
	5198	+ display->has_hdmi_infoframe = true;
	5199	+
	5200	+ if (hf_vsdb[6] & 0x80) {
	5201	+ hdmi->scdc.supported = true;
	5202	+ if (hf_vsdb[6] & 0x40)
	5203	+ hdmi->scdc.read_request = true;
	5204	+ }
	5205	+
	5206	+ /*
	5207	+ * All HDMI 2.0 monitors must support scrambling at rates > 340 MHz.
	5208	+ * And as per the spec, three factors confirm this:
	5209	+ * * Availability of a HF-VSDB block in EDID (check)
	5210	+ * * Non zero Max_TMDS_Char_Rate filed in HF-VSDB (let's check)
	5211	+ * * SCDC support available (let's check)
	5212	+ * Lets check it out.
	5213	+ */
	5214	+
	5215	+ if (hf_vsdb[5]) {
	5216	+ /* max clock is 5000 KHz times block value */
	5217	+ u32 max_tmds_clock = hf_vsdb[5] * 5000;
	5218	+ struct drm_scdc *scdc = &hdmi->scdc;
	5219	+
	5220	+ if (max_tmds_clock > 340000) {
	5221	+ display->max_tmds_clock = max_tmds_clock;
	5222	+ DRM_DEBUG_KMS("HF-VSDB: max TMDS clock %d kHz\n",
	5223	+ display->max_tmds_clock);
	5224	+ }
	5225	+
	5226	+ if (scdc->supported) {
	5227	+ scdc->scrambling.supported = true;
	5228	+
	5229	+ /* Few sinks support scrambling for clocks < 340M */
	5230	+ if ((hf_vsdb[6] & 0x8))
	5231	+ scdc->scrambling.low_rates = true;
	5232	+ }
	5233	+ }
	5234	+
	5235	+#ifdef CONFIG_NO_GKI
	5236	+ if (hf_vsdb[7]) {
	5237	+ u8 max_frl_rate;
	5238	+ u8 dsc_max_frl_rate;
	5239	+ u8 dsc_max_slices;
	5240	+ struct drm_hdmi_dsc_cap *hdmi_dsc = &hdmi->dsc_cap;
	5241	+
	5242	+ DRM_DEBUG_KMS("hdmi_21 sink detected. parsing edid\n");
	5243	+ max_frl_rate = (hf_vsdb[7] & DRM_EDID_MAX_FRL_RATE_MASK) >> 4;
	5244	+ drm_get_max_frl_rate(max_frl_rate, &hdmi->max_lanes,
	5245	+ &hdmi->max_frl_rate_per_lane);
	5246	+ hdmi_dsc->v_1p2 = hf_vsdb[11] & DRM_EDID_DSC_1P2;
	5247	+
	5248	+ if (hdmi_dsc->v_1p2) {
	5249	+ hdmi_dsc->native_420 = hf_vsdb[11] & DRM_EDID_DSC_NATIVE_420;
	5250	+ hdmi_dsc->all_bpp = hf_vsdb[11] & DRM_EDID_DSC_ALL_BPP;
	5251	+
	5252	+ if (hf_vsdb[11] & DRM_EDID_DSC_16BPC)
	5253	+ hdmi_dsc->bpc_supported = 16;
	5254	+ else if (hf_vsdb[11] & DRM_EDID_DSC_12BPC)
	5255	+ hdmi_dsc->bpc_supported = 12;
	5256	+ else if (hf_vsdb[11] & DRM_EDID_DSC_10BPC)
	5257	+ hdmi_dsc->bpc_supported = 10;
	5258	+ else
	5259	+ hdmi_dsc->bpc_supported = 0;
	5260	+
	5261	+ dsc_max_frl_rate = (hf_vsdb[12] & DRM_EDID_DSC_MAX_FRL_RATE_MASK) >> 4;
	5262	+ drm_get_max_frl_rate(dsc_max_frl_rate, &hdmi_dsc->max_lanes,
	5263	+ &hdmi_dsc->max_frl_rate_per_lane);
	5264	+ hdmi_dsc->total_chunk_kbytes = hf_vsdb[13] & DRM_EDID_DSC_TOTAL_CHUNK_KBYTES;
	5265	+
	5266	+ dsc_max_slices = hf_vsdb[12] & DRM_EDID_DSC_MAX_SLICES;
	5267	+ switch (dsc_max_slices) {
	5268	+ case 1:
	5269	+ hdmi_dsc->max_slices = 1;
	5270	+ hdmi_dsc->clk_per_slice = 340;
	5271	+ break;
	5272	+ case 2:
	5273	+ hdmi_dsc->max_slices = 2;
	5274	+ hdmi_dsc->clk_per_slice = 340;
	5275	+ break;
	5276	+ case 3:
	5277	+ hdmi_dsc->max_slices = 4;
	5278	+ hdmi_dsc->clk_per_slice = 340;
	5279	+ break;
	5280	+ case 4:
	5281	+ hdmi_dsc->max_slices = 8;
	5282	+ hdmi_dsc->clk_per_slice = 340;
	5283	+ break;
	5284	+ case 5:
	5285	+ hdmi_dsc->max_slices = 8;
	5286	+ hdmi_dsc->clk_per_slice = 400;
	5287	+ break;
	5288	+ case 6:
	5289	+ hdmi_dsc->max_slices = 12;
	5290	+ hdmi_dsc->clk_per_slice = 400;
	5291	+ break;
	5292	+ case 7:
	5293	+ hdmi_dsc->max_slices = 16;
	5294	+ hdmi_dsc->clk_per_slice = 400;
	5295	+ break;
	5296	+ case 0:
	5297	+ default:
	5298	+ hdmi_dsc->max_slices = 0;
	5299	+ hdmi_dsc->clk_per_slice = 0;
	5300	+ }
	5301	+ }
	5302	+ }
	5303	+#endif
	5304	+
	5305	+ drm_parse_ycbcr420_deep_color_info(connector, hf_vsdb);
	5306	+}
5256	5307
5257	5308	static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
5258	5309	const u8 *hdmi)
..	..	@@ -5299,7 +5350,6 @@
5299	5350
5300	5351	/* YCRCB444 is optional according to spec. */
5301	5352	if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
5302		- info->edid_hdmi_dc_modes \|= DRM_EDID_HDMI_DC_Y444;
5303	5353	DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
5304	5354	connector->name);
5305	5355	}
..	..	@@ -5319,6 +5369,8 @@
5319	5369	{
5320	5370	struct drm_display_info *info = &connector->display_info;
5321	5371	u8 len = cea_db_payload_len(db);
	5372	+
	5373	+ info->is_hdmi = true;
5322	5374
5323	5375	if (len >= 6)
5324	5376	info->dvi_dual = db[6] & 1;
..	..	@@ -5365,11 +5417,52 @@
5365	5417	drm_parse_hdmi_forum_vsdb(connector, db);
5366	5418	if (cea_db_is_y420cmdb(db))
5367	5419	drm_parse_y420cmdb_bitmap(connector, db);
	5420	+ if (cea_db_is_vcdb(db))
	5421	+ drm_parse_vcdb(connector, db);
5368	5422	if (cea_db_is_hdmi_hdr_metadata_block(db))
5369	5423	drm_parse_hdr_metadata_block(connector, db);
5370		- if (cea_db_is_hdmi_colorimetry_data_block(db))
5371		- drm_parse_colorimetry_data_block(connector, db);
5372	5424	}
	5425	+}
	5426	+
	5427	+static
	5428	+void get_monitor_range(struct detailed_timing *timing,
	5429	+ void *info_monitor_range)
	5430	+{
	5431	+ struct drm_monitor_range_info *monitor_range = info_monitor_range;
	5432	+ const struct detailed_non_pixel *data = &timing->data.other_data;
	5433	+ const struct detailed_data_monitor_range *range = &data->data.range;
	5434	+
	5435	+ if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
	5436	+ return;
	5437	+
	5438	+ /*
	5439	+ * Check for flag range limits only. If flag == 1 then
	5440	+ * no additional timing information provided.
	5441	+ * Default GTF, GTF Secondary curve and CVT are not
	5442	+ * supported
	5443	+ */
	5444	+ if (range->flags != DRM_EDID_RANGE_LIMITS_ONLY_FLAG)
	5445	+ return;
	5446	+
	5447	+ monitor_range->min_vfreq = range->min_vfreq;
	5448	+ monitor_range->max_vfreq = range->max_vfreq;
	5449	+}
	5450	+
	5451	+static
	5452	+void drm_get_monitor_range(struct drm_connector *connector,
	5453	+ const struct edid *edid)
	5454	+{
	5455	+ struct drm_display_info *info = &connector->display_info;
	5456	+
	5457	+ if (!version_greater(edid, 1, 1))
	5458	+ return;
	5459	+
	5460	+ drm_for_each_detailed_block((u8 *)edid, get_monitor_range,
	5461	+ &info->monitor_range);
	5462	+
	5463	+ DRM_DEBUG_KMS("Supported Monitor Refresh rate range is %d Hz - %d Hz\n",
	5464	+ info->monitor_range.min_vfreq,
	5465	+ info->monitor_range.max_vfreq);
5373	5466	}
5374	5467
5375	5468	/* A connector has no EDID information, so we've got no EDID to compute quirks from. Reset
..	..	@@ -5388,46 +5481,14 @@
5388	5481	info->cea_rev = 0;
5389	5482	info->max_tmds_clock = 0;
5390	5483	info->dvi_dual = false;
5391		- info->edid_hdmi_dc_modes = 0;
	5484	+ info->is_hdmi = false;
5392	5485	info->has_hdmi_infoframe = false;
	5486	+ info->rgb_quant_range_selectable = false;
5393	5487	memset(&info->hdmi, 0, sizeof(info->hdmi));
5394	5488
5395	5489	info->non_desktop = 0;
	5490	+ memset(&info->monitor_range, 0, sizeof(info->monitor_range));
5396	5491	}
5397		-
5398		-static void
5399		-drm_hdmi_extract_vsdbs_info(struct drm_connector *connector,
5400		- const struct edid *edid)
5401		-{
5402		- const u8 *cea = drm_find_cea_extension(edid);
5403		- const u8 *db = NULL;
5404		-
5405		- if (cea && cea_revision(cea) >= 3) {
5406		- int i, start, end;
5407		-
5408		- if (cea_db_offsets(cea, &start, &end))
5409		- return;
5410		-
5411		- for_each_cea_db(cea, i, start, end) {
5412		- db = &cea[i];
5413		-
5414		- if (cea_db_tag(db) == VENDOR_BLOCK) {
5415		- /* HDMI Vendor-Specific Data Block */
5416		- if (cea_db_is_hdmi_vsdb(db)) {
5417		- drm_parse_hdmi_vsdb_video(
5418		- connector, db);
5419		- drm_parse_hdmi_vsdb_audio(
5420		- connector, db);
5421		- }
5422		- /* HDMI Forum Vendor-Specific Data Block */
5423		- else if (cea_db_is_hdmi_forum_vsdb(db))
5424		- drm_parse_hdmi_forum_vsdb(connector,
5425		- db);
5426		- }
5427		- }
5428		- }
5429		-}
5430		-
5431	5492
5432	5493	u32 drm_add_display_info(struct drm_connector connector, const struct edid edid)
5433	5494	{
..	..	@@ -5442,9 +5503,9 @@
5442	5503
5443	5504	info->non_desktop = !!(quirks & EDID_QUIRK_NON_DESKTOP);
5444	5505
5445		- DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
	5506	+ drm_get_monitor_range(connector, edid);
5446	5507
5447		- memset(&info->hdmi, 0, sizeof(info->hdmi));
	5508	+ DRM_DEBUG_KMS("non_desktop set to %d\n", info->non_desktop);
5448	5509
5449	5510	if (edid->revision < 3)
5450	5511	return quirks;
..	..	@@ -5462,17 +5523,12 @@
5462	5523	* tells us to assume 8 bpc color depth if the EDID doesn't have
5463	5524	* extensions which tell otherwise.
5464	5525	*/
5465		- if ((info->bpc == 0) && (edid->revision < 4) &&
5466		- (edid->input & DRM_EDID_DIGITAL_TYPE_DVI)) {
	5526	+ if (info->bpc == 0 && edid->revision == 3 &&
	5527	+ edid->input & DRM_EDID_DIGITAL_DFP_1_X) {
5467	5528	info->bpc = 8;
5468	5529	DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
5469	5530	connector->name, info->bpc);
5470	5531	}
5471		-
5472		- /* Extract audio and video latency fields for the sink */
5473		- drm_hdmi_extract_vsdbs_info(connector, edid);
5474		- /* Extract info from extended tag blocks */
5475		- drm_hdmi_extract_extended_blk_info(connector, edid);
5476	5532
5477	5533	/* Only defined for 1.4 with digital displays */
5478	5534	if (edid->revision < 4)
..	..	@@ -5515,7 +5571,7 @@
5515	5571
5516	5572	static int validate_displayid(u8 *displayid, int length, int idx)
5517	5573	{
5518		- int i;
	5574	+ int i, dispid_length;
5519	5575	u8 csum = 0;
5520	5576	struct displayid_hdr *base;
5521	5577
..	..	@@ -5524,15 +5580,18 @@
5524	5580	DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
5525	5581	base->rev, base->bytes, base->prod_id, base->ext_count);
5526	5582
5527		- if (base->bytes + 5 > length - idx)
	5583	+ /* +1 for DispID checksum */
	5584	+ dispid_length = sizeof(*base) + base->bytes + 1;
	5585	+ if (dispid_length > length - idx)
5528	5586	return -EINVAL;
5529		- for (i = idx; i <= base->bytes + 5; i++) {
5530		- csum += displayid[i];
5531		- }
	5587	+
	5588	+ for (i = 0; i < dispid_length; i++)
	5589	+ csum += displayid[idx + i];
5532	5590	if (csum) {
5533	5591	DRM_NOTE("DisplayID checksum invalid, remainder is %d\n", csum);
5534	5592	return -EINVAL;
5535	5593	}
	5594	+
5536	5595	return 0;
5537	5596	}
5538	5597
..	..	@@ -5553,6 +5612,7 @@
5553	5612	unsigned vsync_width = (timings->vsw[0] \| timings->vsw[1] << 8) + 1;
5554	5613	bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
5555	5614	bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
	5615	+
5556	5616	mode = drm_mode_create(dev);
5557	5617	if (!mode)
5558	5618	return NULL;
..	..	@@ -5575,7 +5635,6 @@
5575	5635
5576	5636	if (timings->flags & 0x80)
5577	5637	mode->type \|= DRM_MODE_TYPE_PREFERRED;
5578		- mode->vrefresh = drm_mode_vrefresh(mode);
5579	5638	drm_mode_set_name(mode);
5580	5639
5581	5640	return mode;
..	..	@@ -5611,32 +5670,27 @@
5611	5670	struct edid *edid)
5612	5671	{
5613	5672	u8 *displayid;
5614		- int ret;
5615		- int idx = 1;
5616		- int length = EDID_LENGTH;
	5673	+ int length, idx;
5617	5674	struct displayid_block *block;
5618	5675	int num_modes = 0;
	5676	+ int ext_index = 0;
5619	5677
5620		- displayid = drm_find_displayid_extension(edid);
5621		- if (!displayid)
5622		- return 0;
5623		-
5624		- ret = validate_displayid(displayid, length, idx);
5625		- if (ret)
5626		- return 0;
5627		-
5628		- idx += sizeof(struct displayid_hdr);
5629		- while (block = (struct displayid_block *)&displayid[idx],
5630		- idx + sizeof(struct displayid_block) <= length &&
5631		- idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
5632		- block->num_bytes > 0) {
5633		- idx += block->num_bytes + sizeof(struct displayid_block);
5634		- switch (block->tag) {
5635		- case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
5636		- num_modes += add_displayid_detailed_1_modes(connector, block);
	5678	+ for (;;) {
	5679	+ displayid = drm_find_displayid_extension(edid, &length, &idx,
	5680	+ &ext_index);
	5681	+ if (!displayid)
5637	5682	break;
	5683	+
	5684	+ idx += sizeof(struct displayid_hdr);
	5685	+ for_each_displayid_db(displayid, block, idx, length) {
	5686	+ switch (block->tag) {
	5687	+ case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
	5688	+ num_modes += add_displayid_detailed_1_modes(connector, block);
	5689	+ break;
	5690	+ }
5638	5691	}
5639	5692	}
	5693	+
5640	5694	return num_modes;
5641	5695	}
5642	5696
..	..	@@ -5662,7 +5716,7 @@
5662	5716	}
5663	5717	if (!drm_edid_is_valid(edid)) {
5664	5718	clear_eld(connector);
5665		- dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
	5719	+ drm_warn(connector->dev, "%s: EDID invalid.\n",
5666	5720	connector->name);
5667	5721	return 0;
5668	5722	}
..	..	@@ -5745,6 +5799,7 @@
5745	5799
5746	5800	for (i = 0; i < count; i++) {
5747	5801	const struct drm_display_mode *ptr = &drm_dmt_modes[i];
	5802	+
5748	5803	if (hdisplay && vdisplay) {
5749	5804	/*
5750	5805	* Only when two are valid, they will be used to check
..	..	@@ -5789,6 +5844,19 @@
5789	5844	}
5790	5845	EXPORT_SYMBOL(drm_set_preferred_mode);
5791	5846
	5847	+static bool is_hdmi2_sink(const struct drm_connector *connector)
	5848	+{
	5849	+ /*
	5850	+ * FIXME: sil-sii8620 doesn't have a connector around when
	5851	+ * we need one, so we have to be prepared for a NULL connector.
	5852	+ */
	5853	+ if (!connector)
	5854	+ return true;
	5855	+
	5856	+ return connector->display_info.hdmi.scdc.supported \|\|
	5857	+ connector->display_info.color_formats & DRM_COLOR_FORMAT_YCRCB420;
	5858	+}
	5859	+
5792	5860	static inline bool is_eotf_supported(u8 output_eotf, u8 sink_eotf)
5793	5861	{
5794	5862	return sink_eotf & BIT(output_eotf);
..	..	@@ -5798,7 +5866,7 @@
5798	5866	* drm_hdmi_infoframe_set_hdr_metadata() - fill an HDMI DRM infoframe with
5799	5867	* HDR metadata from userspace
5800	5868	* @frame: HDMI DRM infoframe
5801		- * @hdr_metadata: hdr_source_metadata info from userspace
	5869	+ * @conn_state: Connector state containing HDR metadata
5802	5870	*
5803	5871	* Return: 0 on success or a negative error code on failure.
5804	5872	*/
..	..	@@ -5861,56 +5929,79 @@
5861	5929	}
5862	5930	EXPORT_SYMBOL(drm_hdmi_infoframe_set_hdr_metadata);
5863	5931
5864		-/**
5865		- * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
5866		- * data from a DRM display mode
5867		- * @frame: HDMI AVI infoframe
5868		- * @mode: DRM display mode
5869		- * @is_hdmi2_sink: Sink is HDMI 2.0 compliant
5870		- *
5871		- * Return: 0 on success or a negative error code on failure.
5872		- */
5873		-int
5874		-drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
5875		- const struct drm_display_mode *mode,
5876		- bool is_hdmi2_sink)
	5932	+static u8 drm_mode_hdmi_vic(const struct drm_connector *connector,
	5933	+ const struct drm_display_mode *mode)
5877	5934	{
5878		- enum hdmi_picture_aspect picture_aspect;
5879		- int err;
	5935	+ bool has_hdmi_infoframe = connector ?
	5936	+ connector->display_info.has_hdmi_infoframe : false;
5880	5937
5881		- if (!frame \|\| !mode)
5882		- return -EINVAL;
	5938	+ if (!has_hdmi_infoframe)
	5939	+ return 0;
5883	5940
5884		- err = hdmi_avi_infoframe_init(frame);
5885		- if (err < 0)
5886		- return err;
	5941	+ /* No HDMI VIC when signalling 3D video format */
	5942	+ if (mode->flags & DRM_MODE_FLAG_3D_MASK)
	5943	+ return 0;
5887	5944
5888		- if (mode->flags & DRM_MODE_FLAG_DBLCLK)
5889		- frame->pixel_repeat = 1;
	5945	+ return drm_match_hdmi_mode(mode);
	5946	+}
5890	5947
5891		- frame->video_code = drm_match_cea_mode(mode);
5892		-
5893		- /*
5894		- * HDMI 1.4 VIC range: 1 <= VIC <= 64 (CEA-861-D) but
5895		- * HDMI 2.0 VIC range: 1 <= VIC <= 107 (CEA-861-F). So we
5896		- * have to make sure we dont break HDMI 1.4 sinks.
5897		- */
5898		- if (!is_hdmi2_sink && frame->video_code > 64)
5899		- frame->video_code = 0;
5900		-
	5948	+static u8 drm_mode_cea_vic(const struct drm_connector *connector,
	5949	+ const struct drm_display_mode *mode)
	5950	+{
5901	5951	/*
5902	5952	* HDMI spec says if a mode is found in HDMI 1.4b 4K modes
5903	5953	* we should send its VIC in vendor infoframes, else send the
5904	5954	* VIC in AVI infoframes. Lets check if this mode is present in
5905	5955	* HDMI 1.4b 4K modes
5906	5956	*/
5907		- if (frame->video_code) {
5908		- u8 vendor_if_vic = drm_match_hdmi_mode(mode);
5909		- bool is_s3d = mode->flags & DRM_MODE_FLAG_3D_MASK;
	5957	+ if (drm_mode_hdmi_vic(connector, mode))
	5958	+ return 0;
5910	5959
5911		- if (drm_valid_hdmi_vic(vendor_if_vic) && !is_s3d)
5912		- frame->video_code = 0;
5913		- }
	5960	+ return drm_match_cea_mode(mode);
	5961	+}
	5962	+
	5963	+/*
	5964	+ * Avoid sending VICs defined in HDMI 2.0 in AVI infoframes to sinks that
	5965	+ * conform to HDMI 1.4.
	5966	+ *
	5967	+ * HDMI 1.4 (CTA-861-D) VIC range: [1..64]
	5968	+ * HDMI 2.0 (CTA-861-F) VIC range: [1..107]
	5969	+ */
	5970	+static u8 vic_for_avi_infoframe(const struct drm_connector *connector, u8 vic)
	5971	+{
	5972	+ if (!is_hdmi2_sink(connector) && vic > 64)
	5973	+ return 0;
	5974	+
	5975	+ return vic;
	5976	+}
	5977	+
	5978	+/**
	5979	+ * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
	5980	+ * data from a DRM display mode
	5981	+ * @frame: HDMI AVI infoframe
	5982	+ * @connector: the connector
	5983	+ * @mode: DRM display mode
	5984	+ *
	5985	+ * Return: 0 on success or a negative error code on failure.
	5986	+ */
	5987	+int
	5988	+drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
	5989	+ const struct drm_connector *connector,
	5990	+ const struct drm_display_mode *mode)
	5991	+{
	5992	+ enum hdmi_picture_aspect picture_aspect;
	5993	+ u8 vic, hdmi_vic;
	5994	+
	5995	+ if (!frame \|\| !mode)
	5996	+ return -EINVAL;
	5997	+
	5998	+ hdmi_avi_infoframe_init(frame);
	5999	+
	6000	+ if (mode->flags & DRM_MODE_FLAG_DBLCLK)
	6001	+ frame->pixel_repeat = 1;
	6002	+
	6003	+ vic = drm_mode_cea_vic(connector, mode);
	6004	+ hdmi_vic = drm_mode_hdmi_vic(connector, mode);
5914	6005
5915	6006	frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
5916	6007
..	..	@@ -5924,11 +6015,15 @@
5924	6015
5925	6016	/*
5926	6017	* Populate picture aspect ratio from either
5927		- * user input (if specified) or from the CEA mode list.
	6018	+ * user input (if specified) or from the CEA/HDMI mode lists.
5928	6019	*/
5929	6020	picture_aspect = mode->picture_aspect_ratio;
5930		- if (picture_aspect == HDMI_PICTURE_ASPECT_NONE)
5931		- picture_aspect = drm_get_cea_aspect_ratio(frame->video_code);
	6021	+ if (picture_aspect == HDMI_PICTURE_ASPECT_NONE) {
	6022	+ if (vic)
	6023	+ picture_aspect = drm_get_cea_aspect_ratio(vic);
	6024	+ else if (hdmi_vic)
	6025	+ picture_aspect = drm_get_hdmi_aspect_ratio(hdmi_vic);
	6026	+ }
5932	6027
5933	6028	/*
5934	6029	* The infoframe can't convey anything but none, 4:3
..	..	@@ -5936,12 +6031,20 @@
5936	6031	* we can only satisfy it by specifying the right VIC.
5937	6032	*/
5938	6033	if (picture_aspect > HDMI_PICTURE_ASPECT_16_9) {
5939		- if (picture_aspect !=
5940		- drm_get_cea_aspect_ratio(frame->video_code))
	6034	+ if (vic) {
	6035	+ if (picture_aspect != drm_get_cea_aspect_ratio(vic))
	6036	+ return -EINVAL;
	6037	+ } else if (hdmi_vic) {
	6038	+ if (picture_aspect != drm_get_hdmi_aspect_ratio(hdmi_vic))
	6039	+ return -EINVAL;
	6040	+ } else {
5941	6041	return -EINVAL;
	6042	+ }
	6043	+
5942	6044	picture_aspect = HDMI_PICTURE_ASPECT_NONE;
5943	6045	}
5944	6046
	6047	+ frame->video_code = vic_for_avi_infoframe(connector, vic);
5945	6048	frame->picture_aspect = picture_aspect;
5946	6049	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
5947	6050	frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
..	..	@@ -5950,26 +6053,92 @@
5950	6053	}
5951	6054	EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
5952	6055
	6056	+/* HDMI Colorspace Spec Definitions */
	6057	+#define FULL_COLORIMETRY_MASK 0x1FF
	6058	+#define NORMAL_COLORIMETRY_MASK 0x3
	6059	+#define EXTENDED_COLORIMETRY_MASK 0x7
	6060	+#define EXTENDED_ACE_COLORIMETRY_MASK 0xF
	6061	+
	6062	+#define C(x) ((x) << 0)
	6063	+#define EC(x) ((x) << 2)
	6064	+#define ACE(x) ((x) << 5)
	6065	+
	6066	+#define HDMI_COLORIMETRY_NO_DATA 0x0
	6067	+#define HDMI_COLORIMETRY_SMPTE_170M_YCC (C(1) \| EC(0) \| ACE(0))
	6068	+#define HDMI_COLORIMETRY_BT709_YCC (C(2) \| EC(0) \| ACE(0))
	6069	+#define HDMI_COLORIMETRY_XVYCC_601 (C(3) \| EC(0) \| ACE(0))
	6070	+#define HDMI_COLORIMETRY_XVYCC_709 (C(3) \| EC(1) \| ACE(0))
	6071	+#define HDMI_COLORIMETRY_SYCC_601 (C(3) \| EC(2) \| ACE(0))
	6072	+#define HDMI_COLORIMETRY_OPYCC_601 (C(3) \| EC(3) \| ACE(0))
	6073	+#define HDMI_COLORIMETRY_OPRGB (C(3) \| EC(4) \| ACE(0))
	6074	+#define HDMI_COLORIMETRY_BT2020_CYCC (C(3) \| EC(5) \| ACE(0))
	6075	+#define HDMI_COLORIMETRY_BT2020_RGB (C(3) \| EC(6) \| ACE(0))
	6076	+#define HDMI_COLORIMETRY_BT2020_YCC (C(3) \| EC(6) \| ACE(0))
	6077	+#define HDMI_COLORIMETRY_DCI_P3_RGB_D65 (C(3) \| EC(7) \| ACE(0))
	6078	+#define HDMI_COLORIMETRY_DCI_P3_RGB_THEATER (C(3) \| EC(7) \| ACE(1))
	6079	+
	6080	+static const u32 hdmi_colorimetry_val[] = {
	6081	+ [DRM_MODE_COLORIMETRY_NO_DATA] = HDMI_COLORIMETRY_NO_DATA,
	6082	+ [DRM_MODE_COLORIMETRY_SMPTE_170M_YCC] = HDMI_COLORIMETRY_SMPTE_170M_YCC,
	6083	+ [DRM_MODE_COLORIMETRY_BT709_YCC] = HDMI_COLORIMETRY_BT709_YCC,
	6084	+ [DRM_MODE_COLORIMETRY_XVYCC_601] = HDMI_COLORIMETRY_XVYCC_601,
	6085	+ [DRM_MODE_COLORIMETRY_XVYCC_709] = HDMI_COLORIMETRY_XVYCC_709,
	6086	+ [DRM_MODE_COLORIMETRY_SYCC_601] = HDMI_COLORIMETRY_SYCC_601,
	6087	+ [DRM_MODE_COLORIMETRY_OPYCC_601] = HDMI_COLORIMETRY_OPYCC_601,
	6088	+ [DRM_MODE_COLORIMETRY_OPRGB] = HDMI_COLORIMETRY_OPRGB,
	6089	+ [DRM_MODE_COLORIMETRY_BT2020_CYCC] = HDMI_COLORIMETRY_BT2020_CYCC,
	6090	+ [DRM_MODE_COLORIMETRY_BT2020_RGB] = HDMI_COLORIMETRY_BT2020_RGB,
	6091	+ [DRM_MODE_COLORIMETRY_BT2020_YCC] = HDMI_COLORIMETRY_BT2020_YCC,
	6092	+};
	6093	+
	6094	+#undef C
	6095	+#undef EC
	6096	+#undef ACE
	6097	+
	6098	+/**
	6099	+ * drm_hdmi_avi_infoframe_colorspace() - fill the HDMI AVI infoframe
	6100	+ * colorspace information
	6101	+ * @frame: HDMI AVI infoframe
	6102	+ * @conn_state: connector state
	6103	+ */
	6104	+void
	6105	+drm_hdmi_avi_infoframe_colorspace(struct hdmi_avi_infoframe *frame,
	6106	+ const struct drm_connector_state *conn_state)
	6107	+{
	6108	+ u32 colorimetry_val;
	6109	+ u32 colorimetry_index = conn_state->colorspace & FULL_COLORIMETRY_MASK;
	6110	+
	6111	+ if (colorimetry_index >= ARRAY_SIZE(hdmi_colorimetry_val))
	6112	+ colorimetry_val = HDMI_COLORIMETRY_NO_DATA;
	6113	+ else
	6114	+ colorimetry_val = hdmi_colorimetry_val[colorimetry_index];
	6115	+
	6116	+ frame->colorimetry = colorimetry_val & NORMAL_COLORIMETRY_MASK;
	6117	+ /*
	6118	+ * ToDo: Extend it for ACE formats as well. Modify the infoframe
	6119	+ * structure and extend it in drivers/video/hdmi
	6120	+ */
	6121	+ frame->extended_colorimetry = (colorimetry_val >> 2) &
	6122	+ EXTENDED_COLORIMETRY_MASK;
	6123	+}
	6124	+EXPORT_SYMBOL(drm_hdmi_avi_infoframe_colorspace);
	6125	+
5953	6126	/**
5954	6127	* drm_hdmi_avi_infoframe_quant_range() - fill the HDMI AVI infoframe
5955	6128	* quantization range information
5956	6129	* @frame: HDMI AVI infoframe
	6130	+ * @connector: the connector
5957	6131	* @mode: DRM display mode
5958	6132	* @rgb_quant_range: RGB quantization range (Q)
5959		- * @rgb_quant_range_selectable: Sink support selectable RGB quantization range (QS)
5960		- * @is_hdmi2_sink: HDMI 2.0 sink, which has different default recommendations
5961		- *
5962		- * Note that @is_hdmi2_sink can be derived by looking at the
5963		- * &drm_scdc.supported flag stored in &drm_hdmi_info.scdc,
5964		- * &drm_display_info.hdmi, which can be found in &drm_connector.display_info.
5965	6133	*/
5966	6134	void
5967	6135	drm_hdmi_avi_infoframe_quant_range(struct hdmi_avi_infoframe *frame,
	6136	+ const struct drm_connector *connector,
5968	6137	const struct drm_display_mode *mode,
5969		- enum hdmi_quantization_range rgb_quant_range,
5970		- bool rgb_quant_range_selectable,
5971		- bool is_hdmi2_sink)
	6138	+ enum hdmi_quantization_range rgb_quant_range)
5972	6139	{
	6140	+ const struct drm_display_info *info = &connector->display_info;
	6141	+
5973	6142	/*
5974	6143	* CEA-861:
5975	6144	* "A Source shall not send a non-zero Q value that does not correspond
..	..	@@ -5980,7 +6149,7 @@
5980	6149	* HDMI 2.0 recommends sending non-zero Q when it does match the
5981	6150	* default RGB quantization range for the mode, even when QS=0.
5982	6151	*/
5983		- if (rgb_quant_range_selectable \|\|
	6152	+ if (info->rgb_quant_range_selectable \|\|
5984	6153	rgb_quant_range == drm_default_rgb_quant_range(mode))
5985	6154	frame->quantization_range = rgb_quant_range;
5986	6155	else
..	..	@@ -5999,7 +6168,7 @@
5999	6168	* we limit non-zero YQ to HDMI 2.0 sinks only as HDMI 2.0 is based
6000	6169	* on on CEA-861-F.
6001	6170	*/
6002		- if (!is_hdmi2_sink \|\|
	6171	+ if (!is_hdmi2_sink(connector) \|\|
6003	6172	rgb_quant_range == HDMI_QUANTIZATION_RANGE_LIMITED)
6004	6173	frame->ycc_quantization_range =
6005	6174	HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
..	..	@@ -6008,6 +6177,23 @@
6008	6177	HDMI_YCC_QUANTIZATION_RANGE_FULL;
6009	6178	}
6010	6179	EXPORT_SYMBOL(drm_hdmi_avi_infoframe_quant_range);
	6180	+
	6181	+/**
	6182	+ * drm_hdmi_avi_infoframe_bars() - fill the HDMI AVI infoframe
	6183	+ * bar information
	6184	+ * @frame: HDMI AVI infoframe
	6185	+ * @conn_state: connector state
	6186	+ */
	6187	+void
	6188	+drm_hdmi_avi_infoframe_bars(struct hdmi_avi_infoframe *frame,
	6189	+ const struct drm_connector_state *conn_state)
	6190	+{
	6191	+ frame->right_bar = conn_state->tv.margins.right;
	6192	+ frame->left_bar = conn_state->tv.margins.left;
	6193	+ frame->top_bar = conn_state->tv.margins.top;
	6194	+ frame->bottom_bar = conn_state->tv.margins.bottom;
	6195	+}
	6196	+EXPORT_SYMBOL(drm_hdmi_avi_infoframe_bars);
6011	6197
6012	6198	static enum hdmi_3d_structure
6013	6199	s3d_structure_from_display_mode(const struct drm_display_mode *mode)
..	..	@@ -6051,7 +6237,7 @@
6051	6237	*/
6052	6238	int
6053	6239	drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
6054		- struct drm_connector *connector,
	6240	+ const struct drm_connector *connector,
6055	6241	const struct drm_display_mode *mode)
6056	6242	{
6057	6243	/*
..	..	@@ -6061,8 +6247,6 @@
6061	6247	bool has_hdmi_infoframe = connector ?
6062	6248	connector->display_info.has_hdmi_infoframe : false;
6063	6249	int err;
6064		- u32 s3d_flags;
6065		- u8 vic;
6066	6250
6067	6251	if (!frame \|\| !mode)
6068	6252	return -EINVAL;
..	..	@@ -6070,8 +6254,9 @@
6070	6254	if (!has_hdmi_infoframe)
6071	6255	return -EINVAL;
6072	6256
6073		- vic = drm_match_hdmi_mode(mode);
6074		- s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
	6257	+ err = hdmi_vendor_infoframe_init(frame);
	6258	+ if (err < 0)
	6259	+ return err;
6075	6260
6076	6261	/*
6077	6262	* Even if it's not absolutely necessary to send the infoframe
..	..	@@ -6082,25 +6267,17 @@
6082	6267	* mode if the source simply stops sending the infoframe when
6083	6268	* it wants to switch from 3D to 2D.
6084	6269	*/
6085		-
6086		- if (vic && s3d_flags)
6087		- return -EINVAL;
6088		-
6089		- err = hdmi_vendor_infoframe_init(frame);
6090		- if (err < 0)
6091		- return err;
6092		-
6093		- frame->vic = vic;
	6270	+ frame->vic = drm_mode_hdmi_vic(connector, mode);
6094	6271	frame->s3d_struct = s3d_structure_from_display_mode(mode);
6095	6272
6096	6273	return 0;
6097	6274	}
6098	6275	EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
6099	6276
6100		-static int drm_parse_tiled_block(struct drm_connector *connector,
6101		- struct displayid_block *block)
	6277	+static void drm_parse_tiled_block(struct drm_connector *connector,
	6278	+ const struct displayid_block *block)
6102	6279	{
6103		- struct displayid_tiled_block tile = (struct displayid_tiled_block )block;
	6280	+ const struct displayid_tiled_block tile = (struct displayid_tiled_block )block;
6104	6281	u16 w, h;
6105	6282	u8 tile_v_loc, tile_h_loc;
6106	6283	u8 num_v_tile, num_h_tile;
..	..	@@ -6132,92 +6309,63 @@
6132	6309	DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
6133	6310
6134	6311	tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
6135		- if (!tg) {
6136		- tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
6137		- }
6138	6312	if (!tg)
6139		- return -ENOMEM;
	6313	+ tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
	6314	+ if (!tg)
	6315	+ return;
6140	6316
6141	6317	if (connector->tile_group != tg) {
6142	6318	/* if we haven't got a pointer,
6143	6319	take the reference, drop ref to old tile group */
6144		- if (connector->tile_group) {
	6320	+ if (connector->tile_group)
6145	6321	drm_mode_put_tile_group(connector->dev, connector->tile_group);
6146		- }
6147	6322	connector->tile_group = tg;
6148		- } else
	6323	+ } else {
6149	6324	/* if same tile group, then release the ref we just took. */
6150	6325	drm_mode_put_tile_group(connector->dev, tg);
6151		- return 0;
	6326	+ }
6152	6327	}
6153	6328
6154		-static int drm_parse_display_id(struct drm_connector *connector,
6155		- u8 *displayid, int length,
6156		- bool is_edid_extension)
	6329	+static void drm_displayid_parse_tiled(struct drm_connector *connector,
	6330	+ const u8 *displayid, int length, int idx)
6157	6331	{
6158		- /* if this is an EDID extension the first byte will be 0x70 */
6159		- int idx = 0;
6160		- struct displayid_block *block;
6161		- int ret;
6162		-
6163		- if (is_edid_extension)
6164		- idx = 1;
6165		-
6166		- ret = validate_displayid(displayid, length, idx);
6167		- if (ret)
6168		- return ret;
	6332	+ const struct displayid_block *block;
6169	6333
6170	6334	idx += sizeof(struct displayid_hdr);
6171		- while (block = (struct displayid_block *)&displayid[idx],
6172		- idx + sizeof(struct displayid_block) <= length &&
6173		- idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
6174		- block->num_bytes > 0) {
6175		- idx += block->num_bytes + sizeof(struct displayid_block);
	6335	+ for_each_displayid_db(displayid, block, idx, length) {
6176	6336	DRM_DEBUG_KMS("block id 0x%x, rev %d, len %d\n",
6177	6337	block->tag, block->rev, block->num_bytes);
6178	6338
6179	6339	switch (block->tag) {
6180	6340	case DATA_BLOCK_TILED_DISPLAY:
6181		- ret = drm_parse_tiled_block(connector, block);
6182		- if (ret)
6183		- return ret;
6184		- break;
6185		- case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
6186		- /* handled in mode gathering code. */
6187		- break;
6188		- case DATA_BLOCK_CTA:
6189		- /* handled in the cea parser code. */
	6341	+ drm_parse_tiled_block(connector, block);
6190	6342	break;
6191	6343	default:
6192	6344	DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block->tag);
6193	6345	break;
6194	6346	}
6195	6347	}
6196		- return 0;
6197	6348	}
6198	6349
6199		-static void drm_get_displayid(struct drm_connector *connector,
6200		- struct edid *edid)
	6350	+void drm_update_tile_info(struct drm_connector *connector,
	6351	+ const struct edid *edid)
6201	6352	{
6202		- void *displayid = NULL;
6203		- int ret;
	6353	+ const void *displayid = NULL;
	6354	+ int ext_index = 0;
	6355	+ int length, idx;
	6356	+
6204	6357	connector->has_tile = false;
6205		- displayid = drm_find_displayid_extension(edid);
6206		- if (!displayid) {
6207		- /* drop reference to any tile group we had */
6208		- goto out_drop_ref;
	6358	+ for (;;) {
	6359	+ displayid = drm_find_displayid_extension(edid, &length, &idx,
	6360	+ &ext_index);
	6361	+ if (!displayid)
	6362	+ break;
	6363	+
	6364	+ drm_displayid_parse_tiled(connector, displayid, length, idx);
6209	6365	}
6210	6366
6211		- ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
6212		- if (ret < 0)
6213		- goto out_drop_ref;
6214		- if (!connector->has_tile)
6215		- goto out_drop_ref;
6216		- return;
6217		-out_drop_ref:
6218		- if (connector->tile_group) {
	6367	+ if (!connector->has_tile && connector->tile_group) {
6219	6368	drm_mode_put_tile_group(connector->dev, connector->tile_group);
6220	6369	connector->tile_group = NULL;
6221	6370	}
6222		- return;
6223	6371	}