| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 1 | 2 | /* |
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| 2 | 3 | * Intel Medfield MSIC GPIO driver> |
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| 3 | 4 | * Copyright (c) 2011, Intel Corporation. |
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| 4 | 5 | * |
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| 5 | 6 | * Author: Mathias Nyman <mathias.nyman@linux.intel.com> |
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| 6 | 7 | * Based on intel_pmic_gpio.c |
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| 7 | | - * |
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| 8 | | - * This program is free software; you can redistribute it and/or modify it |
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| 9 | | - * under the terms and conditions of the GNU General Public License, |
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| 10 | | - * version 2, as published by the Free Software Foundation. |
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| 11 | | - * |
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| 12 | | - * This program is distributed in the hope it will be useful, but WITHOUT |
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| 13 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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| 14 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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| 15 | | - * more details. |
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| 16 | | - * |
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| 17 | | - * You should have received a copy of the GNU General Public License along with |
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| 18 | | - * this program; if not, write to the Free Software Foundation, Inc., |
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| 19 | | - * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. |
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| 20 | | - * |
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| 21 | 8 | */ |
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| 22 | 9 | |
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| 23 | | -#include <linux/kernel.h> |
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| 24 | | -#include <linux/slab.h> |
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| 25 | | -#include <linux/interrupt.h> |
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| 26 | | -#include <linux/init.h> |
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| 27 | 10 | #include <linux/gpio/driver.h> |
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| 28 | | -#include <linux/platform_device.h> |
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| 11 | +#include <linux/init.h> |
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| 12 | +#include <linux/interrupt.h> |
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| 13 | +#include <linux/kernel.h> |
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| 29 | 14 | #include <linux/mfd/intel_msic.h> |
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| 15 | +#include <linux/platform_device.h> |
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| 16 | +#include <linux/slab.h> |
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| 30 | 17 | |
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| 31 | 18 | /* the offset for the mapping of global gpio pin to irq */ |
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| 32 | 19 | #define MSIC_GPIO_IRQ_OFFSET 0x100 |
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| .. | .. |
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| 237 | 224 | struct msic_gpio *mg = irq_data_get_irq_handler_data(data); |
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| 238 | 225 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
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| 239 | 226 | struct intel_msic *msic = pdev_to_intel_msic(mg->pdev); |
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| 227 | + unsigned long pending; |
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| 240 | 228 | int i; |
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| 241 | 229 | int bitnr; |
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| 242 | 230 | u8 pin; |
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| 243 | | - unsigned long pending = 0; |
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| 244 | 231 | |
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| 245 | 232 | for (i = 0; i < (mg->chip.ngpio / BITS_PER_BYTE); i++) { |
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| 246 | 233 | intel_msic_irq_read(msic, INTEL_MSIC_GPIO0LVIRQ + i, &pin); |
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| 247 | 234 | pending = pin; |
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| 248 | 235 | |
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| 249 | | - if (pending) { |
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| 250 | | - for_each_set_bit(bitnr, &pending, BITS_PER_BYTE) |
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| 251 | | - generic_handle_irq(mg->irq_base + |
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| 252 | | - (i * BITS_PER_BYTE) + bitnr); |
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| 253 | | - } |
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| 236 | + for_each_set_bit(bitnr, &pending, BITS_PER_BYTE) |
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| 237 | + generic_handle_irq(mg->irq_base + i * BITS_PER_BYTE + bitnr); |
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| 254 | 238 | } |
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| 255 | 239 | chip->irq_eoi(data); |
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| 256 | 240 | } |
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