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2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771 
 kernel/drivers/dma/xilinx/zynqmp_dma.c
....@@ -1,12 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * DMA driver for Xilinx ZynqMP DMA Engine
34  *
45  * Copyright (C) 2016 Xilinx, Inc. All rights reserved.
5
- *
6
- * This program is free software: you can redistribute it and/or modify
7
- * it under the terms of the GNU General Public License as published by
8
- * the Free Software Foundation, either version 2 of the License, or
9
- * (at your option) any later version.
106  */
117 
128 #include <linux/bitops.h>
....@@ -236,7 +232,7 @@
236232 	bool is_dmacoherent;
237233 	struct tasklet_struct tasklet;
238234 	bool idle;
239
-	u32 desc_size;
235
+	size_t desc_size;
240236 	bool err;
241237 	u32 bus_width;
242238 	u32 src_burst_len;
....@@ -377,9 +373,10 @@
377373 	struct zynqmp_dma_chan *chan = to_chan(tx->chan);
378374 	struct zynqmp_dma_desc_sw *desc, *new;
379375 	dma_cookie_t cookie;
376
+	unsigned long irqflags;
380377 
381378 	new = tx_to_desc(tx);
382
-	spin_lock_bh(&chan->lock);
379
+	spin_lock_irqsave(&chan->lock, irqflags);
383380 	cookie = dma_cookie_assign(tx);
384381 
385382 	if (!list_empty(&chan->pending_list)) {
....@@ -395,7 +392,7 @@
395392 	}
396393 
397394 	list_add_tail(&new->node, &chan->pending_list);
398
-	spin_unlock_bh(&chan->lock);
395
+	spin_unlock_irqrestore(&chan->lock, irqflags);
399396 
400397 	return cookie;
401398 }
....@@ -410,12 +407,13 @@
410407 zynqmp_dma_get_descriptor(struct zynqmp_dma_chan *chan)
411408 {
412409 	struct zynqmp_dma_desc_sw *desc;
410
+	unsigned long irqflags;
413411 
414
-	spin_lock_bh(&chan->lock);
412
+	spin_lock_irqsave(&chan->lock, irqflags);
415413 	desc = list_first_entry(&chan->free_list,
416414 				struct zynqmp_dma_desc_sw, node);
417415 	list_del(&desc->node);
418
-	spin_unlock_bh(&chan->lock);
416
+	spin_unlock_irqrestore(&chan->lock, irqflags);
419417 
420418 	INIT_LIST_HEAD(&desc->tx_list);
421419 	/* Clear the src and dst descriptor memory */
....@@ -436,6 +434,7 @@
436434 	struct zynqmp_dma_desc_sw *child, *next;
437435 
438436 	chan->desc_free_cnt++;
437
+	list_del(&sdesc->node);
439438 	list_add_tail(&sdesc->node, &chan->free_list);
440439 	list_for_each_entry_safe(child, next, &sdesc->tx_list, node) {
441440 		chan->desc_free_cnt++;
....@@ -469,7 +468,7 @@
469468 	struct zynqmp_dma_desc_sw *desc;
470469 	int i, ret;
471470 
472
-	ret = pm_runtime_get_sync(chan->dev);
471
+	ret = pm_runtime_resume_and_get(chan->dev);
473472 	if (ret < 0)
474473 		return ret;
475474 
....@@ -490,9 +489,10 @@
490489 		list_add_tail(&desc->node, &chan->free_list);
491490 	}
492491 
493
-	chan->desc_pool_v = dma_zalloc_coherent(chan->dev,
494
-				(2 * chan->desc_size * ZYNQMP_DMA_NUM_DESCS),
495
-				&chan->desc_pool_p, GFP_KERNEL);
492
+	chan->desc_pool_v = dma_alloc_coherent(chan->dev,
493
+					       (2 * ZYNQMP_DMA_DESC_SIZE(chan) *
494
+					       ZYNQMP_DMA_NUM_DESCS),
495
+					       &chan->desc_pool_p, GFP_KERNEL);
496496 	if (!chan->desc_pool_v)
497497 		return -ENOMEM;
498498 
....@@ -610,8 +610,6 @@
610610 		dma_async_tx_callback callback;
611611 		void *callback_param;
612612 
613
-		list_del(&desc->node);
614
-
615613 		callback = desc->async_tx.callback;
616614 		callback_param = desc->async_tx.callback_param;
617615 		if (callback) {
....@@ -649,10 +647,11 @@
649647 static void zynqmp_dma_issue_pending(struct dma_chan *dchan)
650648 {
651649 	struct zynqmp_dma_chan *chan = to_chan(dchan);
650
+	unsigned long irqflags;
652651 
653
-	spin_lock_bh(&chan->lock);
652
+	spin_lock_irqsave(&chan->lock, irqflags);
654653 	zynqmp_dma_start_transfer(chan);
655
-	spin_unlock_bh(&chan->lock);
654
+	spin_unlock_irqrestore(&chan->lock, irqflags);
656655 }
657656 
658657 /**
....@@ -673,10 +672,11 @@
673672 static void zynqmp_dma_free_chan_resources(struct dma_chan *dchan)
674673 {
675674 	struct zynqmp_dma_chan *chan = to_chan(dchan);
675
+	unsigned long irqflags;
676676 
677
-	spin_lock_bh(&chan->lock);
677
+	spin_lock_irqsave(&chan->lock, irqflags);
678678 	zynqmp_dma_free_descriptors(chan);
679
-	spin_unlock_bh(&chan->lock);
679
+	spin_unlock_irqrestore(&chan->lock, irqflags);
680680 	dma_free_coherent(chan->dev,
681681 		(2 * ZYNQMP_DMA_DESC_SIZE(chan) * ZYNQMP_DMA_NUM_DESCS),
682682 		chan->desc_pool_v, chan->desc_pool_p);
....@@ -743,14 +743,15 @@
743743 
744744 /**
745745  * zynqmp_dma_do_tasklet - Schedule completion tasklet
746
- * @data: Pointer to the ZynqMP DMA channel structure
746
+ * @t: Pointer to the ZynqMP DMA channel structure
747747  */
748
-static void zynqmp_dma_do_tasklet(unsigned long data)
748
+static void zynqmp_dma_do_tasklet(struct tasklet_struct *t)
749749 {
750
-	struct zynqmp_dma_chan *chan = (struct zynqmp_dma_chan *)data;
750
+	struct zynqmp_dma_chan *chan = from_tasklet(chan, t, tasklet);
751751 	u32 count;
752
+	unsigned long irqflags;
752753 
753
-	spin_lock(&chan->lock);
754
+	spin_lock_irqsave(&chan->lock, irqflags);
754755 
755756 	if (chan->err) {
756757 		zynqmp_dma_reset(chan);
....@@ -770,7 +771,7 @@
770771 		zynqmp_dma_start_transfer(chan);
771772 
772773 unlock:
773
-	spin_unlock(&chan->lock);
774
+	spin_unlock_irqrestore(&chan->lock, irqflags);
774775 }
775776 
776777 /**
....@@ -782,11 +783,12 @@
782783 static int zynqmp_dma_device_terminate_all(struct dma_chan *dchan)
783784 {
784785 	struct zynqmp_dma_chan *chan = to_chan(dchan);
786
+	unsigned long irqflags;
785787 
786
-	spin_lock_bh(&chan->lock);
788
+	spin_lock_irqsave(&chan->lock, irqflags);
787789 	writel(ZYNQMP_DMA_IDS_DEFAULT_MASK, chan->regs + ZYNQMP_DMA_IDS);
788790 	zynqmp_dma_free_descriptors(chan);
789
-	spin_unlock_bh(&chan->lock);
791
+	spin_unlock_irqrestore(&chan->lock, irqflags);
790792 
791793 	return 0;
792794 }
....@@ -810,19 +812,20 @@
810812 	void *desc = NULL, *prev = NULL;
811813 	size_t copy;
812814 	u32 desc_cnt;
815
+	unsigned long irqflags;
813816 
814817 	chan = to_chan(dchan);
815818 
816819 	desc_cnt = DIV_ROUND_UP(len, ZYNQMP_DMA_MAX_TRANS_LEN);
817820 
818
-	spin_lock_bh(&chan->lock);
821
+	spin_lock_irqsave(&chan->lock, irqflags);
819822 	if (desc_cnt > chan->desc_free_cnt) {
820
-		spin_unlock_bh(&chan->lock);
823
+		spin_unlock_irqrestore(&chan->lock, irqflags);
821824 		dev_dbg(chan->dev, "chan %p descs are not available\n", chan);
822825 		return NULL;
823826 	}
824827 	chan->desc_free_cnt = chan->desc_free_cnt - desc_cnt;
825
-	spin_unlock_bh(&chan->lock);
828
+	spin_unlock_irqrestore(&chan->lock, irqflags);
826829 
827830 	do {
828831 		/* Allocate and populate the descriptor */
....@@ -906,7 +909,7 @@
906909 
907910 	chan->is_dmacoherent =  of_property_read_bool(node, "dma-coherent");
908911 	zdev->chan = chan;
909
-	tasklet_init(&chan->tasklet, zynqmp_dma_do_tasklet, (ulong)chan);
912
+	tasklet_setup(&chan->tasklet, zynqmp_dma_do_tasklet);
910913 	spin_lock_init(&chan->lock);
911914 	INIT_LIST_HEAD(&chan->active_list);
912915 	INIT_LIST_HEAD(&chan->pending_list);