| .. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0-or-later |
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| 1 | 2 | /* |
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| 2 | 3 | * S3C24XX DMA handling |
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| 3 | 4 | * |
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| .. | .. |
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| 10 | 11 | * |
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| 11 | 12 | * Author: Peter Pearse <peter.pearse@arm.com> |
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| 12 | 13 | * Author: Linus Walleij <linus.walleij@stericsson.com> |
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| 13 | | - * |
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| 14 | | - * This program is free software; you can redistribute it and/or modify it |
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| 15 | | - * under the terms of the GNU General Public License as published by the Free |
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| 16 | | - * Software Foundation; either version 2 of the License, or (at your option) |
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| 17 | | - * any later version. |
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| 18 | 14 | * |
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| 19 | 15 | * The DMA controllers in S3C24XX SoCs have a varying number of DMA signals |
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| 20 | 16 | * that can be routed to any of the 4 to 8 hardware-channels. |
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| .. | .. |
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| 523 | 519 | s3c24xx_dma_start_next_sg(s3cchan, txd); |
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| 524 | 520 | } |
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| 525 | 521 | |
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| 526 | | -static void s3c24xx_dma_free_txd_list(struct s3c24xx_dma_engine *s3cdma, |
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| 527 | | - struct s3c24xx_dma_chan *s3cchan) |
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| 528 | | -{ |
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| 529 | | - LIST_HEAD(head); |
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| 530 | | - |
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| 531 | | - vchan_get_all_descriptors(&s3cchan->vc, &head); |
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| 532 | | - vchan_dma_desc_free_list(&s3cchan->vc, &head); |
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| 533 | | -} |
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| 534 | | - |
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| 535 | 522 | /* |
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| 536 | 523 | * Try to allocate a physical channel. When successful, assign it to |
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| 537 | 524 | * this virtual channel, and initiate the next descriptor. The |
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| .. | .. |
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| 713 | 700 | { |
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| 714 | 701 | struct s3c24xx_dma_chan *s3cchan = to_s3c24xx_dma_chan(chan); |
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| 715 | 702 | struct s3c24xx_dma_engine *s3cdma = s3cchan->host; |
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| 703 | + LIST_HEAD(head); |
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| 716 | 704 | unsigned long flags; |
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| 717 | | - int ret = 0; |
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| 705 | + int ret; |
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| 718 | 706 | |
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| 719 | 707 | spin_lock_irqsave(&s3cchan->vc.lock, flags); |
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| 720 | 708 | |
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| .. | .. |
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| 738 | 726 | } |
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| 739 | 727 | |
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| 740 | 728 | /* Dequeue jobs not yet fired as well */ |
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| 741 | | - s3c24xx_dma_free_txd_list(s3cdma, s3cchan); |
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| 729 | + |
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| 730 | + vchan_get_all_descriptors(&s3cchan->vc, &head); |
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| 731 | + |
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| 732 | + spin_unlock_irqrestore(&s3cchan->vc.lock, flags); |
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| 733 | + |
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| 734 | + vchan_dma_desc_free_list(&s3cchan->vc, &head); |
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| 735 | + |
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| 736 | + return 0; |
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| 737 | + |
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| 742 | 738 | unlock: |
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| 743 | 739 | spin_unlock_irqrestore(&s3cchan->vc.lock, flags); |
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| 744 | 740 | |
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| .. | .. |
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| 1202 | 1198 | |
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| 1203 | 1199 | /* Basic sanity check */ |
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| 1204 | 1200 | if (pdata->num_phy_channels > MAX_DMA_CHANNELS) { |
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| 1205 | | - dev_err(&pdev->dev, "to many dma channels %d, max %d\n", |
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| 1201 | + dev_err(&pdev->dev, "too many dma channels %d, max %d\n", |
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| 1206 | 1202 | pdata->num_phy_channels, MAX_DMA_CHANNELS); |
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| 1207 | 1203 | return -EINVAL; |
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| 1208 | 1204 | } |
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| .. | .. |
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| 1241 | 1237 | phy->host = s3cdma; |
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| 1242 | 1238 | |
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| 1243 | 1239 | phy->irq = platform_get_irq(pdev, i); |
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| 1244 | | - if (phy->irq < 0) { |
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| 1245 | | - dev_err(&pdev->dev, "failed to get irq %d, err %d\n", |
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| 1246 | | - i, phy->irq); |
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| 1240 | + if (phy->irq < 0) |
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| 1247 | 1241 | continue; |
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| 1248 | | - } |
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| 1249 | 1242 | |
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| 1250 | 1243 | ret = devm_request_irq(&pdev->dev, phy->irq, s3c24xx_dma_irq, |
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| 1251 | 1244 | 0, pdev->name, phy); |
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