change system file

hc

2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771

 kernel/drivers/clk/rockchip/clk-rk3588.c
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@@ -79,16 +79,16 @@
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 	RK3588_PLL_RATE(1008000000, 2, 336, 2, 0),
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 	RK3588_PLL_RATE(1000000000, 3, 500, 2, 0),
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 	RK3588_PLL_RATE(983040000, 4, 655, 2, 23592),
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-	RK3588_PLL_RATE(955520000, 3, 477, 2, 49806),
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+	RK3588_PLL_RATE(955520000, 3, 478, 2, 49807),
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 	RK3588_PLL_RATE(903168000, 6, 903, 2, 11009),
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 	RK3588_PLL_RATE(900000000, 2, 300, 2, 0),
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 	RK3588_PLL_RATE(816000000, 2, 272, 2, 0),
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 	RK3588_PLL_RATE(786432000, 2, 262, 2, 9437),
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 	RK3588_PLL_RATE(786000000, 1, 131, 2, 0),
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-	RK3588_PLL_RATE(785560000, 3, 392, 2, 51117),
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+	RK3588_PLL_RATE(785560000, 3, 393, 2, 51119),
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 	RK3588_PLL_RATE(722534400, 8, 963, 2, 24850),
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 	RK3588_PLL_RATE(600000000, 2, 200, 2, 0),
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-	RK3588_PLL_RATE(594000000, 2, 198, 2, 0),
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+	RK3588_PLL_RATE(594000000, 1, 99, 2, 0),
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 	RK3588_PLL_RATE(408000000, 2, 272, 3, 0),
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 	RK3588_PLL_RATE(312000000, 2, 208, 3, 0),
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 	RK3588_PLL_RATE(216000000, 2, 288, 4, 0),
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@@ -2065,13 +2065,13 @@
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 			RK3588_CLKGATE_CON(72), 4, GFLAGS),
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 	GATE(HCLK_VOP, "hclk_vop", "hclk_vop_root", 0,
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 			RK3588_CLKGATE_CON(52), 8, GFLAGS),
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-	COMPOSITE(DCLK_VOP0_SRC, "dclk_vop0_src", gpll_cpll_v0pll_aupll_p, 0,
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+	COMPOSITE(DCLK_VOP0_SRC, "dclk_vop0_src", gpll_cpll_v0pll_aupll_p, CLK_SET_RATE_NO_REPARENT,
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 			RK3588_CLKSEL_CON(111), 7, 2, MFLAGS, 0, 7, DFLAGS,
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 			RK3588_CLKGATE_CON(52), 10, GFLAGS),
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-	COMPOSITE(DCLK_VOP1_SRC, "dclk_vop1_src", gpll_cpll_v0pll_aupll_p, 0,
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+	COMPOSITE(DCLK_VOP1_SRC, "dclk_vop1_src", gpll_cpll_v0pll_aupll_p, CLK_SET_RATE_NO_REPARENT,
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 			RK3588_CLKSEL_CON(111), 14, 2, MFLAGS, 9, 5, DFLAGS,
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 			RK3588_CLKGATE_CON(52), 11, GFLAGS),
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-	COMPOSITE(DCLK_VOP2_SRC, "dclk_vop2_src", gpll_cpll_v0pll_aupll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
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+	COMPOSITE(DCLK_VOP2_SRC, "dclk_vop2_src", gpll_cpll_v0pll_aupll_p, CLK_SET_RATE_NO_REPARENT,
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 			RK3588_CLKSEL_CON(112), 5, 2, MFLAGS, 0, 5, DFLAGS,
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 			RK3588_CLKGATE_CON(52), 12, GFLAGS),
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 	COMPOSITE_NODIV(DCLK_VOP0, "dclk_vop0", dclk_vop0_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
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@@ -2083,7 +2083,7 @@
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 	COMPOSITE_NODIV(DCLK_VOP2, "dclk_vop2", dclk_vop2_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
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 			RK3588_CLKSEL_CON(112), 11, 2, MFLAGS,
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 			RK3588_CLKGATE_CON(53), 1, GFLAGS),
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-	COMPOSITE(DCLK_VOP3, "dclk_vop3", gpll_cpll_v0pll_aupll_p, 0,
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+	COMPOSITE(DCLK_VOP3, "dclk_vop3", gpll_cpll_v0pll_aupll_p, CLK_SET_RATE_NO_REPARENT,
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 			RK3588_CLKSEL_CON(113), 7, 2, MFLAGS, 0, 7, DFLAGS,
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 			RK3588_CLKGATE_CON(53), 2, GFLAGS),
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 	GATE(PCLK_DSIHOST0, "pclk_dsihost0", "pclk_vop_root", 0,