| .. | .. |
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| 23 | 23 | void __iomem *reg; |
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| 24 | 24 | u32 shift = 0; |
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| 25 | 25 | u8 clk_gate_flags = CLK_GATE_HIWORD_MASK; |
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| 26 | + unsigned long flags = CLK_SET_RATE_PARENT; |
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| 26 | 27 | int ret; |
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| 27 | 28 | |
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| 28 | 29 | ret = device_property_read_string(dev, "clock-output-names", &clk_name); |
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| .. | .. |
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| 35 | 36 | |
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| 36 | 37 | if (device_property_read_bool(dev, "rockchip,bit-set-to-disable")) |
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| 37 | 38 | clk_gate_flags |= CLK_GATE_SET_TO_DISABLE; |
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| 39 | + |
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| 40 | + if (device_property_read_bool(dev, "rockchip,clk-ignore-unused")) |
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| 41 | + flags |= CLK_IGNORE_UNUSED; |
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| 38 | 42 | |
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| 39 | 43 | ret = of_clk_parent_fill(node, &parent_name, 1); |
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| 40 | 44 | if (ret != 1) |
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| .. | .. |
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| 50 | 54 | |
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| 51 | 55 | pm_runtime_enable(dev); |
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| 52 | 56 | |
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| 53 | | - hw = clk_hw_register_gate(dev, clk_name, parent_name, CLK_SET_RATE_PARENT | CLK_IGNORE_UNUSED, |
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| 57 | + |
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| 58 | + hw = clk_hw_register_gate(dev, clk_name, parent_name, flags, |
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| 54 | 59 | reg, shift, clk_gate_flags, &clk_out_lock); |
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| 55 | 60 | if (IS_ERR(hw)) { |
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| 56 | 61 | ret = -EINVAL; |
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