| .. | .. |
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| 97 | 97 | int prediv_value; |
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| 98 | 98 | int div_value; |
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| 99 | 99 | int ret; |
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| 100 | | - u32 val; |
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| 100 | + u32 orig, val; |
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| 101 | 101 | |
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| 102 | 102 | ret = imx8m_clk_composite_compute_dividers(rate, parent_rate, |
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| 103 | 103 | &prediv_value, &div_value); |
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| .. | .. |
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| 106 | 106 | |
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| 107 | 107 | spin_lock_irqsave(divider->lock, flags); |
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| 108 | 108 | |
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| 109 | | - val = readl(divider->reg); |
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| 110 | | - val &= ~((clk_div_mask(divider->width) << divider->shift) | |
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| 111 | | - (clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT)); |
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| 109 | + orig = readl(divider->reg); |
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| 110 | + val = orig & ~((clk_div_mask(divider->width) << divider->shift) | |
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| 111 | + (clk_div_mask(PCG_DIV_WIDTH) << PCG_DIV_SHIFT)); |
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| 112 | 112 | |
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| 113 | 113 | val |= (u32)(prediv_value - 1) << divider->shift; |
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| 114 | 114 | val |= (u32)(div_value - 1) << PCG_DIV_SHIFT; |
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| 115 | | - writel(val, divider->reg); |
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| 115 | + |
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| 116 | + if (val != orig) |
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| 117 | + writel(val, divider->reg); |
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| 116 | 118 | |
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| 117 | 119 | spin_unlock_irqrestore(divider->lock, flags); |
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| 118 | 120 | |
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