| .. | .. | 
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|  | 1 | +// SPDX-License-Identifier: GPL-2.0-only | 
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| 1 | 2 | /* | 
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| 2 | 3 | * Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>. | 
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| 3 |  | - * | 
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| 4 |  | - * This program is free software; you can redistribute it and/or modify it | 
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| 5 |  | - * under the terms and conditions of the GNU General Public License, | 
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| 6 |  | - * version 2, as published by the Free Software Foundation. | 
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| 7 |  | - * | 
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| 8 |  | - * This program is distributed in the hope it will be useful, but WITHOUT | 
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| 9 |  | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
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| 10 |  | - * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for | 
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| 11 |  | - * more details. | 
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| 12 |  | - * | 
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| 13 |  | - * You should have received a copy of the GNU General Public License along with | 
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| 14 |  | - * this program.  If not, see <http://www.gnu.org/licenses/>. | 
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| 15 | 4 | */ | 
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| 16 | 5 |  | 
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| 17 | 6 | #include <linux/clk.h> | 
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| .. | .. | 
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| 271 | 260 | const char *ref_clk, *pll_clk = "pll"; | 
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| 272 | 261 | u32 rate; | 
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| 273 | 262 | int n; | 
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| 274 |  | -	u32 accuracy = 0; | 
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| 275 | 263 |  | 
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| 276 | 264 | clk_data = kzalloc(struct_size(clk_data, hws, MAX_CLKS), GFP_KERNEL); | 
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| 277 | 265 | if (!clk_data) | 
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| .. | .. | 
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| 281 | 269 |  | 
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| 282 | 270 | base = of_io_request_and_map(np, 0, np->name); | 
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| 283 | 271 | if (IS_ERR(base)) | 
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| 284 |  | -		panic("%s: unable to map resource", np->name); | 
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|  | 272 | +		panic("%pOFn: unable to map resource", np); | 
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| 285 | 273 |  | 
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| 286 | 274 | /* register pll */ | 
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| 287 | 275 | rate = (ioread32(base + HW_SYSPLLCTRL) & 0xffff) * 1000000; | 
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| 288 | 276 |  | 
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|  | 277 | +	/* TODO: Convert to DT parent scheme */ | 
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| 289 | 278 | ref_clk = of_clk_get_parent_name(np, 0); | 
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| 290 |  | -	accuracy = clk_get_accuracy(__clk_lookup(ref_clk)); | 
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| 291 |  | -	hw = clk_hw_register_fixed_rate_with_accuracy(NULL, pll_clk, | 
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| 292 |  | -			ref_clk, 0, rate, accuracy); | 
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|  | 279 | +	hw = __clk_hw_register_fixed_rate(NULL, NULL, pll_clk, | 
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|  | 280 | +			ref_clk, NULL, NULL, 0, rate, 0, | 
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|  | 281 | +			CLK_FIXED_RATE_PARENT_ACCURACY); | 
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| 293 | 282 |  | 
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| 294 | 283 | if (IS_ERR(hw)) | 
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| 295 |  | -		panic("%s: can't register REFCLK. Check DT!", np->name); | 
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|  | 284 | +		panic("%pOFn: can't register REFCLK. Check DT!", np); | 
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| 296 | 285 |  | 
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| 297 | 286 | for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) { | 
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| 298 | 287 | const struct asm9260_mux_clock *mc = &asm9260_mux_clks[n]; | 
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