| .. | .. |
|---|
| 50 | 50 | /* board IDs by feature in alphabetical order */ |
|---|
| 51 | 51 | board_ahci, |
|---|
| 52 | 52 | board_ahci_ign_iferr, |
|---|
| 53 | | - board_ahci_mobile, |
|---|
| 53 | + board_ahci_low_power, |
|---|
| 54 | + board_ahci_no_debounce_delay, |
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| 54 | 55 | board_ahci_nomsi, |
|---|
| 55 | 56 | board_ahci_noncq, |
|---|
| 56 | 57 | board_ahci_nosntf, |
|---|
| .. | .. |
|---|
| 83 | 84 | static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent); |
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| 84 | 85 | static void ahci_remove_one(struct pci_dev *dev); |
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| 85 | 86 | static void ahci_shutdown_one(struct pci_dev *dev); |
|---|
| 87 | +static void ahci_intel_pcs_quirk(struct pci_dev *pdev, struct ahci_host_priv *hpriv); |
|---|
| 86 | 88 | static int ahci_vt8251_hardreset(struct ata_link *link, unsigned int *class, |
|---|
| 87 | 89 | unsigned long deadline); |
|---|
| 88 | 90 | static int ahci_avn_hardreset(struct ata_link *link, unsigned int *class, |
|---|
| .. | .. |
|---|
| 134 | 136 | .udma_mask = ATA_UDMA6, |
|---|
| 135 | 137 | .port_ops = &ahci_ops, |
|---|
| 136 | 138 | }, |
|---|
| 137 | | - [board_ahci_mobile] = { |
|---|
| 139 | + [board_ahci_low_power] = { |
|---|
| 138 | 140 | AHCI_HFLAGS (AHCI_HFLAG_IS_MOBILE), |
|---|
| 139 | 141 | .flags = AHCI_FLAG_COMMON, |
|---|
| 142 | + .pio_mask = ATA_PIO4, |
|---|
| 143 | + .udma_mask = ATA_UDMA6, |
|---|
| 144 | + .port_ops = &ahci_ops, |
|---|
| 145 | + }, |
|---|
| 146 | + [board_ahci_no_debounce_delay] = { |
|---|
| 147 | + .flags = AHCI_FLAG_COMMON, |
|---|
| 148 | + .link_flags = ATA_LFLAG_NO_DEBOUNCE_DELAY, |
|---|
| 140 | 149 | .pio_mask = ATA_PIO4, |
|---|
| 141 | 150 | .udma_mask = ATA_UDMA6, |
|---|
| 142 | 151 | .port_ops = &ahci_ops, |
|---|
| .. | .. |
|---|
| 267 | 276 | { PCI_VDEVICE(INTEL, 0x2924), board_ahci }, /* ICH9 */ |
|---|
| 268 | 277 | { PCI_VDEVICE(INTEL, 0x2925), board_ahci }, /* ICH9 */ |
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| 269 | 278 | { PCI_VDEVICE(INTEL, 0x2927), board_ahci }, /* ICH9 */ |
|---|
| 270 | | - { PCI_VDEVICE(INTEL, 0x2929), board_ahci_mobile }, /* ICH9M */ |
|---|
| 271 | | - { PCI_VDEVICE(INTEL, 0x292a), board_ahci_mobile }, /* ICH9M */ |
|---|
| 272 | | - { PCI_VDEVICE(INTEL, 0x292b), board_ahci_mobile }, /* ICH9M */ |
|---|
| 273 | | - { PCI_VDEVICE(INTEL, 0x292c), board_ahci_mobile }, /* ICH9M */ |
|---|
| 274 | | - { PCI_VDEVICE(INTEL, 0x292f), board_ahci_mobile }, /* ICH9M */ |
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| 279 | + { PCI_VDEVICE(INTEL, 0x2929), board_ahci_low_power }, /* ICH9M */ |
|---|
| 280 | + { PCI_VDEVICE(INTEL, 0x292a), board_ahci_low_power }, /* ICH9M */ |
|---|
| 281 | + { PCI_VDEVICE(INTEL, 0x292b), board_ahci_low_power }, /* ICH9M */ |
|---|
| 282 | + { PCI_VDEVICE(INTEL, 0x292c), board_ahci_low_power }, /* ICH9M */ |
|---|
| 283 | + { PCI_VDEVICE(INTEL, 0x292f), board_ahci_low_power }, /* ICH9M */ |
|---|
| 275 | 284 | { PCI_VDEVICE(INTEL, 0x294d), board_ahci }, /* ICH9 */ |
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| 276 | | - { PCI_VDEVICE(INTEL, 0x294e), board_ahci_mobile }, /* ICH9M */ |
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| 285 | + { PCI_VDEVICE(INTEL, 0x294e), board_ahci_low_power }, /* ICH9M */ |
|---|
| 277 | 286 | { PCI_VDEVICE(INTEL, 0x502a), board_ahci }, /* Tolapai */ |
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| 278 | 287 | { PCI_VDEVICE(INTEL, 0x502b), board_ahci }, /* Tolapai */ |
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| 279 | 288 | { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */ |
|---|
| .. | .. |
|---|
| 283 | 292 | { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */ |
|---|
| 284 | 293 | { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */ |
|---|
| 285 | 294 | { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */ |
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| 286 | | - { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_mobile }, /* PCH M AHCI */ |
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| 295 | + { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */ |
|---|
| 287 | 296 | { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ |
|---|
| 288 | | - { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_mobile }, /* PCH M RAID */ |
|---|
| 297 | + { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci_low_power }, /* PCH M RAID */ |
|---|
| 289 | 298 | { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */ |
|---|
| 290 | 299 | { PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */ |
|---|
| 291 | 300 | { PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */ |
|---|
| .. | .. |
|---|
| 308 | 317 | { PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */ |
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| 309 | 318 | { PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */ |
|---|
| 310 | 319 | { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */ |
|---|
| 311 | | - { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_mobile }, /* CPT M AHCI */ |
|---|
| 320 | + { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_low_power }, /* CPT M AHCI */ |
|---|
| 312 | 321 | { PCI_VDEVICE(INTEL, 0x1c04), board_ahci }, /* CPT RAID */ |
|---|
| 313 | | - { PCI_VDEVICE(INTEL, 0x1c05), board_ahci_mobile }, /* CPT M RAID */ |
|---|
| 322 | + { PCI_VDEVICE(INTEL, 0x1c05), board_ahci_low_power }, /* CPT M RAID */ |
|---|
| 314 | 323 | { PCI_VDEVICE(INTEL, 0x1c06), board_ahci }, /* CPT RAID */ |
|---|
| 315 | 324 | { PCI_VDEVICE(INTEL, 0x1c07), board_ahci }, /* CPT RAID */ |
|---|
| 316 | 325 | { PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */ |
|---|
| .. | .. |
|---|
| 319 | 328 | { PCI_VDEVICE(INTEL, 0x2826), board_ahci }, /* PBG RAID */ |
|---|
| 320 | 329 | { PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */ |
|---|
| 321 | 330 | { PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */ |
|---|
| 322 | | - { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_mobile }, /* Panther M AHCI */ |
|---|
| 331 | + { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_low_power }, /* Panther M AHCI */ |
|---|
| 323 | 332 | { PCI_VDEVICE(INTEL, 0x1e04), board_ahci }, /* Panther Point RAID */ |
|---|
| 324 | 333 | { PCI_VDEVICE(INTEL, 0x1e05), board_ahci }, /* Panther Point RAID */ |
|---|
| 325 | 334 | { PCI_VDEVICE(INTEL, 0x1e06), board_ahci }, /* Panther Point RAID */ |
|---|
| 326 | | - { PCI_VDEVICE(INTEL, 0x1e07), board_ahci_mobile }, /* Panther M RAID */ |
|---|
| 335 | + { PCI_VDEVICE(INTEL, 0x1e07), board_ahci_low_power }, /* Panther M RAID */ |
|---|
| 327 | 336 | { PCI_VDEVICE(INTEL, 0x1e0e), board_ahci }, /* Panther Point RAID */ |
|---|
| 328 | 337 | { PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */ |
|---|
| 329 | | - { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_mobile }, /* Lynx M AHCI */ |
|---|
| 338 | + { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_low_power }, /* Lynx M AHCI */ |
|---|
| 330 | 339 | { PCI_VDEVICE(INTEL, 0x8c04), board_ahci }, /* Lynx Point RAID */ |
|---|
| 331 | | - { PCI_VDEVICE(INTEL, 0x8c05), board_ahci_mobile }, /* Lynx M RAID */ |
|---|
| 340 | + { PCI_VDEVICE(INTEL, 0x8c05), board_ahci_low_power }, /* Lynx M RAID */ |
|---|
| 332 | 341 | { PCI_VDEVICE(INTEL, 0x8c06), board_ahci }, /* Lynx Point RAID */ |
|---|
| 333 | | - { PCI_VDEVICE(INTEL, 0x8c07), board_ahci_mobile }, /* Lynx M RAID */ |
|---|
| 342 | + { PCI_VDEVICE(INTEL, 0x8c07), board_ahci_low_power }, /* Lynx M RAID */ |
|---|
| 334 | 343 | { PCI_VDEVICE(INTEL, 0x8c0e), board_ahci }, /* Lynx Point RAID */ |
|---|
| 335 | | - { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_mobile }, /* Lynx M RAID */ |
|---|
| 336 | | - { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_mobile }, /* Lynx LP AHCI */ |
|---|
| 337 | | - { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_mobile }, /* Lynx LP AHCI */ |
|---|
| 338 | | - { PCI_VDEVICE(INTEL, 0x9c04), board_ahci_mobile }, /* Lynx LP RAID */ |
|---|
| 339 | | - { PCI_VDEVICE(INTEL, 0x9c05), board_ahci_mobile }, /* Lynx LP RAID */ |
|---|
| 340 | | - { PCI_VDEVICE(INTEL, 0x9c06), board_ahci_mobile }, /* Lynx LP RAID */ |
|---|
| 341 | | - { PCI_VDEVICE(INTEL, 0x9c07), board_ahci_mobile }, /* Lynx LP RAID */ |
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| 342 | | - { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_mobile }, /* Lynx LP RAID */ |
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| 343 | | - { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_mobile }, /* Lynx LP RAID */ |
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| 344 | | - { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_mobile }, /* Cannon Lake PCH-LP AHCI */ |
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| 344 | + { PCI_VDEVICE(INTEL, 0x8c0f), board_ahci_low_power }, /* Lynx M RAID */ |
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| 345 | + { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_low_power }, /* Lynx LP AHCI */ |
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| 346 | + { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_low_power }, /* Lynx LP AHCI */ |
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| 347 | + { PCI_VDEVICE(INTEL, 0x9c04), board_ahci_low_power }, /* Lynx LP RAID */ |
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| 348 | + { PCI_VDEVICE(INTEL, 0x9c05), board_ahci_low_power }, /* Lynx LP RAID */ |
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| 349 | + { PCI_VDEVICE(INTEL, 0x9c06), board_ahci_low_power }, /* Lynx LP RAID */ |
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| 350 | + { PCI_VDEVICE(INTEL, 0x9c07), board_ahci_low_power }, /* Lynx LP RAID */ |
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| 351 | + { PCI_VDEVICE(INTEL, 0x9c0e), board_ahci_low_power }, /* Lynx LP RAID */ |
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| 352 | + { PCI_VDEVICE(INTEL, 0x9c0f), board_ahci_low_power }, /* Lynx LP RAID */ |
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| 353 | + { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_low_power }, /* Cannon Lake PCH-LP AHCI */ |
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| 345 | 354 | { PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */ |
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| 346 | 355 | { PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */ |
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| 347 | 356 | { PCI_VDEVICE(INTEL, 0x1f24), board_ahci }, /* Avoton RAID */ |
|---|
| .. | .. |
|---|
| 373 | 382 | { PCI_VDEVICE(INTEL, 0x8d66), board_ahci }, /* Wellsburg RAID */ |
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| 374 | 383 | { PCI_VDEVICE(INTEL, 0x8d6e), board_ahci }, /* Wellsburg RAID */ |
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| 375 | 384 | { PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */ |
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| 376 | | - { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_mobile }, /* Wildcat LP AHCI */ |
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| 377 | | - { PCI_VDEVICE(INTEL, 0x9c85), board_ahci_mobile }, /* Wildcat LP RAID */ |
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| 378 | | - { PCI_VDEVICE(INTEL, 0x9c87), board_ahci_mobile }, /* Wildcat LP RAID */ |
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| 379 | | - { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_mobile }, /* Wildcat LP RAID */ |
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| 385 | + { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_low_power }, /* Wildcat LP AHCI */ |
|---|
| 386 | + { PCI_VDEVICE(INTEL, 0x9c85), board_ahci_low_power }, /* Wildcat LP RAID */ |
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| 387 | + { PCI_VDEVICE(INTEL, 0x9c87), board_ahci_low_power }, /* Wildcat LP RAID */ |
|---|
| 388 | + { PCI_VDEVICE(INTEL, 0x9c8f), board_ahci_low_power }, /* Wildcat LP RAID */ |
|---|
| 380 | 389 | { PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */ |
|---|
| 381 | | - { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_mobile }, /* 9 Series M AHCI */ |
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| 390 | + { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_low_power }, /* 9 Series M AHCI */ |
|---|
| 382 | 391 | { PCI_VDEVICE(INTEL, 0x8c84), board_ahci }, /* 9 Series RAID */ |
|---|
| 383 | | - { PCI_VDEVICE(INTEL, 0x8c85), board_ahci_mobile }, /* 9 Series M RAID */ |
|---|
| 392 | + { PCI_VDEVICE(INTEL, 0x8c85), board_ahci_low_power }, /* 9 Series M RAID */ |
|---|
| 384 | 393 | { PCI_VDEVICE(INTEL, 0x8c86), board_ahci }, /* 9 Series RAID */ |
|---|
| 385 | | - { PCI_VDEVICE(INTEL, 0x8c87), board_ahci_mobile }, /* 9 Series M RAID */ |
|---|
| 394 | + { PCI_VDEVICE(INTEL, 0x8c87), board_ahci_low_power }, /* 9 Series M RAID */ |
|---|
| 386 | 395 | { PCI_VDEVICE(INTEL, 0x8c8e), board_ahci }, /* 9 Series RAID */ |
|---|
| 387 | | - { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_mobile }, /* 9 Series M RAID */ |
|---|
| 388 | | - { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_mobile }, /* Sunrise LP AHCI */ |
|---|
| 389 | | - { PCI_VDEVICE(INTEL, 0x9d05), board_ahci_mobile }, /* Sunrise LP RAID */ |
|---|
| 390 | | - { PCI_VDEVICE(INTEL, 0x9d07), board_ahci_mobile }, /* Sunrise LP RAID */ |
|---|
| 396 | + { PCI_VDEVICE(INTEL, 0x8c8f), board_ahci_low_power }, /* 9 Series M RAID */ |
|---|
| 397 | + { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_low_power }, /* Sunrise LP AHCI */ |
|---|
| 398 | + { PCI_VDEVICE(INTEL, 0x9d05), board_ahci_low_power }, /* Sunrise LP RAID */ |
|---|
| 399 | + { PCI_VDEVICE(INTEL, 0x9d07), board_ahci_low_power }, /* Sunrise LP RAID */ |
|---|
| 391 | 400 | { PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */ |
|---|
| 392 | | - { PCI_VDEVICE(INTEL, 0xa103), board_ahci_mobile }, /* Sunrise M AHCI */ |
|---|
| 401 | + { PCI_VDEVICE(INTEL, 0xa103), board_ahci_low_power }, /* Sunrise M AHCI */ |
|---|
| 393 | 402 | { PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */ |
|---|
| 394 | 403 | { PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */ |
|---|
| 395 | | - { PCI_VDEVICE(INTEL, 0xa107), board_ahci_mobile }, /* Sunrise M RAID */ |
|---|
| 404 | + { PCI_VDEVICE(INTEL, 0xa107), board_ahci_low_power }, /* Sunrise M RAID */ |
|---|
| 396 | 405 | { PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */ |
|---|
| 397 | 406 | { PCI_VDEVICE(INTEL, 0x2822), board_ahci }, /* Lewisburg RAID*/ |
|---|
| 398 | 407 | { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Lewisburg AHCI*/ |
|---|
| .. | .. |
|---|
| 409 | 418 | { PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */ |
|---|
| 410 | 419 | { PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */ |
|---|
| 411 | 420 | { PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */ |
|---|
| 412 | | - { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_mobile }, /* Bay Trail AHCI */ |
|---|
| 413 | | - { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_mobile }, /* Bay Trail AHCI */ |
|---|
| 414 | | - { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_mobile }, /* Cherry Tr. AHCI */ |
|---|
| 415 | | - { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_mobile }, /* ApolloLake AHCI */ |
|---|
| 416 | | - { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_mobile }, /* Ice Lake LP AHCI */ |
|---|
| 417 | | - { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_mobile }, /* Comet Lake PCH-U AHCI */ |
|---|
| 418 | | - { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_mobile }, /* Comet Lake PCH RAID */ |
|---|
| 421 | + { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_low_power }, /* Bay Trail AHCI */ |
|---|
| 422 | + { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_low_power }, /* Bay Trail AHCI */ |
|---|
| 423 | + { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_low_power }, /* Cherry Tr. AHCI */ |
|---|
| 424 | + { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_low_power }, /* ApolloLake AHCI */ |
|---|
| 425 | + { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */ |
|---|
| 426 | + { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */ |
|---|
| 427 | + { PCI_VDEVICE(INTEL, 0x02d7), board_ahci_low_power }, /* Comet Lake PCH RAID */ |
|---|
| 428 | + /* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */ |
|---|
| 429 | + { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */ |
|---|
| 419 | 430 | |
|---|
| 420 | 431 | /* JMicron 360/1/3/5/6, match class to avoid IDE function */ |
|---|
| 421 | 432 | { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
|---|
| .. | .. |
|---|
| 441 | 452 | board_ahci_al }, |
|---|
| 442 | 453 | /* AMD */ |
|---|
| 443 | 454 | { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */ |
|---|
| 455 | + { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */ |
|---|
| 444 | 456 | { PCI_VDEVICE(AMD, 0x7900), board_ahci }, /* AMD CZ */ |
|---|
| 445 | | - { PCI_VDEVICE(AMD, 0x7901), board_ahci_mobile }, /* AMD Green Sardine */ |
|---|
| 457 | + { PCI_VDEVICE(AMD, 0x7901), board_ahci_low_power }, /* AMD Green Sardine */ |
|---|
| 446 | 458 | /* AMD is using RAID class only for ahci controllers */ |
|---|
| 447 | 459 | { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
|---|
| 448 | 460 | PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci }, |
|---|
| .. | .. |
|---|
| 664 | 676 | ahci_save_initial_config(&pdev->dev, hpriv); |
|---|
| 665 | 677 | } |
|---|
| 666 | 678 | |
|---|
| 679 | +static int ahci_pci_reset_controller(struct ata_host *host) |
|---|
| 680 | +{ |
|---|
| 681 | + struct pci_dev *pdev = to_pci_dev(host->dev); |
|---|
| 682 | + struct ahci_host_priv *hpriv = host->private_data; |
|---|
| 683 | + int rc; |
|---|
| 684 | + |
|---|
| 685 | + rc = ahci_reset_controller(host); |
|---|
| 686 | + if (rc) |
|---|
| 687 | + return rc; |
|---|
| 688 | + |
|---|
| 689 | + /* |
|---|
| 690 | + * If platform firmware failed to enable ports, try to enable |
|---|
| 691 | + * them here. |
|---|
| 692 | + */ |
|---|
| 693 | + ahci_intel_pcs_quirk(pdev, hpriv); |
|---|
| 694 | + |
|---|
| 695 | + return 0; |
|---|
| 696 | +} |
|---|
| 697 | + |
|---|
| 667 | 698 | static void ahci_pci_init_controller(struct ata_host *host) |
|---|
| 668 | 699 | { |
|---|
| 669 | 700 | struct ahci_host_priv *hpriv = host->private_data; |
|---|
| .. | .. |
|---|
| 683 | 714 | |
|---|
| 684 | 715 | /* clear port IRQ */ |
|---|
| 685 | 716 | tmp = readl(port_mmio + PORT_IRQ_STAT); |
|---|
| 686 | | - VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp); |
|---|
| 717 | + dev_dbg(&pdev->dev, "PORT_IRQ_STAT 0x%x\n", tmp); |
|---|
| 687 | 718 | if (tmp) |
|---|
| 688 | 719 | writel(tmp, port_mmio + PORT_IRQ_STAT); |
|---|
| 689 | 720 | } |
|---|
| .. | .. |
|---|
| 865 | 896 | struct ata_host *host = pci_get_drvdata(pdev); |
|---|
| 866 | 897 | int rc; |
|---|
| 867 | 898 | |
|---|
| 868 | | - rc = ahci_reset_controller(host); |
|---|
| 899 | + rc = ahci_pci_reset_controller(host); |
|---|
| 869 | 900 | if (rc) |
|---|
| 870 | 901 | return rc; |
|---|
| 871 | 902 | ahci_pci_init_controller(host); |
|---|
| .. | .. |
|---|
| 900 | 931 | ahci_mcp89_apple_enable(pdev); |
|---|
| 901 | 932 | |
|---|
| 902 | 933 | if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { |
|---|
| 903 | | - rc = ahci_reset_controller(host); |
|---|
| 934 | + rc = ahci_pci_reset_controller(host); |
|---|
| 904 | 935 | if (rc) |
|---|
| 905 | 936 | return rc; |
|---|
| 906 | 937 | |
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| .. | .. |
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| 1475 | 1506 | u32 irq_stat, irq_masked; |
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| 1476 | 1507 | unsigned int handled = 1; |
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| 1477 | 1508 | |
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| 1478 | | - VPRINTK("ENTER\n"); |
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| 1479 | 1509 | hpriv = host->private_data; |
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| 1480 | 1510 | mmio = hpriv->mmio; |
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| 1481 | 1511 | irq_stat = readl(mmio + HOST_IRQ_STAT); |
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| .. | .. |
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| 1492 | 1522 | irq_stat = readl(mmio + HOST_IRQ_STAT); |
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| 1493 | 1523 | spin_unlock(&host->lock); |
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| 1494 | 1524 | } while (irq_stat); |
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| 1495 | | - VPRINTK("EXIT\n"); |
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| 1496 | 1525 | |
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| 1497 | 1526 | return IRQ_RETVAL(handled); |
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| 1498 | 1527 | } |
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| .. | .. |
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| 1785 | 1814 | /* save initial config */ |
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| 1786 | 1815 | ahci_pci_save_initial_config(pdev, hpriv); |
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| 1787 | 1816 | |
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| 1788 | | - /* |
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| 1789 | | - * If platform firmware failed to enable ports, try to enable |
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| 1790 | | - * them here. |
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| 1791 | | - */ |
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| 1792 | | - ahci_intel_pcs_quirk(pdev, hpriv); |
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| 1793 | | - |
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| 1794 | 1817 | /* prepare host */ |
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| 1795 | 1818 | if (hpriv->cap & HOST_CAP_NCQ) { |
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| 1796 | 1819 | pi.flags |= ATA_FLAG_NCQ; |
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| .. | .. |
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| 1868 | 1891 | else |
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| 1869 | 1892 | dev_info(&pdev->dev, "SSS flag set, parallel bus scan disabled\n"); |
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| 1870 | 1893 | |
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| 1894 | + if (!(hpriv->cap & HOST_CAP_PART)) |
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| 1895 | + host->flags |= ATA_HOST_NO_PART; |
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| 1896 | + |
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| 1897 | + if (!(hpriv->cap & HOST_CAP_SSC)) |
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| 1898 | + host->flags |= ATA_HOST_NO_SSC; |
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| 1899 | + |
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| 1900 | + if (!(hpriv->cap2 & HOST_CAP2_SDS)) |
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| 1901 | + host->flags |= ATA_HOST_NO_DEVSLP; |
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| 1902 | + |
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| 1871 | 1903 | if (pi.flags & ATA_FLAG_EM) |
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| 1872 | 1904 | ahci_reset_em(host); |
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| 1873 | 1905 | |
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| .. | .. |
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| 1900 | 1932 | if (rc) |
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| 1901 | 1933 | return rc; |
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| 1902 | 1934 | |
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| 1903 | | - rc = ahci_reset_controller(host); |
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| 1935 | + rc = ahci_pci_reset_controller(host); |
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| 1904 | 1936 | if (rc) |
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| 1905 | 1937 | return rc; |
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| 1906 | 1938 | |
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