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| 3 | 3 | * NSC/Cyrix CPU indexed register access. Must be inlined instead of |
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| 4 | 4 | * macros to ensure correct access ordering |
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| 5 | 5 | * Access order is always 0x22 (=offset), 0x23 (=value) |
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| 6 | | - * |
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| 7 | | - * When using the old macros a line like |
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| 8 | | - * setCx86(CX86_CCR2, getCx86(CX86_CCR2) | 0x88); |
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| 9 | | - * gets expanded to: |
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| 10 | | - * do { |
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| 11 | | - * outb((CX86_CCR2), 0x22); |
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| 12 | | - * outb((({ |
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| 13 | | - * outb((CX86_CCR2), 0x22); |
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| 14 | | - * inb(0x23); |
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| 15 | | - * }) | 0x88), 0x23); |
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| 16 | | - * } while (0); |
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| 17 | | - * |
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| 18 | | - * which in fact violates the access order (= 0x22, 0x22, 0x23, 0x23). |
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| 19 | 6 | */ |
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| 20 | 7 | |
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| 21 | 8 | static inline u8 getCx86(u8 reg) |
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| .. | .. |
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| 29 | 16 | outb(reg, 0x22); |
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| 30 | 17 | outb(data, 0x23); |
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| 31 | 18 | } |
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| 32 | | - |
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| 33 | | -#define getCx86_old(reg) ({ outb((reg), 0x22); inb(0x23); }) |
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| 34 | | - |
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| 35 | | -#define setCx86_old(reg, data) do { \ |
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| 36 | | - outb((reg), 0x22); \ |
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| 37 | | - outb((data), 0x23); \ |
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| 38 | | -} while (0) |
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| 39 | | - |
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