| .. | .. |
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| 13 | 13 | |
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| 14 | 14 | config CPU_BIG_ENDIAN |
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| 15 | 15 | bool "Big Endian" |
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| 16 | | - depends on !CPU_SH5 |
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| 17 | 16 | |
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| 18 | 17 | endchoice |
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| 19 | 18 | |
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| .. | .. |
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| 26 | 25 | have FPU units (ie, SH77xx). |
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| 27 | 26 | |
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| 28 | 27 | This option must be set in order to enable the FPU. |
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| 29 | | - |
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| 30 | | -config SH64_FPU_DENORM_FLUSH |
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| 31 | | - bool "Flush floating point denorms to zero" |
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| 32 | | - depends on SH_FPU && SUPERH64 |
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| 33 | 28 | |
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| 34 | 29 | config SH_FPU_EMU |
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| 35 | 30 | def_bool n |
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| .. | .. |
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| 77 | 72 | |
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| 78 | 73 | If unsure, say N. |
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| 79 | 74 | |
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| 80 | | -config SH64_ID2815_WORKAROUND |
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| 81 | | - bool "Include workaround for SH5-101 cut2 silicon defect ID2815" |
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| 82 | | - depends on CPU_SUBTYPE_SH5_101 |
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| 83 | | - |
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| 84 | 75 | config CPU_HAS_INTEVT |
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| 85 | 76 | bool |
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| 86 | 77 | |
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| .. | .. |
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| 94 | 85 | that are lacking this bit must have another method in place for |
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| 95 | 86 | accomplishing what is taken care of by the banked registers. |
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| 96 | 87 | |
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| 97 | | - See <file:Documentation/sh/register-banks.txt> for further |
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| 88 | + See <file:Documentation/sh/register-banks.rst> for further |
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| 98 | 89 | information on SR.RB and register banking in the kernel in general. |
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| 99 | 90 | |
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| 100 | 91 | config CPU_HAS_PTEAEX |
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