| .. | .. |
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| 6 | 6 | * for more details. |
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| 7 | 7 | * |
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| 8 | 8 | * Copyright (C) 1998 Harald Koerfgen |
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| 9 | | - * Copyright (C) 2000, 2001, 2002, 2003, 2005 Maciej W. Rozycki |
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| 9 | + * Copyright (C) 2000, 2001, 2002, 2003, 2005, 2020 Maciej W. Rozycki |
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| 10 | 10 | */ |
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| 11 | 11 | #include <linux/console.h> |
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| 12 | 12 | #include <linux/export.h> |
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| .. | .. |
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| 15 | 15 | #include <linux/ioport.h> |
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| 16 | 16 | #include <linux/irq.h> |
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| 17 | 17 | #include <linux/irqnr.h> |
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| 18 | +#include <linux/memblock.h> |
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| 18 | 19 | #include <linux/param.h> |
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| 19 | 20 | #include <linux/percpu-defs.h> |
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| 20 | 21 | #include <linux/sched.h> |
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| .. | .. |
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| 22 | 23 | #include <linux/types.h> |
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| 23 | 24 | #include <linux/pm.h> |
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| 24 | 25 | |
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| 26 | +#include <asm/addrspace.h> |
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| 25 | 27 | #include <asm/bootinfo.h> |
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| 26 | 28 | #include <asm/cpu.h> |
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| 27 | 29 | #include <asm/cpu-features.h> |
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| .. | .. |
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| 29 | 31 | #include <asm/irq.h> |
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| 30 | 32 | #include <asm/irq_cpu.h> |
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| 31 | 33 | #include <asm/mipsregs.h> |
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| 34 | +#include <asm/page.h> |
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| 32 | 35 | #include <asm/reboot.h> |
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| 36 | +#include <asm/sections.h> |
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| 33 | 37 | #include <asm/time.h> |
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| 34 | 38 | #include <asm/traps.h> |
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| 35 | 39 | #include <asm/wbflush.h> |
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| .. | .. |
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| 103 | 107 | int cpu_fpu_mask = DEC_CPU_IRQ_MASK(DEC_CPU_INR_FPU); |
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| 104 | 108 | int *fpu_kstat_irq; |
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| 105 | 109 | |
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| 106 | | -static struct irqaction ioirq = { |
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| 107 | | - .handler = no_action, |
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| 108 | | - .name = "cascade", |
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| 109 | | - .flags = IRQF_NO_THREAD, |
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| 110 | | -}; |
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| 111 | | -static struct irqaction fpuirq = { |
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| 112 | | - .handler = no_action, |
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| 113 | | - .name = "fpu", |
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| 114 | | - .flags = IRQF_NO_THREAD, |
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| 115 | | -}; |
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| 116 | | - |
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| 117 | | -static struct irqaction busirq = { |
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| 118 | | - .name = "bus error", |
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| 119 | | - .flags = IRQF_NO_THREAD, |
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| 120 | | -}; |
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| 121 | | - |
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| 122 | | -static struct irqaction haltirq = { |
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| 123 | | - .handler = dec_intr_halt, |
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| 124 | | - .name = "halt", |
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| 125 | | - .flags = IRQF_NO_THREAD, |
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| 126 | | -}; |
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| 127 | | - |
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| 110 | +static irq_handler_t busirq_handler; |
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| 111 | +static unsigned int busirq_flags = IRQF_NO_THREAD; |
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| 128 | 112 | |
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| 129 | 113 | /* |
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| 130 | 114 | * Bus error (DBE/IBE exceptions and bus interrupts) handling setup. |
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| .. | .. |
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| 134 | 118 | switch (mips_machtype) { |
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| 135 | 119 | case MACH_DS23100: /* DS2100/DS3100 Pmin/Pmax */ |
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| 136 | 120 | board_be_handler = dec_kn01_be_handler; |
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| 137 | | - busirq.handler = dec_kn01_be_interrupt; |
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| 138 | | - busirq.flags |= IRQF_SHARED; |
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| 121 | + busirq_handler = dec_kn01_be_interrupt; |
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| 122 | + busirq_flags |= IRQF_SHARED; |
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| 139 | 123 | dec_kn01_be_init(); |
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| 140 | 124 | break; |
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| 141 | 125 | case MACH_DS5000_1XX: /* DS5000/1xx 3min */ |
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| 142 | 126 | case MACH_DS5000_XX: /* DS5000/xx Maxine */ |
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| 143 | 127 | board_be_handler = dec_kn02xa_be_handler; |
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| 144 | | - busirq.handler = dec_kn02xa_be_interrupt; |
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| 128 | + busirq_handler = dec_kn02xa_be_interrupt; |
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| 145 | 129 | dec_kn02xa_be_init(); |
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| 146 | 130 | break; |
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| 147 | 131 | case MACH_DS5000_200: /* DS5000/200 3max */ |
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| 148 | 132 | case MACH_DS5000_2X0: /* DS5000/240 3max+ */ |
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| 149 | 133 | case MACH_DS5900: /* DS5900 bigmax */ |
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| 150 | 134 | board_be_handler = dec_ecc_be_handler; |
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| 151 | | - busirq.handler = dec_ecc_be_interrupt; |
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| 135 | + busirq_handler = dec_ecc_be_interrupt; |
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| 152 | 136 | dec_ecc_be_init(); |
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| 153 | 137 | break; |
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| 154 | 138 | } |
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| .. | .. |
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| 166 | 150 | |
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| 167 | 151 | ioport_resource.start = ~0UL; |
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| 168 | 152 | ioport_resource.end = 0UL; |
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| 153 | + |
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| 154 | + /* Stay away from the firmware working memory area for now. */ |
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| 155 | + memblock_reserve(PHYS_OFFSET, __pa_symbol(&_text) - PHYS_OFFSET); |
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| 169 | 156 | } |
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| 170 | 157 | |
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| 171 | 158 | /* |
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| .. | .. |
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| 759 | 746 | dec_interrupt[DEC_IRQ_HALT] = -1; |
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| 760 | 747 | |
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| 761 | 748 | /* Register board interrupts: FPU and cascade. */ |
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| 762 | | - if (dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) { |
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| 749 | + if (IS_ENABLED(CONFIG_MIPS_FP_SUPPORT) && |
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| 750 | + dec_interrupt[DEC_IRQ_FPU] >= 0 && cpu_has_fpu) { |
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| 763 | 751 | struct irq_desc *desc_fpu; |
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| 764 | 752 | int irq_fpu; |
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| 765 | 753 | |
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| 766 | 754 | irq_fpu = dec_interrupt[DEC_IRQ_FPU]; |
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| 767 | | - setup_irq(irq_fpu, &fpuirq); |
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| 755 | + if (request_irq(irq_fpu, no_action, IRQF_NO_THREAD, "fpu", |
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| 756 | + NULL)) |
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| 757 | + pr_err("Failed to register fpu interrupt\n"); |
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| 768 | 758 | desc_fpu = irq_to_desc(irq_fpu); |
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| 769 | 759 | fpu_kstat_irq = this_cpu_ptr(desc_fpu->kstat_irqs); |
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| 770 | 760 | } |
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| 771 | | - if (dec_interrupt[DEC_IRQ_CASCADE] >= 0) |
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| 772 | | - setup_irq(dec_interrupt[DEC_IRQ_CASCADE], &ioirq); |
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| 773 | | - |
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| 761 | + if (dec_interrupt[DEC_IRQ_CASCADE] >= 0) { |
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| 762 | + if (request_irq(dec_interrupt[DEC_IRQ_CASCADE], no_action, |
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| 763 | + IRQF_NO_THREAD, "cascade", NULL)) |
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| 764 | + pr_err("Failed to register cascade interrupt\n"); |
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| 765 | + } |
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| 774 | 766 | /* Register the bus error interrupt. */ |
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| 775 | | - if (dec_interrupt[DEC_IRQ_BUS] >= 0 && busirq.handler) |
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| 776 | | - setup_irq(dec_interrupt[DEC_IRQ_BUS], &busirq); |
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| 777 | | - |
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| 767 | + if (dec_interrupt[DEC_IRQ_BUS] >= 0 && busirq_handler) { |
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| 768 | + if (request_irq(dec_interrupt[DEC_IRQ_BUS], busirq_handler, |
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| 769 | + busirq_flags, "bus error", busirq_handler)) |
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| 770 | + pr_err("Failed to register bus error interrupt\n"); |
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| 771 | + } |
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| 778 | 772 | /* Register the HALT interrupt. */ |
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| 779 | | - if (dec_interrupt[DEC_IRQ_HALT] >= 0) |
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| 780 | | - setup_irq(dec_interrupt[DEC_IRQ_HALT], &haltirq); |
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| 773 | + if (dec_interrupt[DEC_IRQ_HALT] >= 0) { |
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| 774 | + if (request_irq(dec_interrupt[DEC_IRQ_HALT], dec_intr_halt, |
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| 775 | + IRQF_NO_THREAD, "halt", NULL)) |
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| 776 | + pr_err("Failed to register halt interrupt\n"); |
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| 777 | + } |
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| 781 | 778 | } |
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| 782 | 779 | |
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| 783 | 780 | asmlinkage unsigned int dec_irq_dispatch(unsigned int irq) |
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