| .. | .. |
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| 50 | 50 | return IRQ_HANDLED; |
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| 51 | 51 | } |
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| 52 | 52 | |
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| 53 | | -static struct irqaction mcfslt_profile_irq = { |
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| 54 | | - .name = "profile timer", |
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| 55 | | - .flags = IRQF_TIMER, |
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| 56 | | - .handler = mcfslt_profile_tick, |
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| 57 | | -}; |
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| 58 | | - |
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| 59 | 53 | void mcfslt_profile_init(void) |
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| 60 | 54 | { |
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| 55 | + int ret; |
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| 56 | + |
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| 61 | 57 | printk(KERN_INFO "PROFILE: lodging TIMER 1 @ %dHz as profile timer\n", |
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| 62 | 58 | PROFILEHZ); |
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| 63 | 59 | |
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| 64 | | - setup_irq(MCF_IRQ_PROFILER, &mcfslt_profile_irq); |
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| 60 | + ret = request_irq(MCF_IRQ_PROFILER, mcfslt_profile_tick, IRQF_TIMER, |
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| 61 | + "profile timer", NULL); |
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| 62 | + if (ret) { |
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| 63 | + pr_err("Failed to request irq %d (profile timer): %pe\n", |
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| 64 | + MCF_IRQ_PROFILER, ERR_PTR(ret)); |
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| 65 | + } |
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| 65 | 66 | |
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| 66 | 67 | /* Set up TIMER 2 as high speed profile clock */ |
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| 67 | 68 | __raw_writel(MCF_BUSCLK / PROFILEHZ - 1, PA(MCFSLT_STCNT)); |
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| .. | .. |
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| 92 | 93 | return timer_interrupt(irq, dummy); |
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| 93 | 94 | } |
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| 94 | 95 | |
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| 95 | | -static struct irqaction mcfslt_timer_irq = { |
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| 96 | | - .name = "timer", |
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| 97 | | - .flags = IRQF_TIMER, |
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| 98 | | - .handler = mcfslt_tick, |
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| 99 | | -}; |
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| 100 | | - |
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| 101 | 96 | static u64 mcfslt_read_clk(struct clocksource *cs) |
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| 102 | 97 | { |
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| 103 | 98 | unsigned long flags; |
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| .. | .. |
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| 126 | 121 | |
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| 127 | 122 | void hw_timer_init(irq_handler_t handler) |
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| 128 | 123 | { |
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| 124 | + int r; |
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| 125 | + |
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| 129 | 126 | mcfslt_cycles_per_jiffy = MCF_BUSCLK / HZ; |
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| 130 | 127 | /* |
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| 131 | 128 | * The coldfire slice timer (SLT) runs from STCNT to 0 included, |
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| .. | .. |
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| 140 | 137 | mcfslt_cnt = mcfslt_cycles_per_jiffy; |
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| 141 | 138 | |
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| 142 | 139 | timer_interrupt = handler; |
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| 143 | | - setup_irq(MCF_IRQ_TIMER, &mcfslt_timer_irq); |
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| 140 | + r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL); |
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| 141 | + if (r) { |
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| 142 | + pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER, |
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| 143 | + ERR_PTR(r)); |
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| 144 | + } |
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| 144 | 145 | |
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| 145 | 146 | clocksource_register_hz(&mcfslt_clk, MCF_BUSCLK); |
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| 146 | 147 | |
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