| .. | .. |
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| 50 | 50 | |
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| 51 | 51 | /* find base address */ |
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| 52 | 52 | offset = (CYCLONE_CBAR_ADDR); |
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| 53 | | - reg = ioremap_nocache(offset, sizeof(u64)); |
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| 53 | + reg = ioremap(offset, sizeof(u64)); |
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| 54 | 54 | if(!reg){ |
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| 55 | 55 | printk(KERN_ERR "Summit chipset: Could not find valid CBAR" |
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| 56 | 56 | " register.\n"); |
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| .. | .. |
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| 68 | 68 | |
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| 69 | 69 | /* setup PMCC */ |
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| 70 | 70 | offset = (base + CYCLONE_PMCC_OFFSET); |
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| 71 | | - reg = ioremap_nocache(offset, sizeof(u64)); |
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| 71 | + reg = ioremap(offset, sizeof(u64)); |
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| 72 | 72 | if(!reg){ |
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| 73 | 73 | printk(KERN_ERR "Summit chipset: Could not find valid PMCC" |
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| 74 | 74 | " register.\n"); |
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| .. | .. |
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| 80 | 80 | |
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| 81 | 81 | /* setup MPCS */ |
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| 82 | 82 | offset = (base + CYCLONE_MPCS_OFFSET); |
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| 83 | | - reg = ioremap_nocache(offset, sizeof(u64)); |
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| 83 | + reg = ioremap(offset, sizeof(u64)); |
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| 84 | 84 | if(!reg){ |
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| 85 | 85 | printk(KERN_ERR "Summit chipset: Could not find valid MPCS" |
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| 86 | 86 | " register.\n"); |
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| .. | .. |
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| 92 | 92 | |
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| 93 | 93 | /* map in cyclone_timer */ |
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| 94 | 94 | offset = (base + CYCLONE_MPMC_OFFSET); |
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| 95 | | - cyclone_timer = ioremap_nocache(offset, sizeof(u32)); |
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| 95 | + cyclone_timer = ioremap(offset, sizeof(u32)); |
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| 96 | 96 | if(!cyclone_timer){ |
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| 97 | 97 | printk(KERN_ERR "Summit chipset: Could not find valid MPMC" |
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| 98 | 98 | " register.\n"); |
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