change system file

hc

2024-10-09 244b2c5ca8b14627e4a17755e5922221e121c771

 kernel/arch/arm/kernel/bios32.c
..
..
@@ -252,23 +252,6 @@
252
252
 }
253
253
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
254
254
 
255
-static void pci_fixup_it8152(struct pci_dev *dev)
256
-{
257
-	int i;
258
-	/* fixup for ITE 8152 devices */
259
-	/* FIXME: add defines for class 0x68000 and 0x80103 */
260
-	if ((dev->class >> 8) == PCI_CLASS_BRIDGE_HOST ||
261
-	    dev->class == 0x68000 ||
262
-	    dev->class == 0x80103) {
263
-		for (i = 0; i < PCI_NUM_RESOURCES; i++) {
264
-			dev->resource[i].start = 0;
265
-			dev->resource[i].end   = 0;
266
-			dev->resource[i].flags = 0;
267
-		}
268
-	}
269
-}
270
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ITE, PCI_DEVICE_ID_ITE_8152, pci_fixup_it8152);
271
-
272
255
 /*
273
256
  * If the bus contains any of these devices, then we must not turn on
274
257
  * parity checking of any kind.  Currently this is CyberPro 20x0 only.
..
..
@@ -411,8 +394,7 @@
411
394
 	return irq;
412
395
 }
413
396
 
414
-static int pcibios_init_resource(int busnr, struct pci_sys_data *sys,
415
-				 int io_optional)
397
+static int pcibios_init_resource(int busnr, struct pci_sys_data *sys)
416
398
 {
417
399
 	int ret;
418
400
 	struct resource_entry *window;
..
..
@@ -421,14 +403,6 @@
421
403
 		pci_add_resource_offset(&sys->resources,
422
404
 			 &iomem_resource, sys->mem_offset);
423
405
 	}
424
-
425
-	/*
426
-	 * If a platform says I/O port support is optional, we don't add
427
-	 * the default I/O space.  The platform is responsible for adding
428
-	 * any I/O space it needs.
429
-	 */
430
-	if (io_optional)
431
-		return 0;
432
406
 
433
407
 	resource_list_for_each_entry(window, &sys->resources)
434
408
 		if (resource_type(window->res) == IORESOURCE_IO)
..
..
@@ -479,7 +453,7 @@
479
453
 
480
454
 		if (ret > 0) {
481
455
 
482
-			ret = pcibios_init_resource(nr, sys, hw->io_optional);
456
+			ret = pcibios_init_resource(nr, sys);
483
457
 			if (ret)  {
484
458
 				pci_free_host_bridge(bridge);
485
459
 				break;
..
..
@@ -497,9 +471,6 @@
497
471
 				bridge->sysdata = sys;
498
472
 				bridge->busnr = sys->busnr;
499
473
 				bridge->ops = hw->ops;
500
-				bridge->msi = hw->msi_ctrl;
501
-				bridge->align_resource =
502
-						hw->align_resource;
503
474
 
504
475
 				ret = pci_scan_root_bus_bridge(bridge);
505
476
 			}