| .. | .. | 
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|  | 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ | 
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| 1 | 2 | /* | 
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| 2 | 3 | * Copyright (C) 2016, Semihalf | 
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| 3 | 4 | *	Author: Tomasz Nowicki <tn@semihalf.com> | 
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| 4 |  | - * | 
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| 5 |  | - * This program is free software; you can redistribute it and/or modify it | 
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| 6 |  | - * under the terms and conditions of the GNU General Public License, | 
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| 7 |  | - * version 2, as published by the Free Software Foundation. | 
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| 8 |  | - * | 
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| 9 |  | - * This program is distributed in the hope it will be useful, but WITHOUT | 
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| 10 |  | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
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| 11 |  | - * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for | 
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| 12 |  | - * more details. | 
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| 13 |  | - * | 
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| 14 |  | - * You should have received a copy of the GNU General Public License along with | 
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| 15 |  | - * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | 
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| 16 |  | - * Place - Suite 330, Boston, MA 02111-1307 USA. | 
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| 17 | 5 | */ | 
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| 18 | 6 |  | 
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| 19 | 7 | #ifndef __ACPI_IORT_H__ | 
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| .. | .. | 
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| 26 | 14 | #define IORT_IRQ_MASK(irq)		(irq & 0xffffffffULL) | 
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| 27 | 15 | #define IORT_IRQ_TRIGGER_MASK(irq)	((irq >> 32) & 0xffffffffULL) | 
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| 28 | 16 |  | 
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|  | 17 | +/* | 
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|  | 18 | + * PMCG model identifiers for use in smmu pmu driver. Please note | 
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|  | 19 | + * that this is purely for the use of software and has nothing to | 
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|  | 20 | + * do with hardware or with IORT specification. | 
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|  | 21 | + */ | 
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|  | 22 | +#define IORT_SMMU_V3_PMCG_GENERIC        0x00000000 /* Generic SMMUv3 PMCG */ | 
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|  | 23 | +#define IORT_SMMU_V3_PMCG_HISI_HIP08     0x00000001 /* HiSilicon HIP08 PMCG */ | 
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|  | 24 | +#define IORT_SMMU_V3_PMCG_HISI_HIP09     0x00000002 /* HiSilicon HIP09 PMCG */ | 
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|  | 25 | + | 
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| 29 | 26 | int iort_register_domain_token(int trans_id, phys_addr_t base, | 
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| 30 | 27 | struct fwnode_handle *fw_node); | 
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| 31 | 28 | void iort_deregister_domain_token(int trans_id); | 
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| 32 | 29 | struct fwnode_handle *iort_find_domain_token(int trans_id); | 
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| 33 | 30 | #ifdef CONFIG_ACPI_IORT | 
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| 34 | 31 | void acpi_iort_init(void); | 
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| 35 |  | -u32 iort_msi_map_rid(struct device *dev, u32 req_id); | 
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| 36 |  | -struct irq_domain *iort_get_device_domain(struct device *dev, u32 req_id); | 
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|  | 32 | +u32 iort_msi_map_id(struct device *dev, u32 id); | 
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|  | 33 | +struct irq_domain *iort_get_device_domain(struct device *dev, u32 id, | 
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|  | 34 | +					  enum irq_domain_bus_token bus_token); | 
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| 37 | 35 | void acpi_configure_pmsi_domain(struct device *dev); | 
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| 38 | 36 | int iort_pmsi_get_dev_id(struct device *dev, u32 *dev_id); | 
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| 39 | 37 | /* IOMMU interface */ | 
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| 40 | 38 | void iort_dma_setup(struct device *dev, u64 *dma_addr, u64 *size); | 
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| 41 |  | -const struct iommu_ops *iort_iommu_configure(struct device *dev); | 
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|  | 39 | +const struct iommu_ops *iort_iommu_configure_id(struct device *dev, | 
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|  | 40 | +						const u32 *id_in); | 
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| 42 | 41 | int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head); | 
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|  | 42 | +phys_addr_t acpi_iort_dma_get_max_cpu_address(void); | 
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| 43 | 43 | #else | 
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| 44 | 44 | static inline void acpi_iort_init(void) { } | 
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| 45 |  | -static inline u32 iort_msi_map_rid(struct device *dev, u32 req_id) | 
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| 46 |  | -{ return req_id; } | 
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| 47 |  | -static inline struct irq_domain *iort_get_device_domain(struct device *dev, | 
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| 48 |  | -							u32 req_id) | 
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|  | 45 | +static inline u32 iort_msi_map_id(struct device *dev, u32 id) | 
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|  | 46 | +{ return id; } | 
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|  | 47 | +static inline struct irq_domain *iort_get_device_domain( | 
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|  | 48 | +	struct device *dev, u32 id, enum irq_domain_bus_token bus_token) | 
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| 49 | 49 | { return NULL; } | 
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| 50 | 50 | static inline void acpi_configure_pmsi_domain(struct device *dev) { } | 
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| 51 | 51 | /* IOMMU interface */ | 
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| 52 | 52 | static inline void iort_dma_setup(struct device *dev, u64 *dma_addr, | 
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| 53 | 53 | u64 *size) { } | 
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| 54 |  | -static inline const struct iommu_ops *iort_iommu_configure( | 
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| 55 |  | -				      struct device *dev) | 
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|  | 54 | +static inline const struct iommu_ops *iort_iommu_configure_id( | 
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|  | 55 | +				      struct device *dev, const u32 *id_in) | 
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| 56 | 56 | { return NULL; } | 
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| 57 | 57 | static inline | 
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| 58 | 58 | int iort_iommu_msi_get_resv_regions(struct device *dev, struct list_head *head) | 
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| 59 | 59 | { return 0; } | 
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|  | 60 | + | 
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|  | 61 | +static inline phys_addr_t acpi_iort_dma_get_max_cpu_address(void) | 
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|  | 62 | +{ return PHYS_ADDR_MAX; } | 
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| 60 | 63 | #endif | 
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| 61 | 64 |  | 
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| 62 | 65 | #endif /* __ACPI_IORT_H__ */ | 
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