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1 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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2 | | -#ifndef __ASM_CACHEFLUSH_H |
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3 | | -#define __ASM_CACHEFLUSH_H |
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| 2 | +#ifndef _ASM_GENERIC_CACHEFLUSH_H |
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| 3 | +#define _ASM_GENERIC_CACHEFLUSH_H |
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4 | 4 | |
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5 | | -/* Keep includes the same across arches. */ |
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6 | | -#include <linux/mm.h> |
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| 5 | +struct mm_struct; |
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| 6 | +struct vm_area_struct; |
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| 7 | +struct page; |
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| 8 | +struct address_space; |
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7 | 9 | |
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8 | 10 | /* |
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9 | 11 | * The cache doesn't need to be flushed when TLB entries change when |
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10 | 12 | * the cache is mapped to physical memory, not virtual memory |
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11 | 13 | */ |
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12 | | -#define flush_cache_all() do { } while (0) |
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13 | | -#define flush_cache_mm(mm) do { } while (0) |
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14 | | -#define flush_cache_dup_mm(mm) do { } while (0) |
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15 | | -#define flush_cache_range(vma, start, end) do { } while (0) |
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16 | | -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) |
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17 | | -#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 |
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18 | | -#define flush_dcache_page(page) do { } while (0) |
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19 | | -#define flush_dcache_mmap_lock(mapping) do { } while (0) |
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20 | | -#define flush_dcache_mmap_unlock(mapping) do { } while (0) |
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21 | | -#define flush_icache_range(start, end) do { } while (0) |
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22 | | -#define flush_icache_page(vma,pg) do { } while (0) |
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23 | | -#define flush_icache_user_range(vma,pg,adr,len) do { } while (0) |
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24 | | -#define flush_cache_vmap(start, end) do { } while (0) |
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25 | | -#define flush_cache_vunmap(start, end) do { } while (0) |
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| 14 | +#ifndef flush_cache_all |
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| 15 | +static inline void flush_cache_all(void) |
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| 16 | +{ |
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| 17 | +} |
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| 18 | +#endif |
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26 | 19 | |
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27 | | -#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
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| 20 | +#ifndef flush_cache_mm |
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| 21 | +static inline void flush_cache_mm(struct mm_struct *mm) |
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| 22 | +{ |
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| 23 | +} |
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| 24 | +#endif |
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| 25 | + |
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| 26 | +#ifndef flush_cache_dup_mm |
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| 27 | +static inline void flush_cache_dup_mm(struct mm_struct *mm) |
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| 28 | +{ |
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| 29 | +} |
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| 30 | +#endif |
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| 31 | + |
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| 32 | +#ifndef flush_cache_range |
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| 33 | +static inline void flush_cache_range(struct vm_area_struct *vma, |
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| 34 | + unsigned long start, |
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| 35 | + unsigned long end) |
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| 36 | +{ |
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| 37 | +} |
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| 38 | +#endif |
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| 39 | + |
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| 40 | +#ifndef flush_cache_page |
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| 41 | +static inline void flush_cache_page(struct vm_area_struct *vma, |
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| 42 | + unsigned long vmaddr, |
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| 43 | + unsigned long pfn) |
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| 44 | +{ |
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| 45 | +} |
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| 46 | +#endif |
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| 47 | + |
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| 48 | +#ifndef ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE |
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| 49 | +static inline void flush_dcache_page(struct page *page) |
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| 50 | +{ |
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| 51 | +} |
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| 52 | +#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 |
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| 53 | +#endif |
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| 54 | + |
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| 55 | + |
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| 56 | +#ifndef flush_dcache_mmap_lock |
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| 57 | +static inline void flush_dcache_mmap_lock(struct address_space *mapping) |
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| 58 | +{ |
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| 59 | +} |
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| 60 | +#endif |
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| 61 | + |
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| 62 | +#ifndef flush_dcache_mmap_unlock |
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| 63 | +static inline void flush_dcache_mmap_unlock(struct address_space *mapping) |
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| 64 | +{ |
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| 65 | +} |
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| 66 | +#endif |
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| 67 | + |
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| 68 | +#ifndef flush_icache_range |
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| 69 | +static inline void flush_icache_range(unsigned long start, unsigned long end) |
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| 70 | +{ |
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| 71 | +} |
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| 72 | +#endif |
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| 73 | + |
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| 74 | +#ifndef flush_icache_user_range |
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| 75 | +#define flush_icache_user_range flush_icache_range |
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| 76 | +#endif |
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| 77 | + |
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| 78 | +#ifndef flush_icache_page |
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| 79 | +static inline void flush_icache_page(struct vm_area_struct *vma, |
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| 80 | + struct page *page) |
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| 81 | +{ |
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| 82 | +} |
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| 83 | +#endif |
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| 84 | + |
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| 85 | +#ifndef flush_icache_user_page |
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| 86 | +static inline void flush_icache_user_page(struct vm_area_struct *vma, |
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| 87 | + struct page *page, |
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| 88 | + unsigned long addr, int len) |
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| 89 | +{ |
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| 90 | +} |
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| 91 | +#endif |
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| 92 | + |
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| 93 | +#ifndef flush_cache_vmap |
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| 94 | +static inline void flush_cache_vmap(unsigned long start, unsigned long end) |
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| 95 | +{ |
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| 96 | +} |
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| 97 | +#endif |
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| 98 | + |
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| 99 | +#ifndef flush_cache_vunmap |
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| 100 | +static inline void flush_cache_vunmap(unsigned long start, unsigned long end) |
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| 101 | +{ |
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| 102 | +} |
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| 103 | +#endif |
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| 104 | + |
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| 105 | +#ifndef copy_to_user_page |
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| 106 | +#define copy_to_user_page(vma, page, vaddr, dst, src, len) \ |
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28 | 107 | do { \ |
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29 | 108 | memcpy(dst, src, len); \ |
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30 | | - flush_icache_user_range(vma, page, vaddr, len); \ |
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| 109 | + flush_icache_user_page(vma, page, vaddr, len); \ |
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31 | 110 | } while (0) |
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| 111 | +#endif |
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| 112 | + |
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| 113 | +#ifndef copy_from_user_page |
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32 | 114 | #define copy_from_user_page(vma, page, vaddr, dst, src, len) \ |
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33 | 115 | memcpy(dst, src, len) |
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| 116 | +#endif |
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34 | 117 | |
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35 | | -#endif /* __ASM_CACHEFLUSH_H */ |
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| 118 | +#endif /* _ASM_GENERIC_CACHEFLUSH_H */ |
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