forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a
kernel/drivers/staging/vt6655/baseband.c
....@@ -12,12 +12,10 @@
1212 * Date: Aug.22, 2002
1313 *
1414 * Functions:
15
- * BBuGetFrameTime - Calculate data frame transmitting time
16
- * BBvCaculateParameter - Caculate PhyLength, PhyService and Phy Signal
17
- * parameter for baseband Tx
18
- * BBbReadEmbedded - Embedded read baseband register via MAC
19
- * BBbWriteEmbedded - Embedded write baseband register via MAC
20
- * BBbVT3253Init - VIA VT3253 baseband chip init code
15
+ * bb_get_frame_time - Calculate data frame transmitting time
16
+ * bb_read_embedded - Embedded read baseband register via MAC
17
+ * bb_write_embedded - Embedded write baseband register via MAC
18
+ * bb_vt3253_init - VIA VT3253 baseband chip init code
2119 *
2220 * Revision History:
2321 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
....@@ -1695,57 +1693,53 @@
16951693 *
16961694 * Parameters:
16971695 * In:
1698
- * byPreambleType - Preamble Type
1699
- * byPktType - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1700
- * cbFrameLength - Baseband Type
1701
- * wRate - Tx Rate
1696
+ * by_preamble_type - Preamble Type
1697
+ * by_pkt_type - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1698
+ * cb_frame_length - Baseband Type
1699
+ * tx_rate - Tx Rate
17021700 * Out:
17031701 *
17041702 * Return Value: FrameTime
17051703 *
17061704 */
1707
-unsigned int
1708
-BBuGetFrameTime(
1709
- unsigned char byPreambleType,
1710
- unsigned char byPktType,
1711
- unsigned int cbFrameLength,
1712
- unsigned short wRate
1713
-)
1705
+unsigned int bb_get_frame_time(unsigned char by_preamble_type,
1706
+ unsigned char by_pkt_type,
1707
+ unsigned int cb_frame_length,
1708
+ unsigned short tx_rate)
17141709 {
1715
- unsigned int uFrameTime;
1716
- unsigned int uPreamble;
1717
- unsigned int uTmp;
1718
- unsigned int uRateIdx = (unsigned int)wRate;
1719
- unsigned int uRate = 0;
1710
+ unsigned int frame_time;
1711
+ unsigned int preamble;
1712
+ unsigned int tmp;
1713
+ unsigned int rate_idx = (unsigned int)tx_rate;
1714
+ unsigned int rate = 0;
17201715
1721
- if (uRateIdx > RATE_54M)
1716
+ if (rate_idx > RATE_54M)
17221717 return 0;
17231718
1724
- uRate = (unsigned int)awcFrameTime[uRateIdx];
1719
+ rate = (unsigned int)awcFrameTime[rate_idx];
17251720
1726
- if (uRateIdx <= 3) { /* CCK mode */
1727
- if (byPreambleType == 1) /* Short */
1728
- uPreamble = 96;
1721
+ if (rate_idx <= 3) { /* CCK mode */
1722
+ if (by_preamble_type == 1) /* Short */
1723
+ preamble = 96;
17291724 else
1730
- uPreamble = 192;
1725
+ preamble = 192;
1726
+ frame_time = (cb_frame_length * 80) / rate; /* ????? */
1727
+ tmp = (frame_time * rate) / 80;
1728
+ if (cb_frame_length != tmp)
1729
+ frame_time++;
17311730
1732
- uFrameTime = (cbFrameLength * 80) / uRate; /* ????? */
1733
- uTmp = (uFrameTime * uRate) / 80;
1734
- if (cbFrameLength != uTmp)
1735
- uFrameTime++;
1736
-
1737
- return uPreamble + uFrameTime;
1731
+ return preamble + frame_time;
17381732 }
1739
- uFrameTime = (cbFrameLength * 8 + 22) / uRate; /* ???????? */
1740
- uTmp = ((uFrameTime * uRate) - 22) / 8;
1741
- if (cbFrameLength != uTmp)
1742
- uFrameTime++;
1733
+ frame_time = (cb_frame_length * 8 + 22) / rate; /* ???????? */
1734
+ tmp = ((frame_time * rate) - 22) / 8;
1735
+ if (cb_frame_length != tmp)
1736
+ frame_time++;
17431737
1744
- uFrameTime = uFrameTime * 4; /* ??????? */
1745
- if (byPktType != PK_TYPE_11A)
1746
- uFrameTime += 6; /* ?????? */
1738
+ frame_time = frame_time * 4; /* ??????? */
1739
+ if (by_pkt_type != PK_TYPE_11A)
1740
+ frame_time += 6; /* ?????? */
17471741
1748
- return 20 + uFrameTime; /* ?????? */
1742
+ return 20 + frame_time; /* ?????? */
17491743 }
17501744
17511745 /*
....@@ -1903,34 +1897,34 @@
19031897 * Parameters:
19041898 * In:
19051899 * iobase - I/O base address
1906
- * byBBAddr - address of register in Baseband
1900
+ * by_bb_addr - address of register in Baseband
19071901 * Out:
1908
- * pbyData - data read
1902
+ * pby_data - data read
19091903 *
19101904 * Return Value: true if succeeded; false if failed.
19111905 *
19121906 */
1913
-bool BBbReadEmbedded(struct vnt_private *priv,
1914
- unsigned char byBBAddr, unsigned char *pbyData)
1907
+bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
1908
+ unsigned char *pby_data)
19151909 {
19161910 void __iomem *iobase = priv->PortOffset;
19171911 unsigned short ww;
1918
- unsigned char byValue;
1912
+ unsigned char by_value;
19191913
19201914 /* BB reg offset */
1921
- VNSvOutPortB(iobase + MAC_REG_BBREGADR, byBBAddr);
1915
+ VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr);
19221916
19231917 /* turn on REGR */
19241918 MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
19251919 /* W_MAX_TIMEOUT is the timeout period */
19261920 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1927
- VNSvInPortB(iobase + MAC_REG_BBREGCTL, &byValue);
1928
- if (byValue & BBREGCTL_DONE)
1921
+ VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value);
1922
+ if (by_value & BBREGCTL_DONE)
19291923 break;
19301924 }
19311925
19321926 /* get BB data */
1933
- VNSvInPortB(iobase + MAC_REG_BBREGDATA, pbyData);
1927
+ VNSvInPortB(iobase + MAC_REG_BBREGDATA, pby_data);
19341928
19351929 if (ww == W_MAX_TIMEOUT) {
19361930 pr_debug(" DBG_PORT80(0x30)\n");
....@@ -1945,32 +1939,32 @@
19451939 * Parameters:
19461940 * In:
19471941 * iobase - I/O base address
1948
- * byBBAddr - address of register in Baseband
1949
- * byData - data to write
1942
+ * by_bb_addr - address of register in Baseband
1943
+ * by_data - data to write
19501944 * Out:
19511945 * none
19521946 *
19531947 * Return Value: true if succeeded; false if failed.
19541948 *
19551949 */
1956
-bool BBbWriteEmbedded(struct vnt_private *priv,
1957
- unsigned char byBBAddr, unsigned char byData)
1950
+bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr,
1951
+ unsigned char by_data)
19581952 {
19591953 void __iomem *iobase = priv->PortOffset;
19601954 unsigned short ww;
1961
- unsigned char byValue;
1955
+ unsigned char by_value;
19621956
19631957 /* BB reg offset */
1964
- VNSvOutPortB(iobase + MAC_REG_BBREGADR, byBBAddr);
1958
+ VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr);
19651959 /* set BB data */
1966
- VNSvOutPortB(iobase + MAC_REG_BBREGDATA, byData);
1960
+ VNSvOutPortB(iobase + MAC_REG_BBREGDATA, by_data);
19671961
19681962 /* turn on BBREGCTL_REGW */
19691963 MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
19701964 /* W_MAX_TIMEOUT is the timeout period */
19711965 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
1972
- VNSvInPortB(iobase + MAC_REG_BBREGCTL, &byValue);
1973
- if (byValue & BBREGCTL_DONE)
1966
+ VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value);
1967
+ if (by_value & BBREGCTL_DONE)
19741968 break;
19751969 }
19761970
....@@ -1996,29 +1990,29 @@
19961990 *
19971991 */
19981992
1999
-bool BBbVT3253Init(struct vnt_private *priv)
1993
+bool bb_vt3253_init(struct vnt_private *priv)
20001994 {
2001
- bool bResult = true;
1995
+ bool result = true;
20021996 int ii;
20031997 void __iomem *iobase = priv->PortOffset;
2004
- unsigned char byRFType = priv->byRFType;
2005
- unsigned char byLocalID = priv->byLocalID;
1998
+ unsigned char by_rf_type = priv->byRFType;
1999
+ unsigned char by_local_id = priv->byLocalID;
20062000
2007
- if (byRFType == RF_RFMD2959) {
2008
- if (byLocalID <= REV_ID_VT3253_A1) {
2001
+ if (by_rf_type == RF_RFMD2959) {
2002
+ if (by_local_id <= REV_ID_VT3253_A1) {
20092003 for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++)
2010
- bResult &= BBbWriteEmbedded(priv,
2004
+ result &= bb_write_embedded(priv,
20112005 byVT3253InitTab_RFMD[ii][0],
20122006 byVT3253InitTab_RFMD[ii][1]);
20132007
20142008 } else {
20152009 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++)
2016
- bResult &= BBbWriteEmbedded(priv,
2010
+ result &= bb_write_embedded(priv,
20172011 byVT3253B0_RFMD[ii][0],
20182012 byVT3253B0_RFMD[ii][1]);
20192013
20202014 for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++)
2021
- bResult &= BBbWriteEmbedded(priv,
2015
+ result &= bb_write_embedded(priv,
20222016 byVT3253B0_AGC4_RFMD2959[ii][0],
20232017 byVT3253B0_AGC4_RFMD2959[ii][1]);
20242018
....@@ -2033,14 +2027,14 @@
20332027 priv->ldBmThreshold[1] = -50;
20342028 priv->ldBmThreshold[2] = 0;
20352029 priv->ldBmThreshold[3] = 0;
2036
- } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S)) {
2030
+ } else if ((by_rf_type == RF_AIROHA) || (by_rf_type == RF_AL2230S)) {
20372031 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2038
- bResult &= BBbWriteEmbedded(priv,
2032
+ result &= bb_write_embedded(priv,
20392033 byVT3253B0_AIROHA2230[ii][0],
20402034 byVT3253B0_AIROHA2230[ii][1]);
20412035
20422036 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2043
- bResult &= BBbWriteEmbedded(priv,
2037
+ result &= bb_write_embedded(priv,
20442038 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
20452039
20462040 priv->abyBBVGA[0] = 0x1C;
....@@ -2051,14 +2045,14 @@
20512045 priv->ldBmThreshold[1] = -48;
20522046 priv->ldBmThreshold[2] = 0;
20532047 priv->ldBmThreshold[3] = 0;
2054
- } else if (byRFType == RF_UW2451) {
2048
+ } else if (by_rf_type == RF_UW2451) {
20552049 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2056
- bResult &= BBbWriteEmbedded(priv,
2050
+ result &= bb_write_embedded(priv,
20572051 byVT3253B0_UW2451[ii][0],
20582052 byVT3253B0_UW2451[ii][1]);
20592053
20602054 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2061
- bResult &= BBbWriteEmbedded(priv,
2055
+ result &= bb_write_embedded(priv,
20622056 byVT3253B0_AGC[ii][0],
20632057 byVT3253B0_AGC[ii][1]);
20642058
....@@ -2073,9 +2067,9 @@
20732067 priv->ldBmThreshold[1] = -50;
20742068 priv->ldBmThreshold[2] = 0;
20752069 priv->ldBmThreshold[3] = 0;
2076
- } else if (byRFType == RF_UW2452) {
2070
+ } else if (by_rf_type == RF_UW2452) {
20772071 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++)
2078
- bResult &= BBbWriteEmbedded(priv,
2072
+ result &= bb_write_embedded(priv,
20792073 byVT3253B0_UW2451[ii][0],
20802074 byVT3253B0_UW2451[ii][1]);
20812075
....@@ -2084,7 +2078,7 @@
20842078 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
20852079 */
20862080
2087
- /*bResult &= BBbWriteEmbedded(iobase,0x09,0x41);*/
2081
+ /*bResult &= bb_write_embedded(iobase,0x09,0x41);*/
20882082
20892083 /* Init ANT B select,
20902084 * RX Config CR10 = 0x28->0x2A,
....@@ -2092,23 +2086,23 @@
20922086 * make the ANT_A, ANT_B inverted)
20932087 */
20942088
2095
- /*bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/
2089
+ /*bResult &= bb_write_embedded(iobase,0x0a,0x28);*/
20962090 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2097
- bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06);
2091
+ result &= bb_write_embedded(priv, 0xd7, 0x06);
20982092
20992093 /* {{RobertYu:20050125, request by Jack */
2100
- bResult &= BBbWriteEmbedded(priv, 0x90, 0x20);
2101
- bResult &= BBbWriteEmbedded(priv, 0x97, 0xeb);
2094
+ result &= bb_write_embedded(priv, 0x90, 0x20);
2095
+ result &= bb_write_embedded(priv, 0x97, 0xeb);
21022096 /* }} */
21032097
21042098 /* {{RobertYu:20050221, request by Jack */
2105
- bResult &= BBbWriteEmbedded(priv, 0xa6, 0x00);
2106
- bResult &= BBbWriteEmbedded(priv, 0xa8, 0x30);
2099
+ result &= bb_write_embedded(priv, 0xa6, 0x00);
2100
+ result &= bb_write_embedded(priv, 0xa8, 0x30);
21072101 /* }} */
2108
- bResult &= BBbWriteEmbedded(priv, 0xb0, 0x58);
2102
+ result &= bb_write_embedded(priv, 0xb0, 0x58);
21092103
21102104 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2111
- bResult &= BBbWriteEmbedded(priv,
2105
+ result &= bb_write_embedded(priv,
21122106 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
21132107
21142108 priv->abyBBVGA[0] = 0x14;
....@@ -2121,14 +2115,14 @@
21212115 priv->ldBmThreshold[3] = 0;
21222116 /* }} RobertYu */
21232117
2124
- } else if (byRFType == RF_VT3226) {
2118
+ } else if (by_rf_type == RF_VT3226) {
21252119 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2126
- bResult &= BBbWriteEmbedded(priv,
2120
+ result &= bb_write_embedded(priv,
21272121 byVT3253B0_AIROHA2230[ii][0],
21282122 byVT3253B0_AIROHA2230[ii][1]);
21292123
21302124 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2131
- bResult &= BBbWriteEmbedded(priv,
2125
+ result &= bb_write_embedded(priv,
21322126 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
21332127
21342128 priv->abyBBVGA[0] = 0x1C;
....@@ -2142,9 +2136,9 @@
21422136 /* Fix VT3226 DFC system timing issue */
21432137 MACvSetRFLE_LatchBase(iobase);
21442138 /* {{ RobertYu: 20050104 */
2145
- } else if (byRFType == RF_AIROHA7230) {
2139
+ } else if (by_rf_type == RF_AIROHA7230) {
21462140 for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++)
2147
- bResult &= BBbWriteEmbedded(priv,
2141
+ result &= bb_write_embedded(priv,
21482142 byVT3253B0_AIROHA2230[ii][0],
21492143 byVT3253B0_AIROHA2230[ii][1]);
21502144
....@@ -2152,17 +2146,17 @@
21522146 /* Init ANT B select,TX Config CR09 = 0x61->0x45,
21532147 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
21542148 */
2155
- /*bResult &= BBbWriteEmbedded(iobase,0x09,0x41);*/
2149
+ /* bResult &= bb_write_embedded(iobase,0x09,0x41);*/
21562150 /* Init ANT B select,RX Config CR10 = 0x28->0x2A,
21572151 * 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
21582152 */
2159
- /*bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/
2153
+ /* bResult &= BBbWriteEmbedded(iobase,0x0a,0x28);*/
21602154 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2161
- bResult &= BBbWriteEmbedded(priv, 0xd7, 0x06);
2155
+ result &= bb_write_embedded(priv, 0xd7, 0x06);
21622156 /* }} */
21632157
21642158 for (ii = 0; ii < CB_VT3253B0_AGC; ii++)
2165
- bResult &= BBbWriteEmbedded(priv,
2159
+ result &= bb_write_embedded(priv,
21662160 byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]);
21672161
21682162 priv->abyBBVGA[0] = 0x1C;
....@@ -2180,12 +2174,12 @@
21802174 priv->abyBBVGA[0] = 0x1C;
21812175 }
21822176
2183
- if (byLocalID > REV_ID_VT3253_A1) {
2184
- BBbWriteEmbedded(priv, 0x04, 0x7F);
2185
- BBbWriteEmbedded(priv, 0x0D, 0x01);
2177
+ if (by_local_id > REV_ID_VT3253_A1) {
2178
+ bb_write_embedded(priv, 0x04, 0x7F);
2179
+ bb_write_embedded(priv, 0x0D, 0x01);
21862180 }
21872181
2188
- return bResult;
2182
+ return result;
21892183 }
21902184
21912185 /*
....@@ -2201,42 +2195,42 @@
22012195 *
22022196 */
22032197 void
2204
-BBvSetShortSlotTime(struct vnt_private *priv)
2198
+bb_set_short_slot_time(struct vnt_private *priv)
22052199 {
2206
- unsigned char byBBRxConf = 0;
2207
- unsigned char byBBVGA = 0;
2200
+ unsigned char by_bb_rx_conf = 0;
2201
+ unsigned char by_bb_vga = 0;
22082202
2209
- BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */
2203
+ bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */
22102204
22112205 if (priv->bShortSlotTime)
2212
- byBBRxConf &= 0xDF; /* 1101 1111 */
2206
+ by_bb_rx_conf &= 0xDF; /* 1101 1111 */
22132207 else
2214
- byBBRxConf |= 0x20; /* 0010 0000 */
2208
+ by_bb_rx_conf |= 0x20; /* 0010 0000 */
22152209
22162210 /* patch for 3253B0 Baseband with Cardbus module */
2217
- BBbReadEmbedded(priv, 0xE7, &byBBVGA);
2218
- if (byBBVGA == priv->abyBBVGA[0])
2219
- byBBRxConf |= 0x20; /* 0010 0000 */
2211
+ bb_read_embedded(priv, 0xE7, &by_bb_vga);
2212
+ if (by_bb_vga == priv->abyBBVGA[0])
2213
+ by_bb_rx_conf |= 0x20; /* 0010 0000 */
22202214
2221
- BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */
2215
+ bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */
22222216 }
22232217
2224
-void BBvSetVGAGainOffset(struct vnt_private *priv, unsigned char byData)
2218
+void bb_set_vga_gain_offset(struct vnt_private *priv, unsigned char by_data)
22252219 {
2226
- unsigned char byBBRxConf = 0;
2220
+ unsigned char by_bb_rx_conf = 0;
22272221
2228
- BBbWriteEmbedded(priv, 0xE7, byData);
2222
+ bb_write_embedded(priv, 0xE7, by_data);
22292223
2230
- BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */
2224
+ bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */
22312225 /* patch for 3253B0 Baseband with Cardbus module */
2232
- if (byData == priv->abyBBVGA[0])
2233
- byBBRxConf |= 0x20; /* 0010 0000 */
2226
+ if (by_data == priv->abyBBVGA[0])
2227
+ by_bb_rx_conf |= 0x20; /* 0010 0000 */
22342228 else if (priv->bShortSlotTime)
2235
- byBBRxConf &= 0xDF; /* 1101 1111 */
2229
+ by_bb_rx_conf &= 0xDF; /* 1101 1111 */
22362230 else
2237
- byBBRxConf |= 0x20; /* 0010 0000 */
2238
- priv->byBBVGACurrent = byData;
2239
- BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */
2231
+ by_bb_rx_conf |= 0x20; /* 0010 0000 */
2232
+ priv->byBBVGACurrent = by_data;
2233
+ bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */
22402234 }
22412235
22422236 /*
....@@ -2252,12 +2246,12 @@
22522246 *
22532247 */
22542248 void
2255
-BBvSoftwareReset(struct vnt_private *priv)
2249
+bb_software_reset(struct vnt_private *priv)
22562250 {
2257
- BBbWriteEmbedded(priv, 0x50, 0x40);
2258
- BBbWriteEmbedded(priv, 0x50, 0);
2259
- BBbWriteEmbedded(priv, 0x9C, 0x01);
2260
- BBbWriteEmbedded(priv, 0x9C, 0);
2251
+ bb_write_embedded(priv, 0x50, 0x40);
2252
+ bb_write_embedded(priv, 0x50, 0);
2253
+ bb_write_embedded(priv, 0x9C, 0x01);
2254
+ bb_write_embedded(priv, 0x9C, 0);
22612255 }
22622256
22632257 /*
....@@ -2273,13 +2267,13 @@
22732267 *
22742268 */
22752269 void
2276
-BBvPowerSaveModeON(struct vnt_private *priv)
2270
+bb_power_save_mode_on(struct vnt_private *priv)
22772271 {
2278
- unsigned char byOrgData;
2272
+ unsigned char by_org_data;
22792273
2280
- BBbReadEmbedded(priv, 0x0D, &byOrgData);
2281
- byOrgData |= BIT(0);
2282
- BBbWriteEmbedded(priv, 0x0D, byOrgData);
2274
+ bb_read_embedded(priv, 0x0D, &by_org_data);
2275
+ by_org_data |= BIT(0);
2276
+ bb_write_embedded(priv, 0x0D, by_org_data);
22832277 }
22842278
22852279 /*
....@@ -2295,13 +2289,13 @@
22952289 *
22962290 */
22972291 void
2298
-BBvPowerSaveModeOFF(struct vnt_private *priv)
2292
+bb_power_save_mode_off(struct vnt_private *priv)
22992293 {
2300
- unsigned char byOrgData;
2294
+ unsigned char by_org_data;
23012295
2302
- BBbReadEmbedded(priv, 0x0D, &byOrgData);
2303
- byOrgData &= ~(BIT(0));
2304
- BBbWriteEmbedded(priv, 0x0D, byOrgData);
2296
+ bb_read_embedded(priv, 0x0D, &by_org_data);
2297
+ by_org_data &= ~(BIT(0));
2298
+ bb_write_embedded(priv, 0x0D, by_org_data);
23052299 }
23062300
23072301 /*
....@@ -2310,7 +2304,7 @@
23102304 * Parameters:
23112305 * In:
23122306 * priv - Device Structure
2313
- * byAntennaMode - Antenna Mode
2307
+ * by_antenna_mode - Antenna Mode
23142308 * Out:
23152309 * none
23162310 *
....@@ -2319,22 +2313,22 @@
23192313 */
23202314
23212315 void
2322
-BBvSetTxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode)
2316
+bb_set_tx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode)
23232317 {
2324
- unsigned char byBBTxConf;
2318
+ unsigned char by_bb_tx_conf;
23252319
2326
- BBbReadEmbedded(priv, 0x09, &byBBTxConf); /* CR09 */
2327
- if (byAntennaMode == ANT_DIVERSITY) {
2320
+ bb_read_embedded(priv, 0x09, &by_bb_tx_conf); /* CR09 */
2321
+ if (by_antenna_mode == ANT_DIVERSITY) {
23282322 /* bit 1 is diversity */
2329
- byBBTxConf |= 0x02;
2330
- } else if (byAntennaMode == ANT_A) {
2323
+ by_bb_tx_conf |= 0x02;
2324
+ } else if (by_antenna_mode == ANT_A) {
23312325 /* bit 2 is ANTSEL */
2332
- byBBTxConf &= 0xF9; /* 1111 1001 */
2333
- } else if (byAntennaMode == ANT_B) {
2334
- byBBTxConf &= 0xFD; /* 1111 1101 */
2335
- byBBTxConf |= 0x04;
2326
+ by_bb_tx_conf &= 0xF9; /* 1111 1001 */
2327
+ } else if (by_antenna_mode == ANT_B) {
2328
+ by_bb_tx_conf &= 0xFD; /* 1111 1101 */
2329
+ by_bb_tx_conf |= 0x04;
23362330 }
2337
- BBbWriteEmbedded(priv, 0x09, byBBTxConf); /* CR09 */
2331
+ bb_write_embedded(priv, 0x09, by_bb_tx_conf); /* CR09 */
23382332 }
23392333
23402334 /*
....@@ -2343,7 +2337,7 @@
23432337 * Parameters:
23442338 * In:
23452339 * priv - Device Structure
2346
- * byAntennaMode - Antenna Mode
2340
+ * by_antenna_mode - Antenna Mode
23472341 * Out:
23482342 * none
23492343 *
....@@ -2352,25 +2346,25 @@
23522346 */
23532347
23542348 void
2355
-BBvSetRxAntennaMode(struct vnt_private *priv, unsigned char byAntennaMode)
2349
+bb_set_rx_antenna_mode(struct vnt_private *priv, unsigned char by_antenna_mode)
23562350 {
2357
- unsigned char byBBRxConf;
2351
+ unsigned char by_bb_rx_conf;
23582352
2359
- BBbReadEmbedded(priv, 0x0A, &byBBRxConf); /* CR10 */
2360
- if (byAntennaMode == ANT_DIVERSITY) {
2361
- byBBRxConf |= 0x01;
2353
+ bb_read_embedded(priv, 0x0A, &by_bb_rx_conf); /* CR10 */
2354
+ if (by_antenna_mode == ANT_DIVERSITY) {
2355
+ by_bb_rx_conf |= 0x01;
23622356
2363
- } else if (byAntennaMode == ANT_A) {
2364
- byBBRxConf &= 0xFC; /* 1111 1100 */
2365
- } else if (byAntennaMode == ANT_B) {
2366
- byBBRxConf &= 0xFE; /* 1111 1110 */
2367
- byBBRxConf |= 0x02;
2357
+ } else if (by_antenna_mode == ANT_A) {
2358
+ by_bb_rx_conf &= 0xFC; /* 1111 1100 */
2359
+ } else if (by_antenna_mode == ANT_B) {
2360
+ by_bb_rx_conf &= 0xFE; /* 1111 1110 */
2361
+ by_bb_rx_conf |= 0x02;
23682362 }
2369
- BBbWriteEmbedded(priv, 0x0A, byBBRxConf); /* CR10 */
2363
+ bb_write_embedded(priv, 0x0A, by_bb_rx_conf); /* CR10 */
23702364 }
23712365
23722366 /*
2373
- * Description: BBvSetDeepSleep
2367
+ * Description: bb_set_deep_sleep
23742368 *
23752369 * Parameters:
23762370 * In:
....@@ -2382,15 +2376,9 @@
23822376 *
23832377 */
23842378 void
2385
-BBvSetDeepSleep(struct vnt_private *priv, unsigned char byLocalID)
2379
+bb_set_deep_sleep(struct vnt_private *priv, unsigned char by_local_id)
23862380 {
2387
- BBbWriteEmbedded(priv, 0x0C, 0x17); /* CR12 */
2388
- BBbWriteEmbedded(priv, 0x0D, 0xB9); /* CR13 */
2381
+ bb_write_embedded(priv, 0x0C, 0x17); /* CR12 */
2382
+ bb_write_embedded(priv, 0x0D, 0xB9); /* CR13 */
23892383 }
23902384
2391
-void
2392
-BBvExitDeepSleep(struct vnt_private *priv, unsigned char byLocalID)
2393
-{
2394
- BBbWriteEmbedded(priv, 0x0C, 0x00); /* CR12 */
2395
- BBbWriteEmbedded(priv, 0x0D, 0x01); /* CR13 */
2396
-}