disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/drivers/net/wireless/rockchip_wlan/cywdhd/bcmdhd/include/sbsdio.h
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@@ -1,18 +1,19 @@
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-/* SPDX-License-Identifier: GPL-2.0 */
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 /*
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  * SDIO device core hardware definitions.
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  * sdio is a portion of the pcmcia core in core rev 3 - rev 8
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  *
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  * SDIO core support 1bit, 4 bit SDIO mode as well as SPI mode.
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  *
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- * Copyright (C) 1999-2019, Broadcom Corporation
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- * 
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+ * Portions of this code are copyright (c) 2022 Cypress Semiconductor Corporation
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+ *
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+ * Copyright (C) 1999-2017, Broadcom Corporation
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+ *
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  *      Unless you and Broadcom execute a separate written software license
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  * agreement governing use of this software, this software is licensed to you
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  * under the terms of the GNU General Public License version 2 (the "GPL"),
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  * available at http://www.broadcom.com/licenses/GPLv2.php, with the
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  * following added to such license:
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- * 
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+ *
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  *      As a special exception, the copyright holders of this software give you
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  * permission to link this software with independent modules, and to copy and
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  * distribute the resulting executable under terms of your choice, provided that
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@@ -20,7 +21,7 @@
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  * the license of that module.  An independent module is a module which is not
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  * derived from this software.  The special exception does not apply to any
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  * modifications of the software.
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- * 
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+ *
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  *      Notwithstanding the above, under no circumstances may you combine this
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  * software in any way with any other Broadcom software provided under a license
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  * other than the GPL, without Broadcom's express prior written consent.
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@@ -28,7 +29,7 @@
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  *
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  * <<Broadcom-WL-IPTag/Open:>>
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  *
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- * $Id: sbsdio.h 514727 2014-11-12 03:02:48Z $
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+ * $Id: sbsdio.h 665717 2016-10-18 23:29:25Z $
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  */
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 #ifndef	_SBSDIO_H
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@@ -90,11 +91,6 @@
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 #define SROM_BLANK			0x04		/* depreciated in corerev 6 */
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 #define	SROM_OTP			0x80		/* OTP present */
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-/* SBSDIO_CHIP_CTRL */
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-#define SBSDIO_CHIP_CTRL_XTAL		0x01		/* or'd with onchip xtal_pu,
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-							 * 1: power on oscillator
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-							 * (for 4318 only)
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-							 */
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 /* SBSDIO_WATERMARK */
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 #define SBSDIO_WATERMARK_MASK		0x7f		/* number of words - 1 for sd device
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 							 * to wait before sending data to host
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@@ -121,9 +117,9 @@
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 							 * external pads in tri-state; requires
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 							 * sdio bus power cycle to clear (rev 9)
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 							 */
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-#define SBSDIO_DEVCTL_EN_F2_BLK_WATERMARK 0x10  /* Enable function 2 tx for each block */
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 #define SBSDIO_DEVCTL_F2WM_ENAB		0x10		/* Enable F2 Watermark */
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 #define SBSDIO_DEVCTL_NONDAT_PADS_ISO 	0x20		/* Isolate sdio clk and cmd (non-data) */
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+#define SBSDIO_DEVCTL_ADDR_RESET	0x40		/* Reset SB Address to default value */
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 /* SBSDIO_FUNC1_CHIPCLKCSR */
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 #define SBSDIO_FORCE_ALP		0x01		/* Force ALP request to backplane */
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@@ -167,7 +163,11 @@
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 /* direct(mapped) cis space */
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 #define SBSDIO_CIS_BASE_COMMON		0x1000		/* MAPPED common CIS address */
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+#ifdef BCMSPI
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+#define SBSDIO_CIS_SIZE_LIMIT		0x100		/* maximum bytes in one spi CIS */
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+#else
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 #define SBSDIO_CIS_SIZE_LIMIT		0x200		/* maximum bytes in one CIS */
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+#endif /* !BCMSPI */
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 #define SBSDIO_OTP_CIS_SIZE_LIMIT       0x078           /* maximum bytes OTP CIS */
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 #define SBSDIO_CIS_OFT_ADDR_MASK	0x1FFFF		/* cis offset addr is < 17 bits */