disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/rf.c
..
..
@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2012  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2012  Realtek Corporation.*/
25
3
 
26
4
 #include "../wifi.h"
27
5
 #include "reg.h"
..
..
@@ -64,12 +42,9 @@
64
42
 	struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
65
43
 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
66
44
 	u32 tx_agc[2] = { 0, 0 }, tmpval = 0;
67
-	bool turbo_scanoff = false;
68
45
 	u8 idx1, idx2;
69
46
 	u8 *ptr;
70
47
 
71
-	if ((rtlefuse->eeprom_regulatory != 0) || (rtlefuse->external_pa))
72
-		turbo_scanoff = true;
73
48
 	if (mac->act_scanning) {
74
49
 		tx_agc[RF90_PATH_A] = 0x3f3f3f3f;
75
50
 		tx_agc[RF90_PATH_B] = 0x3f3f3f3f;
..
..
@@ -148,17 +123,17 @@
148
123
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
149
124
 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
150
125
 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
151
-	u32 powerBase0, powerBase1;
126
+	u32 powerbase0, powerbase1;
152
127
 	u8 legacy_pwrdiff = 0, ht20_pwrdiff = 0;
153
128
 	u8 i, powerlevel[2];
154
129
 
155
130
 	for (i = 0; i < 2; i++) {
156
131
 		powerlevel[i] = ppowerlevel[i];
157
132
 		legacy_pwrdiff = rtlefuse->txpwr_legacyhtdiff[i][channel - 1];
158
-		powerBase0 = powerlevel[i] + legacy_pwrdiff;
159
-		powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
160
-		    (powerBase0 << 8) | powerBase0;
161
-		*(ofdmbase + i) = powerBase0;
133
+		powerbase0 = powerlevel[i] + legacy_pwrdiff;
134
+		powerbase0 = (powerbase0 << 24) | (powerbase0 << 16) |
135
+		    (powerbase0 << 8) | powerbase0;
136
+		*(ofdmbase + i) = powerbase0;
162
137
 		RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
163
138
 			" [OFDM power base index rf(%c) = 0x%x]\n",
164
139
 			i == 0 ? 'A' : 'B', *(ofdmbase + i));
..
..
@@ -168,10 +143,10 @@
168
143
 			ht20_pwrdiff = rtlefuse->txpwr_ht20diff[i][channel - 1];
169
144
 			powerlevel[i] += ht20_pwrdiff;
170
145
 		}
171
-		powerBase1 = powerlevel[i];
172
-		powerBase1 = (powerBase1 << 24) |
173
-		    (powerBase1 << 16) | (powerBase1 << 8) | powerBase1;
174
-		*(mcsbase + i) = powerBase1;
146
+		powerbase1 = powerlevel[i];
147
+		powerbase1 = (powerbase1 << 24) |
148
+		    (powerbase1 << 16) | (powerbase1 << 8) | powerbase1;
149
+		*(mcsbase + i) = powerbase1;
175
150
 		RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
176
151
 			" [MCS power base index rf(%c) = 0x%x]\n",
177
152
 			i == 0 ? 'A' : 'B', *(mcsbase + i));
..
..
@@ -180,26 +155,26 @@
180
155
 
181
156
 static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw,
182
157
 						       u8 channel, u8 index,
183
-						       u32 *powerBase0,
184
-						       u32 *powerBase1,
158
+						       u32 *powerbase0,
159
+						       u32 *powerbase1,
185
160
 						       u32 *p_outwriteval)
186
161
 {
187
162
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
188
163
 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
189
164
 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
190
165
 	u8 i, chnlgroup = 0, pwr_diff_limit[4];
191
-	u32 writeVal, customer_limit, rf;
166
+	u32 writeval, customer_limit, rf;
192
167
 
193
168
 	for (rf = 0; rf < 2; rf++) {
194
169
 		switch (rtlefuse->eeprom_regulatory) {
195
170
 		case 0:
196
171
 			chnlgroup = 0;
197
-			writeVal = rtlphy->mcs_offset
172
+			writeval = rtlphy->mcs_offset
198
173
 			    [chnlgroup][index + (rf ? 8 : 0)]
199
-			    + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
174
+			    + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
200
175
 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
201
-				"RTK better performance,writeVal(%c) = 0x%x\n",
202
-				rf == 0 ? 'A' : 'B', writeVal);
176
+				"RTK better performance,writeval(%c) = 0x%x\n",
177
+				rf == 0 ? 'A' : 'B', writeval);
203
178
 			break;
204
179
 		case 1:
205
180
 			if (rtlphy->pwrgroup_cnt == 1)
..
..
@@ -217,20 +192,20 @@
217
192
 				else
218
193
 					chnlgroup += 4;
219
194
 			}
220
-			writeVal = rtlphy->mcs_offset[chnlgroup][index +
195
+			writeval = rtlphy->mcs_offset[chnlgroup][index +
221
196
 					(rf ? 8 : 0)] +
222
-					((index < 2) ? powerBase0[rf] :
223
-					powerBase1[rf]);
197
+					((index < 2) ? powerbase0[rf] :
198
+					powerbase1[rf]);
224
199
 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
225
-				"Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n",
226
-				rf == 0 ? 'A' : 'B', writeVal);
200
+				"Realtek regulatory, 20MHz, writeval(%c) = 0x%x\n",
201
+				rf == 0 ? 'A' : 'B', writeval);
227
202
 			break;
228
203
 		case 2:
229
-			writeVal = ((index < 2) ? powerBase0[rf] :
230
-				   powerBase1[rf]);
204
+			writeval = ((index < 2) ? powerbase0[rf] :
205
+				   powerbase1[rf]);
231
206
 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
232
-				"Better regulatory,writeVal(%c) = 0x%x\n",
233
-				rf == 0 ? 'A' : 'B', writeVal);
207
+				"Better regulatory,writeval(%c) = 0x%x\n",
208
+				rf == 0 ? 'A' : 'B', writeval);
234
209
 			break;
235
210
 		case 3:
236
211
 			chnlgroup = 0;
..
..
@@ -275,36 +250,36 @@
275
250
 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
276
251
 				"Customer's limit rf(%c) = 0x%x\n",
277
252
 				rf == 0 ? 'A' : 'B', customer_limit);
278
-			writeVal = customer_limit + ((index < 2) ?
279
-				   powerBase0[rf] : powerBase1[rf]);
253
+			writeval = customer_limit + ((index < 2) ?
254
+				   powerbase0[rf] : powerbase1[rf]);
280
255
 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
281
-				"Customer, writeVal rf(%c)= 0x%x\n",
282
-				rf == 0 ? 'A' : 'B', writeVal);
256
+				"Customer, writeval rf(%c)= 0x%x\n",
257
+				rf == 0 ? 'A' : 'B', writeval);
283
258
 			break;
284
259
 		default:
285
260
 			chnlgroup = 0;
286
-			writeVal = rtlphy->mcs_offset[chnlgroup]
261
+			writeval = rtlphy->mcs_offset[chnlgroup]
287
262
 				   [index + (rf ? 8 : 0)] + ((index < 2) ?
288
-				   powerBase0[rf] : powerBase1[rf]);
263
+				   powerbase0[rf] : powerbase1[rf]);
289
264
 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
290
-				"RTK better performance, writeValrf(%c) = 0x%x\n",
291
-				rf == 0 ? 'A' : 'B', writeVal);
265
+				"RTK better performance, writevalrf(%c) = 0x%x\n",
266
+				rf == 0 ? 'A' : 'B', writeval);
292
267
 			break;
293
268
 		}
294
269
 		if (rtlpriv->dm.dynamic_txhighpower_lvl ==
295
270
 		    TXHIGHPWRLEVEL_LEVEL1)
296
-			writeVal = 0x14141414;
271
+			writeval = 0x14141414;
297
272
 		else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
298
273
 			 TXHIGHPWRLEVEL_LEVEL2)
299
-			writeVal = 0x00000000;
274
+			writeval = 0x00000000;
300
275
 		if (rtlpriv->dm.dynamic_txhighpower_lvl == TXHIGHPWRLEVEL_BT1)
301
-			writeVal = writeVal - 0x06060606;
302
-		*(p_outwriteval + rf) = writeVal;
276
+			writeval = writeval - 0x06060606;
277
+		*(p_outwriteval + rf) = writeval;
303
278
 	}
304
279
 }
305
280
 
306
281
 static void _rtl92c_write_ofdm_power_reg(struct ieee80211_hw *hw,
307
-					 u8 index, u32 *pValue)
282
+					 u8 index, u32 *value)
308
283
 {
309
284
 	struct rtl_priv *rtlpriv = rtl_priv(hw);
310
285
 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
..
..
@@ -319,33 +294,33 @@
319
294
 		RTXAGC_B_MCS11_MCS08, RTXAGC_B_MCS15_MCS12
320
295
 	};
321
296
 	u8 i, rf, pwr_val[4];
322
-	u32 writeVal;
297
+	u32 writeval;
323
298
 	u16 regoffset;
324
299
 
325
300
 	for (rf = 0; rf < 2; rf++) {
326
-		writeVal = pValue[rf];
301
+		writeval = value[rf];
327
302
 		for (i = 0; i < 4; i++) {
328
-			pwr_val[i] = (u8)((writeVal & (0x7f << (i * 8))) >>
303
+			pwr_val[i] = (u8)((writeval & (0x7f << (i * 8))) >>
329
304
 					  (i * 8));
330
305
 			if (pwr_val[i] > RF6052_MAX_TX_PWR)
331
306
 				pwr_val[i] = RF6052_MAX_TX_PWR;
332
307
 		}
333
-		writeVal = (pwr_val[3] << 24) | (pwr_val[2] << 16) |
308
+		writeval = (pwr_val[3] << 24) | (pwr_val[2] << 16) |
334
309
 		    (pwr_val[1] << 8) | pwr_val[0];
335
310
 		if (rf == 0)
336
311
 			regoffset = regoffset_a[index];
337
312
 		else
338
313
 			regoffset = regoffset_b[index];
339
-		rtl_set_bbreg(hw, regoffset, MASKDWORD, writeVal);
314
+		rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval);
340
315
 		RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
341
-			"Set 0x%x = %08x\n", regoffset, writeVal);
316
+			"Set 0x%x = %08x\n", regoffset, writeval);
342
317
 		if (((get_rf_type(rtlphy) == RF_2T2R) &&
343
318
 		     (regoffset == RTXAGC_A_MCS15_MCS12 ||
344
319
 		      regoffset == RTXAGC_B_MCS15_MCS12)) ||
345
320
 		    ((get_rf_type(rtlphy) != RF_2T2R) &&
346
321
 		     (regoffset == RTXAGC_A_MCS07_MCS04 ||
347
322
 		      regoffset == RTXAGC_B_MCS07_MCS04))) {
348
-			writeVal = pwr_val[3];
323
+			writeval = pwr_val[3];
349
324
 			if (regoffset == RTXAGC_A_MCS15_MCS12 ||
350
325
 			    regoffset == RTXAGC_A_MCS07_MCS04)
351
326
 				regoffset = 0xc90;
..
..
@@ -354,13 +329,13 @@
354
329
 				regoffset = 0xc98;
355
330
 			for (i = 0; i < 3; i++) {
356
331
 				if (i != 2)
357
-					writeVal = (writeVal > 8) ?
358
-						   (writeVal - 8) : 0;
332
+					writeval = (writeval > 8) ?
333
+						   (writeval - 8) : 0;
359
334
 				else
360
-					writeVal = (writeVal > 6) ?
361
-						   (writeVal - 6) : 0;
335
+					writeval = (writeval > 6) ?
336
+						   (writeval - 6) : 0;
362
337
 				rtl_write_byte(rtlpriv, (u32)(regoffset + i),
363
-					      (u8)writeVal);
338
+					      (u8)writeval);
364
339
 			}
365
340
 		}
366
341
 	}
..
..
@@ -369,18 +344,18 @@
369
344
 void rtl92cu_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
370
345
 					 u8 *ppowerlevel, u8 channel)
371
346
 {
372
-	u32 writeVal[2], powerBase0[2], powerBase1[2];
347
+	u32 writeval[2], powerbase0[2], powerbase1[2];
373
348
 	u8 index = 0;
374
349
 
375
350
 	rtl92c_phy_get_power_base(hw, ppowerlevel,
376
-				  channel, &powerBase0[0], &powerBase1[0]);
351
+				  channel, &powerbase0[0], &powerbase1[0]);
377
352
 	for (index = 0; index < 6; index++) {
378
353
 		_rtl92c_get_txpower_writeval_by_regulatory(hw,
379
354
 							   channel, index,
380
-							   &powerBase0[0],
381
-							   &powerBase1[0],
382
-							   &writeVal[0]);
383
-		_rtl92c_write_ofdm_power_reg(hw, index, &writeVal[0]);
355
+							   &powerbase0[0],
356
+							   &powerbase1[0],
357
+							   &writeval[0]);
358
+		_rtl92c_write_ofdm_power_reg(hw, index, &writeval[0]);
384
359
 	}
385
360
 }
386
361
 
..
..
@@ -456,12 +431,12 @@
456
431
 			break;
457
432
 		}
458
433
 		if (!rtstatus) {
459
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
460
-				 "Radio[%d] Fail!!\n", rfpath);
434
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
435
+				"Radio[%d] Fail!!\n", rfpath);
461
436
 			goto phy_rf_cfg_fail;
462
437
 		}
463
438
 	}
464
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "<---\n");
439
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "<---\n");
465
440
 phy_rf_cfg_fail:
466
441
 	return rtstatus;
467
442
 }