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2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/rf.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2012  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
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- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope that it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
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- *
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- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
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- *
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- * Contact Information:
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- * wlanfae <wlanfae@realtek.com>
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- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
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- * Hsinchu 300, Taiwan.
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- *
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- * Larry Finger <Larry.Finger@lwfinger.net>
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- *
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- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2012  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "reg.h"
....@@ -150,18 +128,18 @@
150128 	struct rtl_priv *rtlpriv = rtl_priv(hw);
151129 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
152130 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
153
-	u32 powerBase0, powerBase1;
131
+	u32 powerbase0, powerbase1;
154132 	u8 legacy_pwrdiff, ht20_pwrdiff;
155133 	u8 i, powerlevel[2];
156134 
157135 	for (i = 0; i < 2; i++) {
158136 		powerlevel[i] = ppowerlevel[i];
159137 		legacy_pwrdiff = rtlefuse->txpwr_legacyhtdiff[i][channel - 1];
160
-		powerBase0 = powerlevel[i] + legacy_pwrdiff;
138
+		powerbase0 = powerlevel[i] + legacy_pwrdiff;
161139 
162
-		powerBase0 = (powerBase0 << 24) | (powerBase0 << 16) |
163
-		    (powerBase0 << 8) | powerBase0;
164
-		*(ofdmbase + i) = powerBase0;
140
+		powerbase0 = (powerbase0 << 24) | (powerbase0 << 16) |
141
+		    (powerbase0 << 8) | powerbase0;
142
+		*(ofdmbase + i) = powerbase0;
165143 		RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
166144 			" [OFDM power base index rf(%c) = 0x%x]\n",
167145 			i == 0 ? 'A' : 'B', *(ofdmbase + i));
....@@ -172,11 +150,11 @@
172150 			ht20_pwrdiff = rtlefuse->txpwr_ht20diff[i][channel - 1];
173151 			powerlevel[i] += ht20_pwrdiff;
174152 		}
175
-		powerBase1 = powerlevel[i];
176
-		powerBase1 = (powerBase1 << 24) |
177
-		    (powerBase1 << 16) | (powerBase1 << 8) | powerBase1;
153
+		powerbase1 = powerlevel[i];
154
+		powerbase1 = (powerbase1 << 24) |
155
+		    (powerbase1 << 16) | (powerbase1 << 8) | powerbase1;
178156 
179
-		*(mcsbase + i) = powerBase1;
157
+		*(mcsbase + i) = powerbase1;
180158 
181159 		RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
182160 			" [MCS power base index rf(%c) = 0x%x]\n",
....@@ -186,37 +164,37 @@
186164 
187165 static void _rtl92c_get_txpower_writeval_by_regulatory(struct ieee80211_hw *hw,
188166 						       u8 channel, u8 index,
189
-						       u32 *powerBase0,
190
-						       u32 *powerBase1,
167
+						       u32 *powerbase0,
168
+						       u32 *powerbase1,
191169 						       u32 *p_outwriteval)
192170 {
193171 	struct rtl_priv *rtlpriv = rtl_priv(hw);
194172 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
195173 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
196174 	u8 i, chnlgroup = 0, pwr_diff_limit[4];
197
-	u32 writeVal, customer_limit, rf;
175
+	u32 writeval, customer_limit, rf;
198176 
199177 	for (rf = 0; rf < 2; rf++) {
200178 		switch (rtlefuse->eeprom_regulatory) {
201179 		case 0:
202180 			chnlgroup = 0;
203181 
204
-			writeVal = rtlphy->mcs_offset[chnlgroup][index +
182
+			writeval = rtlphy->mcs_offset[chnlgroup][index +
205183 			    (rf ? 8 : 0)]
206
-			    + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
184
+			    + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
207185 
208186 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
209
-				"RTK better performance, writeVal(%c) = 0x%x\n",
210
-				rf == 0 ? 'A' : 'B', writeVal);
187
+				"RTK better performance, writeval(%c) = 0x%x\n",
188
+				rf == 0 ? 'A' : 'B', writeval);
211189 			break;
212190 		case 1:
213191 			if (rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20_40) {
214
-				writeVal = ((index < 2) ? powerBase0[rf] :
215
-					    powerBase1[rf]);
192
+				writeval = ((index < 2) ? powerbase0[rf] :
193
+					    powerbase1[rf]);
216194 
217195 				RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
218
-					"Realtek regulatory, 40MHz, writeVal(%c) = 0x%x\n",
219
-					rf == 0 ? 'A' : 'B', writeVal);
196
+					"Realtek regulatory, 40MHz, writeval(%c) = 0x%x\n",
197
+					rf == 0 ? 'A' : 'B', writeval);
220198 			} else {
221199 				if (rtlphy->pwrgroup_cnt == 1)
222200 					chnlgroup = 0;
....@@ -231,23 +209,23 @@
231209 						chnlgroup++;
232210 				}
233211 
234
-				writeVal = rtlphy->mcs_offset[chnlgroup]
212
+				writeval = rtlphy->mcs_offset[chnlgroup]
235213 				    [index + (rf ? 8 : 0)] + ((index < 2) ?
236
-							      powerBase0[rf] :
237
-							      powerBase1[rf]);
214
+							      powerbase0[rf] :
215
+							      powerbase1[rf]);
238216 
239217 				RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
240
-					"Realtek regulatory, 20MHz, writeVal(%c) = 0x%x\n",
241
-					rf == 0 ? 'A' : 'B', writeVal);
218
+					"Realtek regulatory, 20MHz, writeval(%c) = 0x%x\n",
219
+					rf == 0 ? 'A' : 'B', writeval);
242220 			}
243221 			break;
244222 		case 2:
245
-			writeVal =
246
-			    ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
223
+			writeval =
224
+			    ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
247225 
248226 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
249
-				"Better regulatory, writeVal(%c) = 0x%x\n",
250
-				rf == 0 ? 'A' : 'B', writeVal);
227
+				"Better regulatory, writeval(%c) = 0x%x\n",
228
+				rf == 0 ? 'A' : 'B', writeval);
251229 			break;
252230 		case 3:
253231 			chnlgroup = 0;
....@@ -297,36 +275,36 @@
297275 				"Customer's limit rf(%c) = 0x%x\n",
298276 				rf == 0 ? 'A' : 'B', customer_limit);
299277 
300
-			writeVal = customer_limit +
301
-			    ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
278
+			writeval = customer_limit +
279
+			    ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
302280 
303281 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
304
-				"Customer, writeVal rf(%c)= 0x%x\n",
305
-				rf == 0 ? 'A' : 'B', writeVal);
282
+				"Customer, writeval rf(%c)= 0x%x\n",
283
+				rf == 0 ? 'A' : 'B', writeval);
306284 			break;
307285 		default:
308286 			chnlgroup = 0;
309
-			writeVal = rtlphy->mcs_offset[chnlgroup]
287
+			writeval = rtlphy->mcs_offset[chnlgroup]
310288 			    [index + (rf ? 8 : 0)]
311
-			    + ((index < 2) ? powerBase0[rf] : powerBase1[rf]);
289
+			    + ((index < 2) ? powerbase0[rf] : powerbase1[rf]);
312290 
313291 			RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
314
-				"RTK better performance, writeVal rf(%c) = 0x%x\n",
315
-				rf == 0 ? 'A' : 'B', writeVal);
292
+				"RTK better performance, writeval rf(%c) = 0x%x\n",
293
+				rf == 0 ? 'A' : 'B', writeval);
316294 			break;
317295 		}
318296 
319297 		if (rtlpriv->dm.dynamic_txhighpower_lvl == TXHIGHPWRLEVEL_BT1)
320
-			writeVal = writeVal - 0x06060606;
298
+			writeval = writeval - 0x06060606;
321299 		else if (rtlpriv->dm.dynamic_txhighpower_lvl ==
322300 			 TXHIGHPWRLEVEL_BT2)
323
-			writeVal = writeVal - 0x0c0c0c0c;
324
-		*(p_outwriteval + rf) = writeVal;
301
+			writeval = writeval - 0x0c0c0c0c;
302
+		*(p_outwriteval + rf) = writeval;
325303 	}
326304 }
327305 
328306 static void _rtl92c_write_ofdm_power_reg(struct ieee80211_hw *hw,
329
-					 u8 index, u32 *pValue)
307
+					 u8 index, u32 *value)
330308 {
331309 	struct rtl_priv *rtlpriv = rtl_priv(hw);
332310 	struct rtl_phy *rtlphy = &(rtlpriv->phy);
....@@ -342,29 +320,29 @@
342320 		RTXAGC_B_MCS11_MCS08, RTXAGC_B_MCS15_MCS12
343321 	};
344322 	u8 i, rf, pwr_val[4];
345
-	u32 writeVal;
323
+	u32 writeval;
346324 	u16 regoffset;
347325 
348326 	for (rf = 0; rf < 2; rf++) {
349
-		writeVal = pValue[rf];
327
+		writeval = value[rf];
350328 		for (i = 0; i < 4; i++) {
351
-			pwr_val[i] = (u8) ((writeVal & (0x7f <<
329
+			pwr_val[i] = (u8)((writeval & (0x7f <<
352330 							(i * 8))) >> (i * 8));
353331 
354332 			if (pwr_val[i] > RF6052_MAX_TX_PWR)
355333 				pwr_val[i] = RF6052_MAX_TX_PWR;
356334 		}
357
-		writeVal = (pwr_val[3] << 24) | (pwr_val[2] << 16) |
335
+		writeval = (pwr_val[3] << 24) | (pwr_val[2] << 16) |
358336 		    (pwr_val[1] << 8) | pwr_val[0];
359337 
360338 		if (rf == 0)
361339 			regoffset = regoffset_a[index];
362340 		else
363341 			regoffset = regoffset_b[index];
364
-		rtl_set_bbreg(hw, regoffset, MASKDWORD, writeVal);
342
+		rtl_set_bbreg(hw, regoffset, MASKDWORD, writeval);
365343 
366344 		RTPRINT(rtlpriv, FPHY, PHY_TXPWR,
367
-			"Set 0x%x = %08x\n", regoffset, writeVal);
345
+			"Set 0x%x = %08x\n", regoffset, writeval);
368346 
369347 		if (((get_rf_type(rtlphy) == RF_2T2R) &&
370348 		     (regoffset == RTXAGC_A_MCS15_MCS12 ||
....@@ -373,7 +351,7 @@
373351 		     (regoffset == RTXAGC_A_MCS07_MCS04 ||
374352 		      regoffset == RTXAGC_B_MCS07_MCS04))) {
375353 
376
-			writeVal = pwr_val[3];
354
+			writeval = pwr_val[3];
377355 			if (regoffset == RTXAGC_A_MCS15_MCS12 ||
378356 			    regoffset == RTXAGC_A_MCS07_MCS04)
379357 				regoffset = 0xc90;
....@@ -382,9 +360,9 @@
382360 				regoffset = 0xc98;
383361 
384362 			for (i = 0; i < 3; i++) {
385
-				writeVal = (writeVal > 6) ? (writeVal - 6) : 0;
363
+				writeval = (writeval > 6) ? (writeval - 6) : 0;
386364 				rtl_write_byte(rtlpriv, (u32) (regoffset + i),
387
-					       (u8) writeVal);
365
+					       (u8)writeval);
388366 			}
389367 		}
390368 	}
....@@ -393,20 +371,20 @@
393371 void rtl92ce_phy_rf6052_set_ofdm_txpower(struct ieee80211_hw *hw,
394372 					u8 *ppowerlevel, u8 channel)
395373 {
396
-	u32 writeVal[2], powerBase0[2], powerBase1[2];
374
+	u32 writeval[2], powerbase0[2], powerbase1[2];
397375 	u8 index;
398376 
399377 	rtl92c_phy_get_power_base(hw, ppowerlevel,
400
-				  channel, &powerBase0[0], &powerBase1[0]);
378
+				  channel, &powerbase0[0], &powerbase1[0]);
401379 
402380 	for (index = 0; index < 6; index++) {
403381 		_rtl92c_get_txpower_writeval_by_regulatory(hw,
404382 							   channel, index,
405
-							   &powerBase0[0],
406
-							   &powerBase1[0],
407
-							   &writeVal[0]);
383
+							   &powerbase0[0],
384
+							   &powerbase1[0],
385
+							   &writeval[0]);
408386 
409
-		_rtl92c_write_ofdm_power_reg(hw, index, &writeVal[0]);
387
+		_rtl92c_write_ofdm_power_reg(hw, index, &writeval[0]);
410388 	}
411389 }
412390 
....@@ -492,13 +470,13 @@
492470 		}
493471 
494472 		if (!rtstatus) {
495
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
496
-				 "Radio[%d] Fail!!\n", rfpath);
473
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
474
+				"Radio[%d] Fail!!\n", rfpath);
497475 			return false;
498476 		}
499477 
500478 	}
501479 
502
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "<---\n");
480
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "<---\n");
503481 	return rtstatus;
504482 }