disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/drivers/net/wireless/intel/iwlwifi/fw/api/debug.h
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@@ -5,9 +5,9 @@
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  *
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  * GPL LICENSE SUMMARY
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  *
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- * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
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  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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+ * Copyright(c) 2007 - 2014, 2018 - 2020 Intel Corporation
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  *
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  * This program is free software; you can redistribute it and/or modify
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  * it under the terms of version 2 of the GNU General Public License as
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@@ -27,9 +27,9 @@
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  *
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  * BSD LICENSE
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  *
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- * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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  * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
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  * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
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+ * Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
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  * All rights reserved.
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  *
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  * Redistribution and use in source and binary forms, with or without
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@@ -79,6 +79,19 @@
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 	 */
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 	UMAC_RD_WR = 0x1,
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 	/**
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+	 * @DBGC_SUSPEND_RESUME:
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+	 * DBGC suspend/resume commad. Uses a single dword as data:
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+	 * 0 - resume DBGC recording
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+	 * 1 - suspend DBGC recording
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+	 */
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+	DBGC_SUSPEND_RESUME = 0x7,
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+	/**
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+	 * @BUFFER_ALLOCATION:
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+	 * passes DRAM buffers to a DBGC
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+	 * &struct iwl_buf_alloc_cmd
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+	 */
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+	BUFFER_ALLOCATION = 0x8,
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+	/**
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 	 * @MFU_ASSERT_DUMP_NTF:
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 	 * &struct iwl_mfu_assert_dump_notif
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 	 */
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@@ -98,6 +111,16 @@
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 	FW_ERR_OBSOLETE_FUNC = 0x12,
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 	FW_ERR_UNEXPECTED = 0xFE,
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 	FW_ERR_FATAL = 0xFF
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+};
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+
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+/** enum iwl_dbg_suspend_resume_cmds - dbgc suspend resume operations
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+ * dbgc suspend resume command operations
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+ * @DBGC_RESUME_CMD: resume dbgc recording
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+ * @DBGC_SUSPEND_CMD: stop dbgc recording
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+ */
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+enum iwl_dbg_suspend_resume_cmds {
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+	DBGC_RESUME_CMD,
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+	DBGC_SUSPEND_CMD,
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 };
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 /**
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@@ -193,6 +216,8 @@
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  * @page_buff_size: size of %page_buff_addr
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  * @lmac_num: number of LMACs (1 or 2)
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  * @lmac_smem: per - LMAC smem data
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+ * @rxfifo2_control_addr: start addr of RXF2C
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+ * @rxfifo2_control_size: size of RXF2C
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  */
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 struct iwl_shared_mem_cfg {
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 	__le32 shared_mem_addr;
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@@ -204,8 +229,10 @@
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 	__le32 page_buff_addr;
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 	__le32 page_buff_size;
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 	__le32 lmac_num;
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-	struct iwl_shared_mem_lmac_cfg lmac_smem[2];
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-} __packed; /* SHARED_MEM_ALLOC_API_S_VER_3 */
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+	struct iwl_shared_mem_lmac_cfg lmac_smem[3];
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+	__le32 rxfifo2_control_addr;
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+	__le32 rxfifo2_control_size;
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+} __packed; /* SHARED_MEM_ALLOC_API_S_VER_4 */
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 /**
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  * struct iwl_mfuart_load_notif - mfuart image version & status
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@@ -333,24 +360,39 @@
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 	__le32 data[];
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 } __packed; /* DEBUG_(U|L)MAC_RD_WR_RSP_API_S_VER_1 */
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-#define CONT_REC_COMMAND_SIZE	80
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-#define ENABLE_CONT_RECORDING	0x15
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-#define DISABLE_CONT_RECORDING	0x16
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-
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-/*
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- * struct iwl_continuous_record_mode - recording mode
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+/**
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+ * struct iwl_dbg_suspend_resume_cmd - dbgc suspend resume command
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+ * @operation: suspend or resume operation, uses
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+ *	&enum iwl_dbg_suspend_resume_cmds
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  */
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-struct iwl_continuous_record_mode {
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-	__le16 enable_recording;
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+struct iwl_dbg_suspend_resume_cmd {
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+	__le32 operation;
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 } __packed;
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-/*
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- * struct iwl_continuous_record_cmd - enable/disable continuous recording
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+#define BUF_ALLOC_MAX_NUM_FRAGS 16
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+
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+/**
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+ * struct iwl_buf_alloc_frag - a DBGC fragment
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+ * @addr: base address of the fragment
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+ * @size: size of the fragment
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  */
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-struct iwl_continuous_record_cmd {
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-	struct iwl_continuous_record_mode record_mode;
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-	u8 pad[CONT_REC_COMMAND_SIZE -
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-		sizeof(struct iwl_continuous_record_mode)];
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-} __packed;
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+struct iwl_buf_alloc_frag {
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+	__le64 addr;
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+	__le32 size;
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+} __packed; /* FRAGMENT_STRUCTURE_API_S_VER_1 */
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+
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+/**
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+ * struct iwl_buf_alloc_cmd - buffer allocation command
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+ * @alloc_id: &enum iwl_fw_ini_allocation_id
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+ * @buf_location: &enum iwl_fw_ini_buffer_location
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+ * @num_frags: number of fragments
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+ * @frags: fragments array
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+ */
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+struct iwl_buf_alloc_cmd {
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+	__le32 alloc_id;
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+	__le32 buf_location;
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+	__le32 num_frags;
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+	struct iwl_buf_alloc_frag frags[BUF_ALLOC_MAX_NUM_FRAGS];
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+} __packed; /* BUFFER_ALLOCATION_CMD_API_S_VER_2 */
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 #endif /* __iwl_fw_api_debug_h__ */