disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c
..
..
@@ -1,16 +1,8 @@
1
+// SPDX-License-Identifier: GPL-2.0
1
2
 /*
2
3
 * Copyright (c) 2016 MediaTek Inc.
3
4
 * Author: PC Chen <pc.chen@mediatek.com>
4
5
 *	Tiffany Lin <tiffany.lin@mediatek.com>
5
-*
6
-* This program is free software; you can redistribute it and/or modify
7
-* it under the terms of the GNU General Public License version 2 as
8
-* published by the Free Software Foundation.
9
-*
10
-* This program is distributed in the hope that it will be useful,
11
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13
-* GNU General Public License for more details.
14
6
 */
15
7
 
16
8
 #include <linux/slab.h>
..
..
@@ -29,10 +21,54 @@
29
21
 #include "mtk_vcodec_enc_pm.h"
30
22
 #include "mtk_vcodec_intr.h"
31
23
 #include "mtk_vcodec_util.h"
32
-#include "mtk_vpu.h"
24
+#include "mtk_vcodec_fw.h"
33
25
 
34
26
 module_param(mtk_v4l2_dbg_level, int, S_IRUGO | S_IWUSR);
35
27
 module_param(mtk_vcodec_dbg, bool, S_IRUGO | S_IWUSR);
28
+
29
+static const struct mtk_video_fmt mtk_video_formats_output_mt8173[] = {
30
+	{
31
+		.fourcc = V4L2_PIX_FMT_NV12M,
32
+		.type = MTK_FMT_FRAME,
33
+		.num_planes = 2,
34
+	},
35
+	{
36
+		.fourcc = V4L2_PIX_FMT_NV21M,
37
+		.type = MTK_FMT_FRAME,
38
+		.num_planes = 2,
39
+	},
40
+	{
41
+		.fourcc = V4L2_PIX_FMT_YUV420M,
42
+		.type = MTK_FMT_FRAME,
43
+		.num_planes = 3,
44
+	},
45
+	{
46
+		.fourcc = V4L2_PIX_FMT_YVU420M,
47
+		.type = MTK_FMT_FRAME,
48
+		.num_planes = 3,
49
+	},
50
+};
51
+
52
+static const struct mtk_video_fmt mtk_video_formats_capture_mt8173[] =  {
53
+	{
54
+		.fourcc = V4L2_PIX_FMT_H264,
55
+		.type = MTK_FMT_ENC,
56
+		.num_planes = 1,
57
+	},
58
+	{
59
+		.fourcc = V4L2_PIX_FMT_VP8,
60
+		.type = MTK_FMT_ENC,
61
+		.num_planes = 1,
62
+	},
63
+};
64
+
65
+static const struct mtk_video_fmt mtk_video_formats_capture_mt8183[] =  {
66
+	{
67
+		.fourcc = V4L2_PIX_FMT_H264,
68
+		.type = MTK_FMT_ENC,
69
+		.num_planes = 1,
70
+	},
71
+};
36
72
 
37
73
 /* Wake up context wait_queue */
38
74
 static void wake_up_ctx(struct mtk_vcodec_ctx *ctx, unsigned int reason)
..
..
@@ -109,22 +145,6 @@
109
145
 	return IRQ_HANDLED;
110
146
 }
111
147
 
112
-static void mtk_vcodec_enc_reset_handler(void *priv)
113
-{
114
-	struct mtk_vcodec_dev *dev = priv;
115
-	struct mtk_vcodec_ctx *ctx;
116
-
117
-	mtk_v4l2_debug(0, "Watchdog timeout!!");
118
-
119
-	mutex_lock(&dev->dev_mutex);
120
-	list_for_each_entry(ctx, &dev->ctx_list, list) {
121
-		ctx->state = MTK_STATE_ABORT;
122
-		mtk_v4l2_debug(0, "[%d] Change to state MTK_STATE_ABORT",
123
-				ctx->id);
124
-	}
125
-	mutex_unlock(&dev->dev_mutex);
126
-}
127
-
128
148
 static int fops_vcodec_open(struct file *file)
129
149
 {
130
150
 	struct mtk_vcodec_dev *dev = video_drvdata(file);
..
..
@@ -167,10 +187,10 @@
167
187
 
168
188
 	if (v4l2_fh_is_singular(&ctx->fh)) {
169
189
 		/*
170
-		 * vpu_load_firmware checks if it was loaded already and
190
+		 * load fireware to checks if it was loaded already and
171
191
 		 * does nothing in that case
172
192
 		 */
173
-		ret = vpu_load_firmware(dev->vpu_plat_dev);
193
+		ret = mtk_vcodec_fw_load_firmware(dev->fw_handler);
174
194
 		if (ret < 0) {
175
195
 			/*
176
196
 			 * Return 0 if downloading firmware successfully,
..
..
@@ -181,7 +201,7 @@
181
201
 		}
182
202
 
183
203
 		dev->enc_capability =
184
-			vpu_get_venc_hw_capa(dev->vpu_plat_dev);
204
+			mtk_vcodec_fw_get_venc_capa(dev->fw_handler);
185
205
 		mtk_v4l2_debug(0, "encoder capability %x", dev->enc_capability);
186
206
 	}
187
207
 
..
..
@@ -243,7 +263,9 @@
243
263
 	struct mtk_vcodec_dev *dev;
244
264
 	struct video_device *vfd_enc;
245
265
 	struct resource *res;
246
-	int i, j, ret;
266
+	phandle rproc_phandle;
267
+	enum mtk_vcodec_fw_type fw_type;
268
+	int ret;
247
269
 
248
270
 	dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
249
271
 	if (!dev)
..
..
@@ -252,30 +274,43 @@
252
274
 	INIT_LIST_HEAD(&dev->ctx_list);
253
275
 	dev->plat_dev = pdev;
254
276
 
255
-	dev->vpu_plat_dev = vpu_get_plat_device(dev->plat_dev);
256
-	if (dev->vpu_plat_dev == NULL) {
257
-		mtk_v4l2_err("[VPU] vpu device in not ready");
258
-		return -EPROBE_DEFER;
277
+	if (!of_property_read_u32(pdev->dev.of_node, "mediatek,vpu",
278
+				  &rproc_phandle)) {
279
+		fw_type = VPU;
280
+	} else if (!of_property_read_u32(pdev->dev.of_node, "mediatek,scp",
281
+					 &rproc_phandle)) {
282
+		fw_type = SCP;
283
+	} else {
284
+		mtk_v4l2_err("Could not get venc IPI device");
285
+		return -ENODEV;
259
286
 	}
287
+	if (!pdev->dev.dma_parms) {
288
+		pdev->dev.dma_parms = devm_kzalloc(&pdev->dev,
289
+						sizeof(*pdev->dev.dma_parms),
290
+						GFP_KERNEL);
291
+		if (!pdev->dev.dma_parms)
292
+			return -ENOMEM;
293
+	}
294
+	dma_set_max_seg_size(&pdev->dev, DMA_BIT_MASK(32));
260
295
 
261
-	vpu_wdt_reg_handler(dev->vpu_plat_dev, mtk_vcodec_enc_reset_handler,
262
-				dev, VPU_RST_ENC);
296
+	dev->fw_handler = mtk_vcodec_fw_select(dev, fw_type, ENCODER);
297
+	if (IS_ERR(dev->fw_handler))
298
+		return PTR_ERR(dev->fw_handler);
263
299
 
300
+	dev->venc_pdata = of_device_get_match_data(&pdev->dev);
264
301
 	ret = mtk_vcodec_init_enc_pm(dev);
265
302
 	if (ret < 0) {
266
303
 		dev_err(&pdev->dev, "Failed to get mt vcodec clock source!");
267
-		return ret;
304
+		goto err_enc_pm;
268
305
 	}
269
306
 
270
-	for (i = VENC_SYS, j = 0; i < NUM_MAX_VCODEC_REG_BASE; i++, j++) {
271
-		res = platform_get_resource(pdev, IORESOURCE_MEM, j);
272
-		dev->reg_base[i] = devm_ioremap_resource(&pdev->dev, res);
273
-		if (IS_ERR((__force void *)dev->reg_base[i])) {
274
-			ret = PTR_ERR((__force void *)dev->reg_base[i]);
275
-			goto err_res;
276
-		}
277
-		mtk_v4l2_debug(2, "reg[%d] base=0x%p", i, dev->reg_base[i]);
307
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
308
+	dev->reg_base[VENC_SYS] = devm_ioremap_resource(&pdev->dev, res);
309
+	if (IS_ERR((__force void *)dev->reg_base[VENC_SYS])) {
310
+		ret = PTR_ERR((__force void *)dev->reg_base[VENC_SYS]);
311
+		goto err_res;
278
312
 	}
313
+	mtk_v4l2_debug(2, "reg[%d] base=0x%p", VENC_SYS, dev->reg_base[VENC_SYS]);
279
314
 
280
315
 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
281
316
 	if (res == NULL) {
..
..
@@ -285,6 +320,7 @@
285
320
 	}
286
321
 
287
322
 	dev->enc_irq = platform_get_irq(pdev, 0);
323
+	irq_set_status_flags(dev->enc_irq, IRQ_NOAUTOEN);
288
324
 	ret = devm_request_irq(&pdev->dev, dev->enc_irq,
289
325
 			       mtk_vcodec_enc_irq_handler,
290
326
 			       0, pdev->name, dev);
..
..
@@ -296,20 +332,30 @@
296
332
 		goto err_res;
297
333
 	}
298
334
 
299
-	dev->enc_lt_irq = platform_get_irq(pdev, 1);
300
-	ret = devm_request_irq(&pdev->dev,
301
-			       dev->enc_lt_irq, mtk_vcodec_enc_lt_irq_handler,
302
-			       0, pdev->name, dev);
303
-	if (ret) {
304
-		dev_err(&pdev->dev,
305
-			"Failed to install dev->enc_lt_irq %d (%d)",
306
-			dev->enc_lt_irq, ret);
307
-		ret = -EINVAL;
308
-		goto err_res;
335
+	if (dev->venc_pdata->has_lt_irq) {
336
+		res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
337
+		dev->reg_base[VENC_LT_SYS] = devm_ioremap_resource(&pdev->dev, res);
338
+		if (IS_ERR((__force void *)dev->reg_base[VENC_LT_SYS])) {
339
+			ret = PTR_ERR((__force void *)dev->reg_base[VENC_LT_SYS]);
340
+			goto err_res;
341
+		}
342
+		mtk_v4l2_debug(2, "reg[%d] base=0x%p", VENC_LT_SYS, dev->reg_base[VENC_LT_SYS]);
343
+
344
+		dev->enc_lt_irq = platform_get_irq(pdev, 1);
345
+		irq_set_status_flags(dev->enc_lt_irq, IRQ_NOAUTOEN);
346
+		ret = devm_request_irq(&pdev->dev,
347
+				       dev->enc_lt_irq,
348
+				       mtk_vcodec_enc_lt_irq_handler,
349
+				       0, pdev->name, dev);
350
+		if (ret) {
351
+			dev_err(&pdev->dev,
352
+				"Failed to install dev->enc_lt_irq %d (%d)",
353
+				dev->enc_lt_irq, ret);
354
+			ret = -EINVAL;
355
+			goto err_res;
356
+		}
309
357
 	}
310
358
 
311
-	disable_irq(dev->enc_irq);
312
-	disable_irq(dev->enc_lt_irq); /* VENC_LT */
313
359
 	mutex_init(&dev->enc_mutex);
314
360
 	mutex_init(&dev->dev_mutex);
315
361
 	spin_lock_init(&dev->irqlock);
..
..
@@ -364,7 +410,7 @@
364
410
 		goto err_event_workq;
365
411
 	}
366
412
 
367
-	ret = video_register_device(vfd_enc, VFL_TYPE_GRABBER, 1);
413
+	ret = video_register_device(vfd_enc, VFL_TYPE_VIDEO, 1);
368
414
 	if (ret) {
369
415
 		mtk_v4l2_err("Failed to register video device");
370
416
 		goto err_enc_reg;
..
..
@@ -385,11 +431,38 @@
385
431
 	v4l2_device_unregister(&dev->v4l2_dev);
386
432
 err_res:
387
433
 	mtk_vcodec_release_enc_pm(dev);
434
+err_enc_pm:
435
+	mtk_vcodec_fw_release(dev->fw_handler);
388
436
 	return ret;
389
437
 }
390
438
 
439
+static const struct mtk_vcodec_enc_pdata mt8173_pdata = {
440
+	.chip = MTK_MT8173,
441
+	.has_lt_irq = true,
442
+	.capture_formats = mtk_video_formats_capture_mt8173,
443
+	.num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_mt8173),
444
+	.output_formats = mtk_video_formats_output_mt8173,
445
+	.num_output_formats = ARRAY_SIZE(mtk_video_formats_output_mt8173),
446
+	.min_bitrate = 1,
447
+	.max_bitrate = 4000000,
448
+};
449
+
450
+static const struct mtk_vcodec_enc_pdata mt8183_pdata = {
451
+	.chip = MTK_MT8183,
452
+	.has_lt_irq = false,
453
+	.uses_ext = true,
454
+	.capture_formats = mtk_video_formats_capture_mt8183,
455
+	.num_capture_formats = ARRAY_SIZE(mtk_video_formats_capture_mt8183),
456
+	/* MT8183 supports the same output formats as MT8173 */
457
+	.output_formats = mtk_video_formats_output_mt8173,
458
+	.num_output_formats = ARRAY_SIZE(mtk_video_formats_output_mt8173),
459
+	.min_bitrate = 64,
460
+	.max_bitrate = 40000000,
461
+};
462
+
391
463
 static const struct of_device_id mtk_vcodec_enc_match[] = {
392
-	{.compatible = "mediatek,mt8173-vcodec-enc",},
464
+	{.compatible = "mediatek,mt8173-vcodec-enc", .data = &mt8173_pdata},
465
+	{.compatible = "mediatek,mt8183-vcodec-enc", .data = &mt8183_pdata},
393
466
 	{},
394
467
 };
395
468
 MODULE_DEVICE_TABLE(of, mtk_vcodec_enc_match);
..
..
@@ -409,6 +482,7 @@
409
482
 
410
483
 	v4l2_device_unregister(&dev->v4l2_dev);
411
484
 	mtk_vcodec_release_enc_pm(dev);
485
+	mtk_vcodec_fw_release(dev->fw_handler);
412
486
 	return 0;
413
487
 }
414
488