disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/drivers/gpu/host1x/dev.h
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@@ -1,17 +1,6 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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 /*
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  * Copyright (c) 2012-2015, NVIDIA Corporation.
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- *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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- *
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- * You should have received a copy of the GNU General Public License
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- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
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  */
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 #ifndef HOST1X_DEV_H
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@@ -94,6 +83,12 @@
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 	int (*free_syncpt_irq)(struct host1x *host);
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 };
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+struct host1x_sid_entry {
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+	unsigned int base;
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+	unsigned int offset;
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+	unsigned int limit;
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+};
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+
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 struct host1x_info {
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 	unsigned int nb_channels; /* host1x: number of channels supported */
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 	unsigned int nb_pts; /* host1x: number of syncpoints supported */
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@@ -102,7 +97,10 @@
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 	int (*init)(struct host1x *host1x); /* initialize per SoC ops */
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 	unsigned int sync_offset; /* offset of syncpoint registers */
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 	u64 dma_mask; /* mask of addressable memory */
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+	bool has_wide_gather; /* supports GATHER_W opcode */
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 	bool has_hypervisor; /* has hypervisor registers */
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+	unsigned int num_sid_entries;
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+	const struct host1x_sid_entry *sid_table;
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 };
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 struct host1x {
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@@ -143,6 +141,8 @@
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 	struct list_head devices;
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 	struct list_head list;
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+
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+	struct device_dma_parameters dma_parms;
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 };
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 void host1x_hypervisor_writel(struct host1x *host1x, u32 r, u32 v);