| .. | .. |
|---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0-only */ |
|---|
| 1 | 2 | /* |
|---|
| 2 | 3 | * Copyright (c) 2015, NVIDIA Corporation. |
|---|
| 3 | | - * |
|---|
| 4 | | - * This program is free software; you can redistribute it and/or modify |
|---|
| 5 | | - * it under the terms of the GNU General Public License version 2 as |
|---|
| 6 | | - * published by the Free Software Foundation. |
|---|
| 7 | 4 | */ |
|---|
| 8 | 5 | |
|---|
| 9 | 6 | #ifndef _FALCON_H_ |
|---|
| .. | .. |
|---|
| 77 | 74 | u32 data_size; |
|---|
| 78 | 75 | }; |
|---|
| 79 | 76 | |
|---|
| 80 | | -struct falcon; |
|---|
| 81 | | - |
|---|
| 82 | | -struct falcon_ops { |
|---|
| 83 | | - void *(*alloc)(struct falcon *falcon, size_t size, |
|---|
| 84 | | - dma_addr_t *paddr); |
|---|
| 85 | | - void (*free)(struct falcon *falcon, size_t size, |
|---|
| 86 | | - dma_addr_t paddr, void *vaddr); |
|---|
| 87 | | -}; |
|---|
| 88 | | - |
|---|
| 89 | 77 | struct falcon_firmware_section { |
|---|
| 90 | 78 | unsigned long offset; |
|---|
| 91 | 79 | size_t size; |
|---|
| .. | .. |
|---|
| 96 | 84 | const struct firmware *firmware; |
|---|
| 97 | 85 | |
|---|
| 98 | 86 | /* Raw firmware data */ |
|---|
| 99 | | - dma_addr_t paddr; |
|---|
| 100 | | - void *vaddr; |
|---|
| 87 | + dma_addr_t iova; |
|---|
| 88 | + dma_addr_t phys; |
|---|
| 89 | + void *virt; |
|---|
| 101 | 90 | size_t size; |
|---|
| 102 | 91 | |
|---|
| 103 | 92 | /* Parsed firmware information */ |
|---|
| .. | .. |
|---|
| 110 | 99 | /* Set by falcon client */ |
|---|
| 111 | 100 | struct device *dev; |
|---|
| 112 | 101 | void __iomem *regs; |
|---|
| 113 | | - const struct falcon_ops *ops; |
|---|
| 114 | | - void *data; |
|---|
| 115 | 102 | |
|---|
| 116 | 103 | struct falcon_firmware firmware; |
|---|
| 117 | 104 | }; |
|---|