disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/drivers/clk/microchip/clk-core.c
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@@ -1,20 +1,13 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * Purna Chandra Mandal,<purna.mandal@microchip.com>
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  * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
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- *
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- * This program is free software; you can distribute it and/or modify it
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- * under the terms of the GNU General Public License (Version 2) as
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- * published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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- * for more details.
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  */
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 #include <linux/clk-provider.h>
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 #include <linux/delay.h>
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 #include <linux/device.h>
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 #include <linux/interrupt.h>
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+#include <linux/io.h>
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 #include <linux/iopoll.h>
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 #include <asm/mach-pic32/pic32.h>
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 #include <asm/traps.h>
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@@ -273,10 +266,12 @@
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 	writel(REFO_ON | REFO_OE, PIC32_CLR(refo->ctrl_reg));
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 }
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-static void roclk_init(struct clk_hw *hw)
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+static int roclk_init(struct clk_hw *hw)
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 {
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 	/* initialize clock in disabled state */
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 	roclk_disable(hw);
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+
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+	return 0;
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 }
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 static u8 roclk_get_parent(struct clk_hw *hw)
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@@ -887,7 +882,7 @@
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 	return err;
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 }
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-static void sclk_init(struct clk_hw *hw)
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+static int sclk_init(struct clk_hw *hw)
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 {
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 	struct pic32_sys_clk *sclk = clkhw_to_sys_clk(hw);
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 	unsigned long flags;
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@@ -906,6 +901,8 @@
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 		writel(v, sclk->slew_reg);
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 		spin_unlock_irqrestore(&sclk->core->reg_lock, flags);
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 	}
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+
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+	return 0;
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 }
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 /* sclk with post-divider */