disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/arch/sparc/include/asm/pgtable_32.h
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@@ -11,8 +11,18 @@
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11
 
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 #include <linux/const.h>
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+#define PMD_SHIFT		18
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+#define PMD_SIZE        	(1UL << PMD_SHIFT)
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+#define PMD_MASK        	(~(PMD_SIZE-1))
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+#define PMD_ALIGN(__addr) 	(((__addr) + ~PMD_MASK) & PMD_MASK)
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+
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+#define PGDIR_SHIFT     	24
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+#define PGDIR_SIZE      	(1UL << PGDIR_SHIFT)
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+#define PGDIR_MASK      	(~(PGDIR_SIZE-1))
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+#define PGDIR_ALIGN(__addr) 	(((__addr) + ~PGDIR_MASK) & PGDIR_MASK)
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+
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 #ifndef __ASSEMBLY__
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-#include <asm-generic/4level-fixup.h>
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+#include <asm-generic/pgtable-nopud.h>
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 #include <linux/spinlock.h>
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 #include <linux/mm_types.h>
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@@ -34,17 +44,10 @@
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 #define pmd_ERROR(e)   __builtin_trap()
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 #define pgd_ERROR(e)   __builtin_trap()
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-#define PMD_SHIFT		22
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-#define PMD_SIZE        	(1UL << PMD_SHIFT)
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-#define PMD_MASK        	(~(PMD_SIZE-1))
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-#define PMD_ALIGN(__addr) 	(((__addr) + ~PMD_MASK) & PMD_MASK)
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-#define PGDIR_SHIFT     	SRMMU_PGDIR_SHIFT
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-#define PGDIR_SIZE      	SRMMU_PGDIR_SIZE
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-#define PGDIR_MASK      	SRMMU_PGDIR_MASK
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-#define PTRS_PER_PTE    	1024
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-#define PTRS_PER_PMD    	SRMMU_PTRS_PER_PMD
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-#define PTRS_PER_PGD    	SRMMU_PTRS_PER_PGD
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-#define USER_PTRS_PER_PGD	PAGE_OFFSET / SRMMU_PGDIR_SIZE
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+#define PTRS_PER_PTE    	64
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+#define PTRS_PER_PMD    	64
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+#define PTRS_PER_PGD    	256
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+#define USER_PTRS_PER_PGD	PAGE_OFFSET / PGDIR_SIZE
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 #define FIRST_USER_ADDRESS	0UL
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 #define PTE_SIZE		(PTRS_PER_PTE*4)
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@@ -132,13 +135,30 @@
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 	return pfn_to_page((pmd_val(pmd) & SRMMU_PTD_PMASK) >> (PAGE_SHIFT-4));
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 }
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-static inline unsigned long pgd_page_vaddr(pgd_t pgd)
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+static inline unsigned long __pmd_page(pmd_t pmd)
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 {
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-	if (srmmu_device_memory(pgd_val(pgd))) {
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-		return ~0;
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+	unsigned long v;
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+
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+	if (srmmu_device_memory(pmd_val(pmd)))
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+		BUG();
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+
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+	v = pmd_val(pmd) & SRMMU_PTD_PMASK;
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+	return (unsigned long)__nocache_va(v << 4);
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+}
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+
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+static inline unsigned long pmd_page_vaddr(pmd_t pmd)
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+{
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+	unsigned long v = pmd_val(pmd) & SRMMU_PTD_PMASK;
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+	return (unsigned long)__nocache_va(v << 4);
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+}
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+
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+static inline pmd_t *pud_pgtable(pud_t pud)
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+{
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+	if (srmmu_device_memory(pud_val(pud))) {
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+		return (pmd_t *)~0;
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 	} else {
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-		unsigned long v = pgd_val(pgd) & SRMMU_PTD_PMASK;
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-		return (unsigned long)__nocache_va(v << 4);
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+		unsigned long v = pud_val(pud) & SRMMU_PTD_PMASK;
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+		return (pmd_t *)__nocache_va(v << 4);
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 	}
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 }
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@@ -179,29 +199,27 @@
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 static inline void pmd_clear(pmd_t *pmdp)
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 {
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-	int i;
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-	for (i = 0; i < PTRS_PER_PTE/SRMMU_REAL_PTRS_PER_PTE; i++)
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-		set_pte((pte_t *)&pmdp->pmdv[i], __pte(0));
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+	set_pte((pte_t *)&pmd_val(*pmdp), __pte(0));
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 }
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-static inline int pgd_none(pgd_t pgd)          
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+static inline int pud_none(pud_t pud)
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 {
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-	return !(pgd_val(pgd) & 0xFFFFFFF);
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+	return !(pud_val(pud) & 0xFFFFFFF);
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 }
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-static inline int pgd_bad(pgd_t pgd)
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+static inline int pud_bad(pud_t pud)
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 {
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-	return (pgd_val(pgd) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
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+	return (pud_val(pud) & SRMMU_ET_MASK) != SRMMU_ET_PTD;
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 }
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-static inline int pgd_present(pgd_t pgd)
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+static inline int pud_present(pud_t pud)
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 {
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-	return ((pgd_val(pgd) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
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+	return ((pud_val(pud) & SRMMU_ET_MASK) == SRMMU_ET_PTD);
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 }
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-static inline void pgd_clear(pgd_t *pgdp)
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+static inline void pud_clear(pud_t *pudp)
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 {
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-	set_pte((pte_t *)pgdp, __pte(0));
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+	set_pte((pte_t *)pudp, __pte(0));
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 }
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 /*
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@@ -221,11 +239,6 @@
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 static inline int pte_young(pte_t pte)
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 {
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 	return pte_val(pte) & SRMMU_REF;
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-}
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-
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-static inline int pte_special(pte_t pte)
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-{
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-	return 0;
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 }
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 static inline pte_t pte_wrprotect(pte_t pte)
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@@ -257,8 +270,6 @@
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 {
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 	return __pte(pte_val(pte) | SRMMU_REF);
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 }
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-
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-#define pte_mkspecial(pte)    (pte)
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 #define pfn_pte(pfn, prot)		mk_pte(pfn_to_page(pfn), prot)
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@@ -309,30 +320,6 @@
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 	return __pte((pte_val(pte) & SRMMU_CHG_MASK) |
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 		pgprot_val(newprot));
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 }
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-
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-#define pgd_index(address) ((address) >> PGDIR_SHIFT)
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-
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-/* to find an entry in a page-table-directory */
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-#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
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-
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-/* to find an entry in a kernel page-table-directory */
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-#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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-
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-/* Find an entry in the second-level page table.. */
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-static inline pmd_t *pmd_offset(pgd_t * dir, unsigned long address)
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-{
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-	return (pmd_t *) pgd_page_vaddr(*dir) +
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-		((address >> PMD_SHIFT) & (PTRS_PER_PMD - 1));
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-}
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-
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-/* Find an entry in the third-level page table.. */
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-pte_t *pte_offset_kernel(pmd_t * dir, unsigned long address);
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-
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-/*
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- * This shortcut works on sun4m (and sun4d) because the nocache area is static.
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- */
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-#define pte_offset_map(d, a)		pte_offset_kernel(d,a)
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-#define pte_unmap(pte)		do{}while(0)
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 struct seq_file;
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 void mmu_info(struct seq_file *m);
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@@ -422,7 +409,7 @@
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 	return remap_pfn_range(vma, from, phys_base >> PAGE_SHIFT, size, prot);
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 }
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-#define io_remap_pfn_range io_remap_pfn_range 
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+#define io_remap_pfn_range io_remap_pfn_range
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 #define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
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 #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
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@@ -435,8 +422,6 @@
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 	__changed;							  \
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 })
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-#include <asm-generic/pgtable.h>
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-
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 #endif /* !(__ASSEMBLY__) */
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 #define VMALLOC_START           _AC(0xfe600000,UL)
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@@ -444,10 +429,5 @@
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 /* We provide our own get_unmapped_area to cope with VA holes for userland */
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 #define HAVE_ARCH_UNMAPPED_AREA
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-
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-/*
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- * No page table caches to initialise
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- */
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-#define pgtable_cache_init()	do { } while (0)
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 #endif /* !(_SPARC_PGTABLE_H) */