disable pwm7

hc

2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a

 kernel/arch/arm64/kernel/cpuidle.c
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@@ -1,12 +1,9 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  * ARM64 CPU idle arch support
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  *
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  * Copyright (C) 2014 ARM Ltd.
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  * Author: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
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- *
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- * This program is free software; you can redistribute it and/or modify
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- * it under the terms of the GNU General Public License version 2 as
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- * published by the Free Software Foundation.
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  */
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8
 
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 #include <linux/acpi.h>
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@@ -14,17 +11,18 @@
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 #include <linux/cpu_pm.h>
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 #include <linux/of.h>
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 #include <linux/of_device.h>
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+#include <linux/psci.h>
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15
 
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 #include <asm/cpuidle.h>
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 #include <asm/cpu_ops.h>
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18
 
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 int arm_cpuidle_init(unsigned int cpu)
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 {
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+	const struct cpu_operations *ops = get_cpu_ops(cpu);
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 	int ret = -EOPNOTSUPP;
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23
 
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-	if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_suspend &&
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-			cpu_ops[cpu]->cpu_init_idle)
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-		ret = cpu_ops[cpu]->cpu_init_idle(cpu);
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+	if (ops && ops->cpu_suspend && ops->cpu_init_idle)
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+		ret = ops->cpu_init_idle(cpu);
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 	return ret;
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 }
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@@ -39,10 +37,10 @@
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 int arm_cpuidle_suspend(int index)
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 {
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 	int cpu = smp_processor_id();
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+	const struct cpu_operations *ops = get_cpu_ops(cpu);
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-	return cpu_ops[cpu]->cpu_suspend(index);
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+	return ops->cpu_suspend(index);
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 }
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-EXPORT_SYMBOL_GPL(arm_cpuidle_suspend);
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 #ifdef CONFIG_ACPI
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46
 
..
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@@ -50,17 +48,58 @@
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48
 
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 #define ARM64_LPI_IS_RETENTION_STATE(arch_flags) (!(arch_flags))
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50
 
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+static int psci_acpi_cpu_init_idle(unsigned int cpu)
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+{
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+	int i, count;
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+	struct acpi_lpi_state *lpi;
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+	struct acpi_processor *pr = per_cpu(processors, cpu);
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+
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+	if (unlikely(!pr || !pr->flags.has_lpi))
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+		return -EINVAL;
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+
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+	/*
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+	 * If the PSCI cpu_suspend function hook has not been initialized
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+	 * idle states must not be enabled, so bail out
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+	 */
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+	if (!psci_ops.cpu_suspend)
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+		return -EOPNOTSUPP;
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+
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+	count = pr->power.count - 1;
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+	if (count <= 0)
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+		return -ENODEV;
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+
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+	for (i = 0; i < count; i++) {
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+		u32 state;
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+
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+		lpi = &pr->power.lpi_states[i + 1];
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+		/*
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+		 * Only bits[31:0] represent a PSCI power_state while
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+		 * bits[63:32] must be 0x0 as per ARM ACPI FFH Specification
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+		 */
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+		state = lpi->address;
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+		if (!psci_power_state_is_valid(state)) {
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+			pr_warn("Invalid PSCI power state %#x\n", state);
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+			return -EINVAL;
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+		}
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+	}
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+
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+	return 0;
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+}
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+
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 int acpi_processor_ffh_lpi_probe(unsigned int cpu)
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 {
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-	return arm_cpuidle_init(cpu);
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+	return psci_acpi_cpu_init_idle(cpu);
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 }
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 int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
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 {
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+	u32 state = lpi->address;
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+
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 	if (ARM64_LPI_IS_RETENTION_STATE(lpi->arch_flags))
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-		return CPU_PM_CPU_IDLE_ENTER_RETENTION(arm_cpuidle_suspend,
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-						lpi->index);
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+		return CPU_PM_CPU_IDLE_ENTER_RETENTION_PARAM(psci_cpu_suspend_enter,
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+						lpi->index, state);
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 	else
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-		return CPU_PM_CPU_IDLE_ENTER(arm_cpuidle_suspend, lpi->index);
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+		return CPU_PM_CPU_IDLE_ENTER_PARAM(psci_cpu_suspend_enter,
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+					     lpi->index, state);
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 }
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 #endif