forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a
kernel/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
....@@ -17,7 +17,7 @@
1717 stdout-path = "serial0:115200n8";
1818 };
1919
20
- memory {
20
+ memory@80000000 {
2121 device_type = "memory";
2222 reg = <0x0 0x80000000 0x1 0x0>;
2323 };
....@@ -38,7 +38,8 @@
3838 pmic: pmic@3c {
3939 compatible = "maxim,max77620";
4040 reg = <0x3c>;
41
- interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
41
+ interrupt-parent = <&tegra_pmc>;
42
+ interrupts = <51 IRQ_TYPE_LEVEL_LOW>;
4243
4344 #interrupt-cells = <2>;
4445 interrupt-controller;
....@@ -178,16 +179,7 @@
178179
179180 vddio_sdmmc: ldo2 {
180181 regulator-name = "VDDIO_SDMMC";
181
- /*
182
- * Technically this supply should have
183
- * a supported range from 1.8 - 3.3 V.
184
- * However, that would cause the SDHCI
185
- * driver to request 2.7 V upon access
186
- * and that in turn will cause traffic
187
- * to be broken. Leave it at 3.3 V for
188
- * now.
189
- */
190
- regulator-min-microvolt = <3300000>;
182
+ regulator-min-microvolt = <1800000>;
191183 regulator-max-microvolt = <3300000>;
192184 regulator-always-on;
193185 regulator-boot-on;
....@@ -273,29 +265,46 @@
273265 };
274266 };
275267
268
+ i2c@7000c500 {
269
+ status = "okay";
270
+
271
+ /* module ID EEPROM */
272
+ eeprom@50 {
273
+ compatible = "atmel,24c02";
274
+ reg = <0x50>;
275
+
276
+ label = "module";
277
+ vcc-supply = <&vdd_1v8>;
278
+ address-width = <8>;
279
+ pagesize = <8>;
280
+ size = <256>;
281
+ read-only;
282
+ };
283
+ };
284
+
276285 pmc@7000e400 {
277286 nvidia,invert-interrupt;
287
+ nvidia,suspend-mode = <0>;
288
+ nvidia,cpu-pwr-good-time = <0>;
289
+ nvidia,cpu-pwr-off-time = <0>;
290
+ nvidia,core-pwr-good-time = <4587 3876>;
291
+ nvidia,core-pwr-off-time = <39065>;
292
+ nvidia,core-power-req-active-high;
293
+ nvidia,sys-clock-req-active-high;
278294 };
279295
280296 /* eMMC */
281
- sdhci@700b0600 {
297
+ mmc@700b0600 {
282298 status = "okay";
283299 bus-width = <8>;
284300 non-removable;
285301 vqmmc-supply = <&vdd_1v8>;
286302 };
287303
288
- clocks {
289
- compatible = "simple-bus";
290
- #address-cells = <1>;
291
- #size-cells = <0>;
292
-
293
- clk32k_in: clock@0 {
294
- compatible = "fixed-clock";
295
- reg = <0>;
296
- #clock-cells = <0>;
297
- clock-frequency = <32768>;
298
- };
304
+ clk32k_in: clock@0 {
305
+ compatible = "fixed-clock";
306
+ clock-frequency = <32768>;
307
+ #clock-cells = <0>;
299308 };
300309
301310 cpus {
....@@ -314,6 +323,12 @@
314323 cpu@3 {
315324 enable-method = "psci";
316325 };
326
+
327
+ idle-states {
328
+ cpu-sleep {
329
+ status = "okay";
330
+ };
331
+ };
317332 };
318333
319334 psci {
....@@ -321,18 +336,15 @@
321336 method = "smc";
322337 };
323338
324
- regulators {
325
- vdd_gpu: regulator@100 {
326
- compatible = "pwm-regulator";
327
- reg = <100>;
328
- pwms = <&pwm 1 4880>;
329
- regulator-name = "VDD_GPU";
330
- regulator-min-microvolt = <710000>;
331
- regulator-max-microvolt = <1320000>;
332
- enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
333
- regulator-ramp-delay = <80>;
334
- regulator-enable-ramp-delay = <2000>;
335
- regulator-settling-time-us = <160>;
336
- };
339
+ vdd_gpu: regulator@100 {
340
+ compatible = "pwm-regulator";
341
+ pwms = <&pwm 1 8000>;
342
+ regulator-name = "VDD_GPU";
343
+ regulator-min-microvolt = <710000>;
344
+ regulator-max-microvolt = <1320000>;
345
+ enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
346
+ regulator-ramp-delay = <80>;
347
+ regulator-enable-ramp-delay = <2000>;
348
+ regulator-settling-time-us = <160>;
337349 };
338350 };