hc
2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a
kernel/arch/arm/include/asm/vfpmacros.h
....@@ -8,7 +8,16 @@
88
99 #include <asm/vfp.h>
1010
11
-@ Macros to allow building with old toolkits (with no VFP support)
11
+#ifdef CONFIG_AS_VFP_VMRS_FPINST
12
+ .macro VFPFMRX, rd, sysreg, cond
13
+ vmrs\cond \rd, \sysreg
14
+ .endm
15
+
16
+ .macro VFPFMXR, sysreg, rd, cond
17
+ vmsr\cond \sysreg, \rd
18
+ .endm
19
+#else
20
+ @ Macros to allow building with old toolkits (with no VFP support)
1221 .macro VFPFMRX, rd, sysreg, cond
1322 MRC\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMRX \rd, \sysreg
1423 .endm
....@@ -16,26 +25,29 @@
1625 .macro VFPFMXR, sysreg, rd, cond
1726 MCR\cond p10, 7, \rd, \sysreg, cr0, 0 @ FMXR \sysreg, \rd
1827 .endm
28
+#endif
1929
2030 @ read all the working registers back into the VFP
2131 .macro VFPFLDMIA, base, tmp
32
+ .fpu vfpv2
2233 #if __LINUX_ARM_ARCH__ < 6
23
- LDC p11, cr0, [\base],#33*4 @ FLDMIAX \base!, {d0-d15}
34
+ fldmiax \base!, {d0-d15}
2435 #else
25
- LDC p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d0-d15}
36
+ vldmia \base!, {d0-d15}
2637 #endif
2738 #ifdef CONFIG_VFPv3
39
+ .fpu vfpv3
2840 #if __LINUX_ARM_ARCH__ <= 6
2941 ldr \tmp, =elf_hwcap @ may not have MVFR regs
3042 ldr \tmp, [\tmp, #0]
3143 tst \tmp, #HWCAP_VFPD32
32
- ldclne p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
44
+ vldmiane \base!, {d16-d31}
3345 addeq \base, \base, #32*4 @ step over unused register space
3446 #else
3547 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
3648 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
3749 cmp \tmp, #2 @ 32 x 64bit registers?
38
- ldcleq p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
50
+ vldmiaeq \base!, {d16-d31}
3951 addne \base, \base, #32*4 @ step over unused register space
4052 #endif
4153 #endif
....@@ -44,22 +56,23 @@
4456 @ write all the working registers out of the VFP
4557 .macro VFPFSTMIA, base, tmp
4658 #if __LINUX_ARM_ARCH__ < 6
47
- STC p11, cr0, [\base],#33*4 @ FSTMIAX \base!, {d0-d15}
59
+ fstmiax \base!, {d0-d15}
4860 #else
49
- STC p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d0-d15}
61
+ vstmia \base!, {d0-d15}
5062 #endif
5163 #ifdef CONFIG_VFPv3
64
+ .fpu vfpv3
5265 #if __LINUX_ARM_ARCH__ <= 6
5366 ldr \tmp, =elf_hwcap @ may not have MVFR regs
5467 ldr \tmp, [\tmp, #0]
5568 tst \tmp, #HWCAP_VFPD32
56
- stclne p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
69
+ vstmiane \base!, {d16-d31}
5770 addeq \base, \base, #32*4 @ step over unused register space
5871 #else
5972 VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
6073 and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
6174 cmp \tmp, #2 @ 32 x 64bit registers?
62
- stcleq p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
75
+ vstmiaeq \base!, {d16-d31}
6376 addne \base, \base, #32*4 @ step over unused register space
6477 #endif
6578 #endif