hc
2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a
kernel/arch/arm/boot/dts/uniphier-pxs2.dtsi
....@@ -141,8 +141,10 @@
141141 cooling-maps {
142142 map {
143143 trip = <&cpu_alert>;
144
- cooling-device = <&cpu0
145
- THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
144
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
145
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
146
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
147
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
146148 };
147149 };
148150 };
....@@ -155,7 +157,7 @@
155157 ranges;
156158 interrupt-parent = <&intc>;
157159
158
- l2: l2-cache@500c0000 {
160
+ l2: cache-controller@500c0000 {
159161 compatible = "socionext,uniphier-system-cache";
160162 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
161163 <0x506c0000 0x400>;
....@@ -165,6 +167,32 @@
165167 cache-sets = <512>;
166168 cache-line-size = <128>;
167169 cache-level = <2>;
170
+ };
171
+
172
+ spi0: spi@54006000 {
173
+ compatible = "socionext,uniphier-scssi";
174
+ status = "disabled";
175
+ reg = <0x54006000 0x100>;
176
+ #address-cells = <1>;
177
+ #size-cells = <0>;
178
+ interrupts = <0 39 4>;
179
+ pinctrl-names = "default";
180
+ pinctrl-0 = <&pinctrl_spi0>;
181
+ clocks = <&peri_clk 11>;
182
+ resets = <&peri_rst 11>;
183
+ };
184
+
185
+ spi1: spi@54006100 {
186
+ compatible = "socionext,uniphier-scssi";
187
+ status = "disabled";
188
+ reg = <0x54006100 0x100>;
189
+ #address-cells = <1>;
190
+ #size-cells = <0>;
191
+ interrupts = <0 216 4>;
192
+ pinctrl-names = "default";
193
+ pinctrl-0 = <&pinctrl_spi1>;
194
+ clocks = <&peri_clk 12>;
195
+ resets = <&peri_rst 12>;
168196 };
169197
170198 serial0: serial@54006800 {
....@@ -422,6 +450,40 @@
422450 };
423451 };
424452
453
+ emmc: mmc@5a000000 {
454
+ compatible = "socionext,uniphier-sd-v3.1.1";
455
+ status = "disabled";
456
+ reg = <0x5a000000 0x800>;
457
+ interrupts = <0 78 4>;
458
+ pinctrl-names = "default";
459
+ pinctrl-0 = <&pinctrl_emmc>;
460
+ clocks = <&sd_clk 1>;
461
+ reset-names = "host", "hw";
462
+ resets = <&sd_rst 1>, <&sd_rst 6>;
463
+ bus-width = <8>;
464
+ cap-mmc-highspeed;
465
+ cap-mmc-hw-reset;
466
+ non-removable;
467
+ };
468
+
469
+ sd: mmc@5a400000 {
470
+ compatible = "socionext,uniphier-sd-v3.1.1";
471
+ status = "disabled";
472
+ reg = <0x5a400000 0x800>;
473
+ interrupts = <0 76 4>;
474
+ pinctrl-names = "default", "uhs";
475
+ pinctrl-0 = <&pinctrl_sd>;
476
+ pinctrl-1 = <&pinctrl_sd_uhs>;
477
+ clocks = <&sd_clk 0>;
478
+ reset-names = "host";
479
+ resets = <&sd_rst 0>;
480
+ bus-width = <4>;
481
+ cap-sd-highspeed;
482
+ sd-uhs-sdr12;
483
+ sd-uhs-sdr25;
484
+ sd-uhs-sdr50;
485
+ };
486
+
425487 soc_glue: soc-glue@5f800000 {
426488 compatible = "socionext,uniphier-pxs2-soc-glue",
427489 "simple-mfd", "syscon";
....@@ -450,7 +512,15 @@
450512 };
451513 };
452514
453
- aidet: aidet@5fc20000 {
515
+ xdmac: dma-controller@5fc10000 {
516
+ compatible = "socionext,uniphier-xdmac";
517
+ reg = <0x5fc10000 0x5300>;
518
+ interrupts = <0 188 4>;
519
+ dma-channels = <16>;
520
+ #dma-cells = <2>;
521
+ };
522
+
523
+ aidet: interrupt-controller@5fc20000 {
454524 compatible = "socionext,uniphier-pxs2-aidet";
455525 reg = <0x5fc20000 0x200>;
456526 interrupt-controller;
....@@ -523,16 +593,200 @@
523593 };
524594 };
525595
526
- nand: nand@68000000 {
596
+ usb0: usb@65a00000 {
597
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
598
+ status = "disabled";
599
+ reg = <0x65a00000 0xcd00>;
600
+ interrupt-names = "dwc_usb3";
601
+ interrupts = <0 134 4>;
602
+ pinctrl-names = "default";
603
+ pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
604
+ clock-names = "ref", "bus_early", "suspend";
605
+ clocks = <&sys_clk 14>, <&sys_clk 14>, <&sys_clk 14>;
606
+ resets = <&usb0_rst 15>;
607
+ phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
608
+ <&usb0_ssphy0>, <&usb0_ssphy1>;
609
+ dr_mode = "host";
610
+ };
611
+
612
+ usb-glue@65b00000 {
613
+ compatible = "socionext,uniphier-pxs2-dwc3-glue",
614
+ "simple-mfd";
615
+ #address-cells = <1>;
616
+ #size-cells = <1>;
617
+ ranges = <0 0x65b00000 0x400>;
618
+
619
+ usb0_rst: reset@0 {
620
+ compatible = "socionext,uniphier-pxs2-usb3-reset";
621
+ reg = <0x0 0x4>;
622
+ #reset-cells = <1>;
623
+ clock-names = "link";
624
+ clocks = <&sys_clk 14>;
625
+ reset-names = "link";
626
+ resets = <&sys_rst 14>;
627
+ };
628
+
629
+ usb0_vbus0: regulator@100 {
630
+ compatible = "socionext,uniphier-pxs2-usb3-regulator";
631
+ reg = <0x100 0x10>;
632
+ clock-names = "link";
633
+ clocks = <&sys_clk 14>;
634
+ reset-names = "link";
635
+ resets = <&sys_rst 14>;
636
+ };
637
+
638
+ usb0_vbus1: regulator@110 {
639
+ compatible = "socionext,uniphier-pxs2-usb3-regulator";
640
+ reg = <0x110 0x10>;
641
+ clock-names = "link";
642
+ clocks = <&sys_clk 14>;
643
+ reset-names = "link";
644
+ resets = <&sys_rst 14>;
645
+ };
646
+
647
+ usb0_hsphy0: hs-phy@200 {
648
+ compatible = "socionext,uniphier-pxs2-usb3-hsphy";
649
+ reg = <0x200 0x10>;
650
+ #phy-cells = <0>;
651
+ clock-names = "link", "phy";
652
+ clocks = <&sys_clk 14>, <&sys_clk 16>;
653
+ reset-names = "link", "phy";
654
+ resets = <&sys_rst 14>, <&sys_rst 16>;
655
+ vbus-supply = <&usb0_vbus0>;
656
+ };
657
+
658
+ usb0_hsphy1: hs-phy@210 {
659
+ compatible = "socionext,uniphier-pxs2-usb3-hsphy";
660
+ reg = <0x210 0x10>;
661
+ #phy-cells = <0>;
662
+ clock-names = "link", "phy";
663
+ clocks = <&sys_clk 14>, <&sys_clk 16>;
664
+ reset-names = "link", "phy";
665
+ resets = <&sys_rst 14>, <&sys_rst 16>;
666
+ vbus-supply = <&usb0_vbus1>;
667
+ };
668
+
669
+ usb0_ssphy0: ss-phy@300 {
670
+ compatible = "socionext,uniphier-pxs2-usb3-ssphy";
671
+ reg = <0x300 0x10>;
672
+ #phy-cells = <0>;
673
+ clock-names = "link", "phy";
674
+ clocks = <&sys_clk 14>, <&sys_clk 17>;
675
+ reset-names = "link", "phy";
676
+ resets = <&sys_rst 14>, <&sys_rst 17>;
677
+ vbus-supply = <&usb0_vbus0>;
678
+ };
679
+
680
+ usb0_ssphy1: ss-phy@310 {
681
+ compatible = "socionext,uniphier-pxs2-usb3-ssphy";
682
+ reg = <0x310 0x10>;
683
+ #phy-cells = <0>;
684
+ clock-names = "link", "phy";
685
+ clocks = <&sys_clk 14>, <&sys_clk 18>;
686
+ reset-names = "link", "phy";
687
+ resets = <&sys_rst 14>, <&sys_rst 18>;
688
+ vbus-supply = <&usb0_vbus1>;
689
+ };
690
+ };
691
+
692
+ usb1: usb@65c00000 {
693
+ compatible = "socionext,uniphier-dwc3", "snps,dwc3";
694
+ status = "disabled";
695
+ reg = <0x65c00000 0xcd00>;
696
+ interrupt-names = "dwc_usb3";
697
+ interrupts = <0 137 4>;
698
+ pinctrl-names = "default";
699
+ pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
700
+ clock-names = "ref", "bus_early", "suspend";
701
+ clocks = <&sys_clk 15>, <&sys_clk 15>, <&sys_clk 15>;
702
+ resets = <&usb1_rst 15>;
703
+ phys = <&usb1_hsphy0>, <&usb1_hsphy1>, <&usb1_ssphy0>;
704
+ dr_mode = "host";
705
+ };
706
+
707
+ usb-glue@65d00000 {
708
+ compatible = "socionext,uniphier-pxs2-dwc3-glue",
709
+ "simple-mfd";
710
+ #address-cells = <1>;
711
+ #size-cells = <1>;
712
+ ranges = <0 0x65d00000 0x400>;
713
+
714
+ usb1_rst: reset@0 {
715
+ compatible = "socionext,uniphier-pxs2-usb3-reset";
716
+ reg = <0x0 0x4>;
717
+ #reset-cells = <1>;
718
+ clock-names = "link";
719
+ clocks = <&sys_clk 15>;
720
+ reset-names = "link";
721
+ resets = <&sys_rst 15>;
722
+ };
723
+
724
+ usb1_vbus0: regulator@100 {
725
+ compatible = "socionext,uniphier-pxs2-usb3-regulator";
726
+ reg = <0x100 0x10>;
727
+ clock-names = "link";
728
+ clocks = <&sys_clk 15>;
729
+ reset-names = "link";
730
+ resets = <&sys_rst 15>;
731
+ };
732
+
733
+ usb1_vbus1: regulator@110 {
734
+ compatible = "socionext,uniphier-pxs2-usb3-regulator";
735
+ reg = <0x110 0x10>;
736
+ clock-names = "link";
737
+ clocks = <&sys_clk 15>;
738
+ reset-names = "link";
739
+ resets = <&sys_rst 15>;
740
+ };
741
+
742
+ usb1_hsphy0: hs-phy@200 {
743
+ compatible = "socionext,uniphier-pxs2-usb3-hsphy";
744
+ reg = <0x200 0x10>;
745
+ #phy-cells = <0>;
746
+ clock-names = "link", "phy";
747
+ clocks = <&sys_clk 15>, <&sys_clk 20>;
748
+ reset-names = "link", "phy";
749
+ resets = <&sys_rst 15>, <&sys_rst 20>;
750
+ vbus-supply = <&usb1_vbus0>;
751
+ };
752
+
753
+ usb1_hsphy1: hs-phy@210 {
754
+ compatible = "socionext,uniphier-pxs2-usb3-hsphy";
755
+ reg = <0x210 0x10>;
756
+ #phy-cells = <0>;
757
+ clock-names = "link", "phy";
758
+ clocks = <&sys_clk 15>, <&sys_clk 20>;
759
+ reset-names = "link", "phy";
760
+ resets = <&sys_rst 15>, <&sys_rst 20>;
761
+ vbus-supply = <&usb1_vbus1>;
762
+ };
763
+
764
+ usb1_ssphy0: ss-phy@300 {
765
+ compatible = "socionext,uniphier-pxs2-usb3-ssphy";
766
+ reg = <0x300 0x10>;
767
+ #phy-cells = <0>;
768
+ clock-names = "link", "phy";
769
+ clocks = <&sys_clk 15>, <&sys_clk 21>;
770
+ reset-names = "link", "phy";
771
+ resets = <&sys_rst 15>, <&sys_rst 21>;
772
+ vbus-supply = <&usb1_vbus0>;
773
+ };
774
+ };
775
+
776
+ nand: nand-controller@68000000 {
527777 compatible = "socionext,uniphier-denali-nand-v5b";
528778 status = "disabled";
529779 reg-names = "nand_data", "denali_reg";
530780 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
781
+ #address-cells = <1>;
782
+ #size-cells = <0>;
531783 interrupts = <0 65 4>;
532784 pinctrl-names = "default";
533
- pinctrl-0 = <&pinctrl_nand2cs>;
534
- clocks = <&sys_clk 2>;
535
- resets = <&sys_rst 2>;
785
+ pinctrl-0 = <&pinctrl_nand>;
786
+ clock-names = "nand", "nand_x", "ecc";
787
+ clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>;
788
+ reset-names = "nand", "reg";
789
+ resets = <&sys_rst 2>, <&sys_rst 2>;
536790 };
537791 };
538792 };