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2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a 
 kernel/arch/arm/boot/dts/tegra124-apalis.dtsi
....@@ -1,42 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0 OR X11
12 /*
2
- * Copyright 2016-2018 Toradex AG
3
- *
4
- * This file is dual-licensed: you can use it either under the terms
5
- * of the GPL or the X11 license, at your option. Note that this dual
6
- * licensing only applies to this file, and not this project as a
7
- * whole.
8
- *
9
- *  a) This file is free software; you can redistribute it and/or
10
- *     modify it under the terms of the GNU General Public License
11
- *     version 2 as published by the Free Software Foundation.
12
- *
13
- *     This file is distributed in the hope that it will be useful
14
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
15
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
- *     GNU General Public License for more details.
17
- *
18
- * Or, alternatively
19
- *
20
- *  b) Permission is hereby granted, free of charge, to any person
21
- *     obtaining a copy of this software and associated documentation
22
- *     files (the "Software"), to deal in the Software without
23
- *     restriction, including without limitation the rights to use
24
- *     copy, modify, merge, publish, distribute, sublicense, and/or
25
- *     sell copies of the Software, and to permit persons to whom the
26
- *     Software is furnished to do so, subject to the following
27
- *     conditions:
28
- *
29
- *     The above copyright notice and this permission notice shall be
30
- *     included in all copies or substantial portions of the Software.
31
- *
32
- *     THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND
33
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY
37
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39
- *     OTHER DEALINGS IN THE SOFTWARE.
3
+ * Copyright 2016-2019 Toradex AG
404  */
415 
426 #include "tegra124.dtsi"
....@@ -47,22 +11,19 @@
4711  * Compatible for Revisions 2GB: V1.0A, V1.0B, V1.1A
4812  */
4913 / {
50
-	model = "Toradex Apalis TK1";
51
-	compatible = "toradex,apalis-tk1", "nvidia,tegra124";
52
-
5314 	memory@80000000 {
5415 		reg = <0x0 0x80000000 0x0 0x80000000>;
5516 	};
5617 
5718 	pcie@1003000 {
5819 		status = "okay";
59
-		avddio-pex-supply = <&vdd_1v05>;
60
-		avdd-pex-pll-supply = <&vdd_1v05>;
61
-		avdd-pll-erefe-supply = <&avdd_1v05>;
62
-		dvddio-pex-supply = <&vdd_1v05>;
63
-		hvdd-pex-pll-e-supply = <&reg_3v3>;
64
-		hvdd-pex-supply = <&reg_3v3>;
65
-		vddio-pex-ctl-supply = <&reg_3v3>;
20
+		avddio-pex-supply = <&reg_1v05_vdd>;
21
+		avdd-pex-pll-supply = <&reg_1v05_vdd>;
22
+		avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23
+		dvddio-pex-supply = <&reg_1v05_vdd>;
24
+		hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25
+		hvdd-pex-supply = <&reg_module_3v3>;
26
+		vddio-pex-ctl-supply = <&reg_module_3v3>;
6627 
6728 		/* Apalis PCIe (additional lane Apalis type specific) */
6829 		pci@1,0 {
....@@ -77,16 +38,21 @@
7738 			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>;
7839 			phy-names = "pcie-0";
7940 			status = "okay";
41
+
42
+			ethernet@0,0 {
43
+				reg = <0 0 0 0 0>;
44
+				local-mac-address = [00 00 00 00 00 00];
45
+			};
8046 		};
8147 	};
8248 
8349 	host1x@50000000 {
8450 		hdmi@54280000 {
85
-			pll-supply = <&reg_1v05_avdd_hdmi_pll>;
86
-			vdd-supply = <&reg_3v3_avdd_hdmi>;
8751 			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
8852 			nvidia,hpd-gpio =
8953 				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
54
+			pll-supply = <&reg_1v05_avdd_hdmi_pll>;
55
+			vdd-supply = <&reg_3v3_avdd_hdmi>;
9056 		};
9157 	};
9258 
....@@ -95,44 +61,44 @@
9561 		 * Node left disabled on purpose - the bootloader will enable
9662 		 * it after having set the VPR up
9763 		 */
98
-		vdd-supply = <&vdd_gpu>;
64
+		vdd-supply = <&reg_vdd_gpu>;
9965 	};
10066 
101
-	pinmux: pinmux@70000868 {
67
+	pinmux@70000868 {
10268 		pinctrl-names = "default";
10369 		pinctrl-0 = <&state_default>;
10470 
10571 		state_default: pinmux {
10672 			/* Analogue Audio (On-module) */
107
-			dap3_fs_pp0 {
73
+			dap3-fs-pp0 {
10874 				nvidia,pins = "dap3_fs_pp0";
10975 				nvidia,function = "i2s2";
11076 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
11177 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
11278 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
11379 			};
114
-			dap3_din_pp1 {
80
+			dap3-din-pp1 {
11581 				nvidia,pins = "dap3_din_pp1";
11682 				nvidia,function = "i2s2";
11783 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
11884 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
11985 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
12086 			};
121
-			dap3_dout_pp2 {
87
+			dap3-dout-pp2 {
12288 				nvidia,pins = "dap3_dout_pp2";
12389 				nvidia,function = "i2s2";
12490 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
12591 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
12692 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12793 			};
128
-			dap3_sclk_pp3 {
94
+			dap3-sclk-pp3 {
12995 				nvidia,pins = "dap3_sclk_pp3";
13096 				nvidia,function = "i2s2";
13197 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
13298 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
13399 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
134100 			};
135
-			dap_mclk1_pw4 {
101
+			dap-mclk1-pw4 {
136102 				nvidia,pins = "dap_mclk1_pw4";
137103 				nvidia,function = "extperiph1";
138104 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -159,7 +125,7 @@
159125 			};
160126 
161127 			/* Apalis CAM1_MCLK */
162
-			cam_mclk_pcc0 {
128
+			cam-mclk-pcc0 {
163129 				nvidia,pins = "cam_mclk_pcc0";
164130 				nvidia,function = "vi_alt3";
165131 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -168,28 +134,28 @@
168134 			};
169135 
170136 			/* Apalis Digital Audio */
171
-			dap2_fs_pa2 {
137
+			dap2-fs-pa2 {
172138 				nvidia,pins = "dap2_fs_pa2";
173139 				nvidia,function = "hda";
174140 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
175141 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
176142 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
177143 			};
178
-			dap2_sclk_pa3 {
144
+			dap2-sclk-pa3 {
179145 				nvidia,pins = "dap2_sclk_pa3";
180146 				nvidia,function = "hda";
181147 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
182148 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
183149 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
184150 			};
185
-			dap2_din_pa4 {
151
+			dap2-din-pa4 {
186152 				nvidia,pins = "dap2_din_pa4";
187153 				nvidia,function = "hda";
188154 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
189155 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
190156 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
191157 			};
192
-			dap2_dout_pa5 {
158
+			dap2-dout-pa5 {
193159 				nvidia,pins = "dap2_dout_pa5";
194160 				nvidia,function = "hda";
195161 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -202,7 +168,7 @@
202168 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
203169 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
204170 			};
205
-			clk3_out_pee0 {
171
+			clk3-out-pee0 {
206172 				nvidia,pins = "clk3_out_pee0";
207173 				nvidia,function = "extperiph3";
208174 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -211,49 +177,49 @@
211177 			};
212178 
213179 			/* Apalis GPIO */
214
-			ddc_scl_pv4 {
180
+			ddc-scl-pv4 {
215181 				nvidia,pins = "ddc_scl_pv4";
216182 				nvidia,function = "rsvd2";
217183 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
218184 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
219185 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
220186 			};
221
-			ddc_sda_pv5 {
187
+			ddc-sda-pv5 {
222188 				nvidia,pins = "ddc_sda_pv5";
223189 				nvidia,function = "rsvd2";
224190 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
225191 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
226192 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
227193 			};
228
-			pex_l0_rst_n_pdd1 {
194
+			pex-l0-rst-n-pdd1 {
229195 				nvidia,pins = "pex_l0_rst_n_pdd1";
230196 				nvidia,function = "rsvd2";
231197 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
232198 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
233199 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
234200 			};
235
-			pex_l0_clkreq_n_pdd2 {
201
+			pex-l0-clkreq-n-pdd2 {
236202 				nvidia,pins = "pex_l0_clkreq_n_pdd2";
237203 				nvidia,function = "rsvd2";
238204 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
239205 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
240206 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
241207 			};
242
-			pex_l1_rst_n_pdd5 {
208
+			pex-l1-rst-n-pdd5 {
243209 				nvidia,pins = "pex_l1_rst_n_pdd5";
244210 				nvidia,function = "rsvd2";
245211 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
246212 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
247213 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248214 			};
249
-			pex_l1_clkreq_n_pdd6 {
215
+			pex-l1-clkreq-n-pdd6 {
250216 				nvidia,pins = "pex_l1_clkreq_n_pdd6";
251217 				nvidia,function = "rsvd2";
252218 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
253219 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
254220 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255221 			};
256
-			dp_hpd_pff0 {
222
+			dp-hpd-pff0 {
257223 				nvidia,pins = "dp_hpd_pff0";
258224 				nvidia,function = "dp";
259225 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -277,7 +243,7 @@
277243 			};
278244 
279245 			/* Apalis HDMI1_CEC */
280
-			hdmi_cec_pee3 {
246
+			hdmi-cec-pee3 {
281247 				nvidia,pins = "hdmi_cec_pee3";
282248 				nvidia,function = "cec";
283249 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -287,7 +253,7 @@
287253 			};
288254 
289255 			/* Apalis HDMI1_HPD */
290
-			hdmi_int_pn7 {
256
+			hdmi-int-pn7 {
291257 				nvidia,pins = "hdmi_int_pn7";
292258 				nvidia,function = "rsvd1";
293259 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -297,7 +263,7 @@
297263 			};
298264 
299265 			/* Apalis I2C1 */
300
-			gen1_i2c_scl_pc4 {
266
+			gen1-i2c-scl-pc4 {
301267 				nvidia,pins = "gen1_i2c_scl_pc4";
302268 				nvidia,function = "i2c1";
303269 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -305,7 +271,7 @@
305271 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
306272 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
307273 			};
308
-			gen1_i2c_sda_pc5 {
274
+			gen1-i2c-sda-pc5 {
309275 				nvidia,pins = "gen1_i2c_sda_pc5";
310276 				nvidia,function = "i2c1";
311277 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -315,7 +281,7 @@
315281 			};
316282 
317283 			/* Apalis I2C2 (DDC) */
318
-			gen2_i2c_scl_pt5 {
284
+			gen2-i2c-scl-pt5 {
319285 				nvidia,pins = "gen2_i2c_scl_pt5";
320286 				nvidia,function = "i2c2";
321287 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -323,7 +289,7 @@
323289 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
324290 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
325291 			};
326
-			gen2_i2c_sda_pt6 {
292
+			gen2-i2c-sda-pt6 {
327293 				nvidia,pins = "gen2_i2c_sda_pt6";
328294 				nvidia,function = "i2c2";
329295 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -333,7 +299,7 @@
333299 			};
334300 
335301 			/* Apalis I2C3 (CAM) */
336
-			cam_i2c_scl_pbb1 {
302
+			cam-i2c-scl-pbb1 {
337303 				nvidia,pins = "cam_i2c_scl_pbb1";
338304 				nvidia,function = "i2c3";
339305 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -341,7 +307,7 @@
341307 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
342308 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
343309 			};
344
-			cam_i2c_sda_pbb2 {
310
+			cam-i2c-sda-pbb2 {
345311 				nvidia,pins = "cam_i2c_sda_pbb2";
346312 				nvidia,function = "i2c3";
347313 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -351,77 +317,77 @@
351317 			};
352318 
353319 			/* Apalis MMC1 */
354
-			sdmmc1_cd_n_pv3 { /* CD# GPIO */
320
+			sdmmc1-cd-n-pv3 { /* CD# GPIO */
355321 				nvidia,pins = "sdmmc1_wp_n_pv3";
356322 				nvidia,function = "sdmmc1";
357323 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
358324 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
359325 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
360326 			};
361
-			clk2_out_pw5 { /* D5 GPIO */
327
+			clk2-out-pw5 { /* D5 GPIO */
362328 				nvidia,pins = "clk2_out_pw5";
363329 				nvidia,function = "rsvd2";
364330 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
365331 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
366332 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
367333 			};
368
-			sdmmc1_dat3_py4 {
334
+			sdmmc1-dat3-py4 {
369335 				nvidia,pins = "sdmmc1_dat3_py4";
370336 				nvidia,function = "sdmmc1";
371337 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
372338 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
373339 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
374340 			};
375
-			sdmmc1_dat2_py5 {
341
+			sdmmc1-dat2-py5 {
376342 				nvidia,pins = "sdmmc1_dat2_py5";
377343 				nvidia,function = "sdmmc1";
378344 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
379345 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
380346 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
381347 			};
382
-			sdmmc1_dat1_py6 {
348
+			sdmmc1-dat1-py6 {
383349 				nvidia,pins = "sdmmc1_dat1_py6";
384350 				nvidia,function = "sdmmc1";
385351 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
386352 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
387353 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
388354 			};
389
-			sdmmc1_dat0_py7 {
355
+			sdmmc1-dat0-py7 {
390356 				nvidia,pins = "sdmmc1_dat0_py7";
391357 				nvidia,function = "sdmmc1";
392358 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
393359 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
394360 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
395361 			};
396
-			sdmmc1_clk_pz0 {
362
+			sdmmc1-clk-pz0 {
397363 				nvidia,pins = "sdmmc1_clk_pz0";
398364 				nvidia,function = "sdmmc1";
399365 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400366 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
401367 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
402368 			};
403
-			sdmmc1_cmd_pz1 {
369
+			sdmmc1-cmd-pz1 {
404370 				nvidia,pins = "sdmmc1_cmd_pz1";
405371 				nvidia,function = "sdmmc1";
406372 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
407373 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
408374 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
409375 			};
410
-			clk2_req_pcc5 { /* D4 GPIO */
376
+			clk2-req-pcc5 { /* D4 GPIO */
411377 				nvidia,pins = "clk2_req_pcc5";
412378 				nvidia,function = "rsvd2";
413379 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414380 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
415381 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
416382 			};
417
-			sdmmc3_clk_lb_in_pee5 { /* D6 GPIO */
383
+			sdmmc3-clk-lb-in-pee5 { /* D6 GPIO */
418384 				nvidia,pins = "sdmmc3_clk_lb_in_pee5";
419385 				nvidia,function = "rsvd2";
420386 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
421387 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
422388 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
423389 			};
424
-			usb_vbus_en2_pff1 { /* D7 GPIO */
390
+			usb-vbus-en2-pff1 { /* D7 GPIO */
425391 				nvidia,pins = "usb_vbus_en2_pff1";
426392 				nvidia,function = "rsvd2";
427393 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -461,7 +427,7 @@
461427 			};
462428 
463429 			/* Apalis SATA1_ACT# */
464
-			dap1_dout_pn2 {
430
+			dap1-dout-pn2 {
465431 				nvidia,pins = "dap1_dout_pn2";
466432 				nvidia,function = "gmi";
467433 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -470,49 +436,49 @@
470436 			};
471437 
472438 			/* Apalis SD1 */
473
-			sdmmc3_clk_pa6 {
439
+			sdmmc3-clk-pa6 {
474440 				nvidia,pins = "sdmmc3_clk_pa6";
475441 				nvidia,function = "sdmmc3";
476442 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
477443 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
478444 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
479445 			};
480
-			sdmmc3_cmd_pa7 {
446
+			sdmmc3-cmd-pa7 {
481447 				nvidia,pins = "sdmmc3_cmd_pa7";
482448 				nvidia,function = "sdmmc3";
483449 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
484450 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
485451 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
486452 			};
487
-			sdmmc3_dat3_pb4 {
453
+			sdmmc3-dat3-pb4 {
488454 				nvidia,pins = "sdmmc3_dat3_pb4";
489455 				nvidia,function = "sdmmc3";
490456 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
491457 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
492458 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
493459 			};
494
-			sdmmc3_dat2_pb5 {
460
+			sdmmc3-dat2-pb5 {
495461 				nvidia,pins = "sdmmc3_dat2_pb5";
496462 				nvidia,function = "sdmmc3";
497463 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
498464 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
499465 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
500466 			};
501
-			sdmmc3_dat1_pb6 {
467
+			sdmmc3-dat1-pb6 {
502468 				nvidia,pins = "sdmmc3_dat1_pb6";
503469 				nvidia,function = "sdmmc3";
504470 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
505471 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
506472 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
507473 			};
508
-			sdmmc3_dat0_pb7 {
474
+			sdmmc3-dat0-pb7 {
509475 				nvidia,pins = "sdmmc3_dat0_pb7";
510476 				nvidia,function = "sdmmc3";
511477 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
512478 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
513479 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
514480 			};
515
-			sdmmc3_cd_n_pv2 { /* CD# GPIO */
481
+			sdmmc3-cd-n-pv2 { /* CD# GPIO */
516482 				nvidia,pins = "sdmmc3_cd_n_pv2";
517483 				nvidia,function = "rsvd3";
518484 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -521,14 +487,14 @@
521487 			};
522488 
523489 			/* Apalis SPDIF */
524
-			spdif_out_pk5 {
490
+			spdif-out-pk5 {
525491 				nvidia,pins = "spdif_out_pk5";
526492 				nvidia,function = "spdif";
527493 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
528494 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
529495 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
530496 			};
531
-			spdif_in_pk6 {
497
+			spdif-in-pk6 {
532498 				nvidia,pins = "spdif_in_pk6";
533499 				nvidia,function = "spdif";
534500 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -537,28 +503,28 @@
537503 			};
538504 
539505 			/* Apalis SPI1 */
540
-			ulpi_clk_py0 {
506
+			ulpi-clk-py0 {
541507 				nvidia,pins = "ulpi_clk_py0";
542508 				nvidia,function = "spi1";
543509 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
544510 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
545511 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
546512 			};
547
-			ulpi_dir_py1 {
513
+			ulpi-dir-py1 {
548514 				nvidia,pins = "ulpi_dir_py1";
549515 				nvidia,function = "spi1";
550516 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
551517 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
552518 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
553519 			};
554
-			ulpi_nxt_py2 {
520
+			ulpi-nxt-py2 {
555521 				nvidia,pins = "ulpi_nxt_py2";
556522 				nvidia,function = "spi1";
557523 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
558524 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
559525 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
560526 			};
561
-			ulpi_stp_py3 {
527
+			ulpi-stp-py3 {
562528 				nvidia,pins = "ulpi_stp_py3";
563529 				nvidia,function = "spi1";
564530 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -611,42 +577,42 @@
611577 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
612578 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
613579 			};
614
-			uart1_txd_pu0 {
580
+			uart1-txd-pu0 {
615581 				nvidia,pins = "pu0";
616582 				nvidia,function = "uarta";
617583 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
618584 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
619585 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
620586 			};
621
-			uart1_rxd_pu1 {
587
+			uart1-rxd-pu1 {
622588 				nvidia,pins = "pu1";
623589 				nvidia,function = "uarta";
624590 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
625591 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
626592 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
627593 			};
628
-			uart1_cts_n_pu2 {
594
+			uart1-cts-n-pu2 {
629595 				nvidia,pins = "pu2";
630596 				nvidia,function = "uarta";
631597 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
632598 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
633599 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634600 			};
635
-			uart1_rts_n_pu3 {
601
+			uart1-rts-n-pu3 {
636602 				nvidia,pins = "pu3";
637603 				nvidia,function = "uarta";
638604 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
639605 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
640606 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
641607 			};
642
-			uart3_cts_n_pa1 { /* DSR GPIO */
608
+			uart3-cts-n-pa1 { /* DSR GPIO */
643609 				nvidia,pins = "uart3_cts_n_pa1";
644610 				nvidia,function = "gmi";
645611 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
646612 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
647613 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
648614 			};
649
-			uart3_rts_n_pc0 { /* DTR GPIO */
615
+			uart3-rts-n-pc0 { /* DTR GPIO */
650616 				nvidia,pins = "uart3_rts_n_pc0";
651617 				nvidia,function = "gmi";
652618 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -655,28 +621,28 @@
655621 			};
656622 
657623 			/* Apalis UART2 */
658
-			uart2_txd_pc2 {
624
+			uart2-txd-pc2 {
659625 				nvidia,pins = "uart2_txd_pc2";
660626 				nvidia,function = "irda";
661627 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
662628 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
663629 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
664630 			};
665
-			uart2_rxd_pc3 {
631
+			uart2-rxd-pc3 {
666632 				nvidia,pins = "uart2_rxd_pc3";
667633 				nvidia,function = "irda";
668634 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
669635 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
670636 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
671637 			};
672
-			uart2_cts_n_pj5 {
638
+			uart2-cts-n-pj5 {
673639 				nvidia,pins = "uart2_cts_n_pj5";
674640 				nvidia,function = "uartb";
675641 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
676642 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
677643 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
678644 			};
679
-			uart2_rts_n_pj6 {
645
+			uart2-rts-n-pj6 {
680646 				nvidia,pins = "uart2_rts_n_pj6";
681647 				nvidia,function = "uartb";
682648 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -685,14 +651,14 @@
685651 			};
686652 
687653 			/* Apalis UART3 */
688
-			uart3_txd_pw6 {
654
+			uart3-txd-pw6 {
689655 				nvidia,pins = "uart3_txd_pw6";
690656 				nvidia,function = "uartc";
691657 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
692658 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
693659 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
694660 			};
695
-			uart3_rxd_pw7 {
661
+			uart3-rxd-pw7 {
696662 				nvidia,pins = "uart3_rxd_pw7";
697663 				nvidia,function = "uartc";
698664 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -701,14 +667,14 @@
701667 			};
702668 
703669 			/* Apalis UART4 */
704
-			uart4_rxd_pb0 {
670
+			uart4-rxd-pb0 {
705671 				nvidia,pins = "pb0";
706672 				nvidia,function = "uartd";
707673 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
708674 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
709675 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710676 			};
711
-			uart4_txd_pj7 {
677
+			uart4-txd-pj7 {
712678 				nvidia,pins = "pj7";
713679 				nvidia,function = "uartd";
714680 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -717,7 +683,7 @@
717683 			};
718684 
719685 			/* Apalis USBH_EN */
720
-			usb_vbus_en1_pn5 {
686
+			usb-vbus-en1-pn5 {
721687 				nvidia,pins = "usb_vbus_en1_pn5";
722688 				nvidia,function = "rsvd2";
723689 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -736,7 +702,7 @@
736702 			};
737703 
738704 			/* Apalis USBO1_EN */
739
-			usb_vbus_en0_pn4 {
705
+			usb-vbus-en0-pn4 {
740706 				nvidia,pins = "usb_vbus_en0_pn4";
741707 				nvidia,function = "rsvd2";
742708 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -755,7 +721,7 @@
755721 			};
756722 
757723 			/* Apalis WAKE1_MICO */
758
-			pex_wake_n_pdd3 {
724
+			pex-wake-n-pdd3 {
759725 				nvidia,pins = "pex_wake_n_pdd3";
760726 				nvidia,function = "rsvd2";
761727 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -764,7 +730,7 @@
764730 			};
765731 
766732 			/* CORE_PWR_REQ */
767
-			core_pwr_req {
733
+			core-pwr-req {
768734 				nvidia,pins = "core_pwr_req";
769735 				nvidia,function = "pwron";
770736 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -773,7 +739,7 @@
773739 			};
774740 
775741 			/* CPU_PWR_REQ */
776
-			cpu_pwr_req {
742
+			cpu-pwr-req {
777743 				nvidia,pins = "cpu_pwr_req";
778744 				nvidia,function = "cpu";
779745 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -782,14 +748,14 @@
782748 			};
783749 
784750 			/* DVFS */
785
-			dvfs_pwm_px0 {
751
+			dvfs-pwm-px0 {
786752 				nvidia,pins = "dvfs_pwm_px0";
787753 				nvidia,function = "cldvfs";
788754 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
789755 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
790756 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
791757 			};
792
-			dvfs_clk_px2 {
758
+			dvfs-clk-px2 {
793759 				nvidia,pins = "dvfs_clk_px2";
794760 				nvidia,function = "cldvfs";
795761 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -798,70 +764,70 @@
798764 			};
799765 
800766 			/* eMMC */
801
-			sdmmc4_dat0_paa0 {
767
+			sdmmc4-dat0-paa0 {
802768 				nvidia,pins = "sdmmc4_dat0_paa0";
803769 				nvidia,function = "sdmmc4";
804770 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
805771 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
806772 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
807773 			};
808
-			sdmmc4_dat1_paa1 {
774
+			sdmmc4-dat1-paa1 {
809775 				nvidia,pins = "sdmmc4_dat1_paa1";
810776 				nvidia,function = "sdmmc4";
811777 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
812778 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
813779 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
814780 			};
815
-			sdmmc4_dat2_paa2 {
781
+			sdmmc4-dat2-paa2 {
816782 				nvidia,pins = "sdmmc4_dat2_paa2";
817783 				nvidia,function = "sdmmc4";
818784 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
819785 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
820786 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
821787 			};
822
-			sdmmc4_dat3_paa3 {
788
+			sdmmc4-dat3-paa3 {
823789 				nvidia,pins = "sdmmc4_dat3_paa3";
824790 				nvidia,function = "sdmmc4";
825791 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
826792 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
827793 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
828794 			};
829
-			sdmmc4_dat4_paa4 {
795
+			sdmmc4-dat4-paa4 {
830796 				nvidia,pins = "sdmmc4_dat4_paa4";
831797 				nvidia,function = "sdmmc4";
832798 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
833799 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
834800 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
835801 			};
836
-			sdmmc4_dat5_paa5 {
802
+			sdmmc4-dat5-paa5 {
837803 				nvidia,pins = "sdmmc4_dat5_paa5";
838804 				nvidia,function = "sdmmc4";
839805 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
840806 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
841807 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
842808 			};
843
-			sdmmc4_dat6_paa6 {
809
+			sdmmc4-dat6-paa6 {
844810 				nvidia,pins = "sdmmc4_dat6_paa6";
845811 				nvidia,function = "sdmmc4";
846812 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
847813 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
848814 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
849815 			};
850
-			sdmmc4_dat7_paa7 {
816
+			sdmmc4-dat7-paa7 {
851817 				nvidia,pins = "sdmmc4_dat7_paa7";
852818 				nvidia,function = "sdmmc4";
853819 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
854820 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
855821 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
856822 			};
857
-			sdmmc4_clk_pcc4 {
823
+			sdmmc4-clk-pcc4 {
858824 				nvidia,pins = "sdmmc4_clk_pcc4";
859825 				nvidia,function = "sdmmc4";
860826 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
861827 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
862828 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
863829 			};
864
-			sdmmc4_cmd_pt7 {
830
+			sdmmc4-cmd-pt7 {
865831 				nvidia,pins = "sdmmc4_cmd_pt7";
866832 				nvidia,function = "sdmmc4";
867833 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -870,7 +836,7 @@
870836 			};
871837 
872838 			/* JTAG_RTCK */
873
-			jtag_rtck {
839
+			jtag-rtck {
874840 				nvidia,pins = "jtag_rtck";
875841 				nvidia,function = "rtck";
876842 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -879,7 +845,7 @@
879845 			};
880846 
881847 			/* LAN_DEV_OFF# */
882
-			ulpi_data5_po6 {
848
+			ulpi-data5-po6 {
883849 				nvidia,pins = "ulpi_data5_po6";
884850 				nvidia,function = "ulpi";
885851 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -888,7 +854,7 @@
888854 			};
889855 
890856 			/* LAN_RESET# */
891
-			kb_row10_ps2 {
857
+			kb-row10-ps2 {
892858 				nvidia,pins = "kb_row10_ps2";
893859 				nvidia,function = "rsvd2";
894860 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -897,7 +863,7 @@
897863 			};
898864 
899865 			/* LAN_WAKE# */
900
-			ulpi_data4_po5 {
866
+			ulpi-data4-po5 {
901867 				nvidia,pins = "ulpi_data4_po5";
902868 				nvidia,function = "ulpi";
903869 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -951,35 +917,35 @@
951917 			};
952918 
953919 			/* MCU SPI */
954
-			gpio_x4_aud_px4 {
920
+			gpio-x4-aud-px4 {
955921 				nvidia,pins = "gpio_x4_aud_px4";
956922 				nvidia,function = "spi2";
957923 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
958924 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
959925 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
960926 			};
961
-			gpio_x5_aud_px5 {
927
+			gpio-x5-aud-px5 {
962928 				nvidia,pins = "gpio_x5_aud_px5";
963929 				nvidia,function = "spi2";
964930 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
965931 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
966932 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
967933 			};
968
-			gpio_x6_aud_px6 { /* MCU_CS */
934
+			gpio-x6-aud-px6 { /* MCU_CS */
969935 				nvidia,pins = "gpio_x6_aud_px6";
970936 				nvidia,function = "spi2";
971937 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
972938 				nvidia,tristate = <TEGRA_PIN_DISABLE>;
973939 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
974940 			};
975
-			gpio_x7_aud_px7 {
941
+			gpio-x7-aud-px7 {
976942 				nvidia,pins = "gpio_x7_aud_px7";
977943 				nvidia,function = "spi2";
978944 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
979945 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
980946 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
981947 			};
982
-			gpio_w2_aud_pw2 { /* MCU_CSEZP */
948
+			gpio-w2-aud-pw2 { /* MCU_CSEZP */
983949 				nvidia,pins = "gpio_w2_aud_pw2";
984950 				nvidia,function = "spi2";
985951 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -988,7 +954,7 @@
988954 			};
989955 
990956 			/* PMIC_CLK_32K */
991
-			clk_32k_in {
957
+			clk-32k-in {
992958 				nvidia,pins = "clk_32k_in";
993959 				nvidia,function = "clk";
994960 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -997,7 +963,7 @@
997963 			};
998964 
999965 			/* PMIC_CPU_OC_INT */
1000
-			clk_32k_out_pa0 {
966
+			clk-32k-out-pa0 {
1001967 				nvidia,pins = "clk_32k_out_pa0";
1002968 				nvidia,function = "soc";
1003969 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1006,7 +972,7 @@
1006972 			};
1007973 
1008974 			/* PWR_I2C */
1009
-			pwr_i2c_scl_pz6 {
975
+			pwr-i2c-scl-pz6 {
1010976 				nvidia,pins = "pwr_i2c_scl_pz6";
1011977 				nvidia,function = "i2cpwr";
1012978 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1014,7 +980,7 @@
1014980 				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1015981 				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1016982 			};
1017
-			pwr_i2c_sda_pz7 {
983
+			pwr-i2c-sda-pz7 {
1018984 				nvidia,pins = "pwr_i2c_sda_pz7";
1019985 				nvidia,function = "i2cpwr";
1020986 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1024,7 +990,7 @@
1024990 			};
1025991 
1026992 			/* PWR_INT_N */
1027
-			pwr_int_n {
993
+			pwr-int-n {
1028994 				nvidia,pins = "pwr_int_n";
1029995 				nvidia,function = "pmi";
1030996 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -1042,7 +1008,7 @@
10421008 			};
10431009 
10441010 			/* RESET_OUT_N */
1045
-			reset_out_n {
1011
+			reset-out-n {
10461012 				nvidia,pins = "reset_out_n";
10471013 				nvidia,function = "reset_out_n";
10481014 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1051,14 +1017,14 @@
10511017 			};
10521018 
10531019 			/* SHIFT_CTRL_DIR_IN */
1054
-			kb_row0_pr0 {
1020
+			kb-row0-pr0 {
10551021 				nvidia,pins = "kb_row0_pr0";
10561022 				nvidia,function = "rsvd2";
10571023 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
10581024 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10591025 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10601026 			};
1061
-			kb_row1_pr1 {
1027
+			kb-row1-pr1 {
10621028 				nvidia,pins = "kb_row1_pr1";
10631029 				nvidia,function = "rsvd2";
10641030 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1067,7 +1033,7 @@
10671033 			};
10681034 
10691035 			/* Configure level-shifter as output for HDA */
1070
-			kb_row11_ps3 {
1036
+			kb-row11-ps3 {
10711037 				nvidia,pins = "kb_row11_ps3";
10721038 				nvidia,function = "rsvd2";
10731039 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -1076,21 +1042,21 @@
10761042 			};
10771043 
10781044 			/* SHIFT_CTRL_DIR_OUT */
1079
-			kb_col5_pq5 {
1045
+			kb-col5-pq5 {
10801046 				nvidia,pins = "kb_col5_pq5";
10811047 				nvidia,function = "rsvd2";
10821048 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
10831049 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10841050 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10851051 			};
1086
-			kb_col6_pq6 {
1052
+			kb-col6-pq6 {
10871053 				nvidia,pins = "kb_col6_pq6";
10881054 				nvidia,function = "rsvd2";
10891055 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
10901056 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
10911057 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
10921058 			};
1093
-			kb_col7_pq7 {
1059
+			kb-col7-pq7 {
10941060 				nvidia,pins = "kb_col7_pq7";
10951061 				nvidia,function = "rsvd2";
10961062 				nvidia,pull = <TEGRA_PIN_PULL_UP>;
....@@ -1099,35 +1065,35 @@
10991065 			};
11001066 
11011067 			/* SHIFT_CTRL_OE */
1102
-			kb_col0_pq0 {
1068
+			kb-col0-pq0 {
11031069 				nvidia,pins = "kb_col0_pq0";
11041070 				nvidia,function = "rsvd2";
11051071 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
11061072 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
11071073 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
11081074 			};
1109
-			kb_col1_pq1 {
1075
+			kb-col1-pq1 {
11101076 				nvidia,pins = "kb_col1_pq1";
11111077 				nvidia,function = "rsvd2";
11121078 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
11131079 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
11141080 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
11151081 			};
1116
-			kb_col2_pq2 {
1082
+			kb-col2-pq2 {
11171083 				nvidia,pins = "kb_col2_pq2";
11181084 				nvidia,function = "rsvd2";
11191085 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
11201086 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
11211087 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
11221088 			};
1123
-			kb_col4_pq4 {
1089
+			kb-col4-pq4 {
11241090 				nvidia,pins = "kb_col4_pq4";
11251091 				nvidia,function = "kbc";
11261092 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
11271093 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
11281094 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
11291095 			};
1130
-			kb_row2_pr2 {
1096
+			kb-row2-pr2 {
11311097 				nvidia,pins = "kb_row2_pr2";
11321098 				nvidia,function = "rsvd2";
11331099 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1145,7 +1111,7 @@
11451111 			};
11461112 
11471113 			/* TOUCH_INT */
1148
-			gpio_w3_aud_pw3 {
1114
+			gpio-w3-aud-pw3 {
11491115 				nvidia,pins = "gpio_w3_aud_pw3";
11501116 				nvidia,function = "spi6";
11511117 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1286,189 +1252,189 @@
12861252 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12871253 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12881254 			};
1289
-			dap1_fs_pn0 { /* NC */
1255
+			dap1-fs-pn0 { /* NC */
12901256 				nvidia,pins = "dap1_fs_pn0";
12911257 				nvidia,function = "rsvd4";
12921258 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
12931259 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
12941260 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
12951261 			};
1296
-			dap1_din_pn1 { /* NC */
1262
+			dap1-din-pn1 { /* NC */
12971263 				nvidia,pins = "dap1_din_pn1";
12981264 				nvidia,function = "rsvd4";
12991265 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13001266 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13011267 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13021268 			};
1303
-			dap1_sclk_pn3 { /* NC */
1269
+			dap1-sclk-pn3 { /* NC */
13041270 				nvidia,pins = "dap1_sclk_pn3";
13051271 				nvidia,function = "rsvd4";
13061272 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13071273 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13081274 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13091275 			};
1310
-			ulpi_data7_po0 { /* NC */
1276
+			ulpi-data7-po0 { /* NC */
13111277 				nvidia,pins = "ulpi_data7_po0";
13121278 				nvidia,function = "ulpi";
13131279 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13141280 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13151281 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13161282 			};
1317
-			ulpi_data0_po1 { /* NC */
1283
+			ulpi-data0-po1 { /* NC */
13181284 				nvidia,pins = "ulpi_data0_po1";
13191285 				nvidia,function = "ulpi";
13201286 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13211287 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13221288 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13231289 			};
1324
-			ulpi_data1_po2 { /* NC */
1290
+			ulpi-data1-po2 { /* NC */
13251291 				nvidia,pins = "ulpi_data1_po2";
13261292 				nvidia,function = "ulpi";
13271293 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13281294 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13291295 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13301296 			};
1331
-			ulpi_data2_po3 { /* NC */
1297
+			ulpi-data2-po3 { /* NC */
13321298 				nvidia,pins = "ulpi_data2_po3";
13331299 				nvidia,function = "ulpi";
13341300 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13351301 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13361302 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13371303 			};
1338
-			ulpi_data3_po4 { /* NC */
1304
+			ulpi-data3-po4 { /* NC */
13391305 				nvidia,pins = "ulpi_data3_po4";
13401306 				nvidia,function = "ulpi";
13411307 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13421308 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13431309 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13441310 			};
1345
-			ulpi_data6_po7 { /* NC */
1311
+			ulpi-data6-po7 { /* NC */
13461312 				nvidia,pins = "ulpi_data6_po7";
13471313 				nvidia,function = "ulpi";
13481314 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13491315 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13501316 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13511317 			};
1352
-			dap4_fs_pp4 { /* NC */
1318
+			dap4-fs-pp4 { /* NC */
13531319 				nvidia,pins = "dap4_fs_pp4";
13541320 				nvidia,function = "rsvd4";
13551321 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13561322 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13571323 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13581324 			};
1359
-			dap4_din_pp5 { /* NC */
1325
+			dap4-din-pp5 { /* NC */
13601326 				nvidia,pins = "dap4_din_pp5";
13611327 				nvidia,function = "rsvd3";
13621328 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13631329 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13641330 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13651331 			};
1366
-			dap4_dout_pp6 { /* NC */
1332
+			dap4-dout-pp6 { /* NC */
13671333 				nvidia,pins = "dap4_dout_pp6";
13681334 				nvidia,function = "rsvd4";
13691335 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13701336 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13711337 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13721338 			};
1373
-			dap4_sclk_pp7 { /* NC */
1339
+			dap4-sclk-pp7 { /* NC */
13741340 				nvidia,pins = "dap4_sclk_pp7";
13751341 				nvidia,function = "rsvd3";
13761342 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13771343 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13781344 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13791345 			};
1380
-			kb_col3_pq3 { /* NC */
1346
+			kb-col3-pq3 { /* NC */
13811347 				nvidia,pins = "kb_col3_pq3";
13821348 				nvidia,function = "kbc";
13831349 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13841350 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13851351 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13861352 			};
1387
-			kb_row3_pr3 { /* NC */
1353
+			kb-row3-pr3 { /* NC */
13881354 				nvidia,pins = "kb_row3_pr3";
13891355 				nvidia,function = "kbc";
13901356 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13911357 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13921358 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
13931359 			};
1394
-			kb_row4_pr4 { /* NC */
1360
+			kb-row4-pr4 { /* NC */
13951361 				nvidia,pins = "kb_row4_pr4";
13961362 				nvidia,function = "rsvd3";
13971363 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
13981364 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
13991365 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14001366 			};
1401
-			kb_row5_pr5 { /* NC */
1367
+			kb-row5-pr5 { /* NC */
14021368 				nvidia,pins = "kb_row5_pr5";
14031369 				nvidia,function = "rsvd3";
14041370 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14051371 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14061372 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14071373 			};
1408
-			kb_row6_pr6 { /* NC */
1374
+			kb-row6-pr6 { /* NC */
14091375 				nvidia,pins = "kb_row6_pr6";
14101376 				nvidia,function = "kbc";
14111377 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14121378 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14131379 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14141380 			};
1415
-			kb_row7_pr7 { /* NC */
1381
+			kb-row7-pr7 { /* NC */
14161382 				nvidia,pins = "kb_row7_pr7";
14171383 				nvidia,function = "rsvd2";
14181384 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14191385 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14201386 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14211387 			};
1422
-			kb_row8_ps0 { /* NC */
1388
+			kb-row8-ps0 { /* NC */
14231389 				nvidia,pins = "kb_row8_ps0";
14241390 				nvidia,function = "rsvd2";
14251391 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14261392 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14271393 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14281394 			};
1429
-			kb_row9_ps1 { /* NC */
1395
+			kb-row9-ps1 { /* NC */
14301396 				nvidia,pins = "kb_row9_ps1";
14311397 				nvidia,function = "rsvd2";
14321398 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14331399 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14341400 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14351401 			};
1436
-			kb_row12_ps4 { /* NC */
1402
+			kb-row12-ps4 { /* NC */
14371403 				nvidia,pins = "kb_row12_ps4";
14381404 				nvidia,function = "rsvd2";
14391405 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14401406 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14411407 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14421408 			};
1443
-			kb_row13_ps5 { /* NC */
1409
+			kb-row13-ps5 { /* NC */
14441410 				nvidia,pins = "kb_row13_ps5";
14451411 				nvidia,function = "rsvd2";
14461412 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14471413 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14481414 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14491415 			};
1450
-			kb_row14_ps6 { /* NC */
1416
+			kb-row14-ps6 { /* NC */
14511417 				nvidia,pins = "kb_row14_ps6";
14521418 				nvidia,function = "rsvd2";
14531419 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14541420 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14551421 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14561422 			};
1457
-			kb_row15_ps7 { /* NC */
1423
+			kb-row15-ps7 { /* NC */
14581424 				nvidia,pins = "kb_row15_ps7";
14591425 				nvidia,function = "rsvd3";
14601426 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14611427 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14621428 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14631429 			};
1464
-			kb_row16_pt0 { /* NC */
1430
+			kb-row16-pt0 { /* NC */
14651431 				nvidia,pins = "kb_row16_pt0";
14661432 				nvidia,function = "rsvd2";
14671433 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
14681434 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14691435 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14701436 			};
1471
-			kb_row17_pt1 { /* NC */
1437
+			kb-row17-pt1 { /* NC */
14721438 				nvidia,pins = "kb_row17_pt1";
14731439 				nvidia,function = "rsvd2";
14741440 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1496,14 +1462,14 @@
14961462 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
14971463 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
14981464 			};
1499
-			gpio_x1_aud_px1 { /* NC */
1465
+			gpio-x1-aud-px1 { /* NC */
15001466 				nvidia,pins = "gpio_x1_aud_px1";
15011467 				nvidia,function = "rsvd2";
15021468 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
15031469 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
15041470 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
15051471 			};
1506
-			gpio_x3_aud_px3 { /* NC */
1472
+			gpio-x3-aud-px3 { /* NC */
15071473 				nvidia,pins = "gpio_x3_aud_px3";
15081474 				nvidia,function = "rsvd4";
15091475 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1531,14 +1497,14 @@
15311497 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
15321498 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
15331499 			};
1534
-			clk3_req_pee1 { /* NC */
1500
+			clk3-req-pee1 { /* NC */
15351501 				nvidia,pins = "clk3_req_pee1";
15361502 				nvidia,function = "rsvd2";
15371503 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
15381504 				nvidia,tristate = <TEGRA_PIN_ENABLE>;
15391505 				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
15401506 			};
1541
-			dap_mclk1_req_pee2 { /* NC */
1507
+			dap-mclk1-req-pee2 { /* NC */
15421508 				nvidia,pins = "dap_mclk1_req_pee2";
15431509 				nvidia,function = "rsvd4";
15441510 				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
....@@ -1554,7 +1520,7 @@
15541520 			 * SDMMC_VENDOR_MISC_CNTRL_0 register's SDMMC_SPARE1
15551521 			 * bits being set to 0xfffd according to the TRM!
15561522 			 */
1557
-			sdmmc3_clk_lb_out_pee4 { /* NC */
1523
+			sdmmc3-clk-lb-out-pee4 { /* NC */
15581524 				nvidia,pins = "sdmmc3_clk_lb_out_pee4";
15591525 				nvidia,function = "sdmmc3";
15601526 				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
....@@ -1589,8 +1555,10 @@
15891555 		sgtl5000: codec@a {
15901556 			compatible = "fsl,sgtl5000";
15911557 			reg = <0x0a>;
1592
-			VDDA-supply = <&reg_3v3>;
1593
-			VDDIO-supply = <&vddio_1v8>;
1558
+			#sound-dai-cells = <0>;
1559
+			VDDA-supply = <&reg_module_3v3_audio>;
1560
+			VDDD-supply = <&reg_1v8_vddio>;
1561
+			VDDIO-supply = <&reg_1v8_vddio>;
15941562 			clocks = <&tegra_car TEGRA124_CLK_EXTERN1>;
15951563 		};
15961564 
....@@ -1607,14 +1575,14 @@
16071575 			pinctrl-0 = <&as3722_default>;
16081576 
16091577 			as3722_default: pinmux {
1610
-				gpio2_7 {
1578
+				gpio2-7 {
16111579 					pins = "gpio2", /* PWR_EN_+V3.3 */
16121580 					       "gpio7"; /* +V1.6_LPO */
16131581 					function = "gpio";
16141582 					bias-pull-up;
16151583 				};
16161584 
1617
-				gpio0_1_3_4_5_6 {
1585
+				gpio0-1-3-4-5-6 {
16181586 					pins = "gpio0", "gpio1", "gpio3",
16191587 					       "gpio4", "gpio5", "gpio6";
16201588 					bias-high-impedance;
....@@ -1622,18 +1590,18 @@
16221590 			};
16231591 
16241592 			regulators {
1625
-				vsup-sd2-supply = <&reg_3v3>;
1626
-				vsup-sd3-supply = <&reg_3v3>;
1627
-				vsup-sd4-supply = <&reg_3v3>;
1628
-				vsup-sd5-supply = <&reg_3v3>;
1629
-				vin-ldo0-supply = <&vddio_ddr_1v35>;
1630
-				vin-ldo1-6-supply = <&reg_3v3>;
1631
-				vin-ldo2-5-7-supply = <&vddio_1v8>;
1632
-				vin-ldo3-4-supply = <&reg_3v3>;
1633
-				vin-ldo9-10-supply = <&reg_3v3>;
1634
-				vin-ldo11-supply = <&reg_3v3>;
1593
+				vsup-sd2-supply = <&reg_module_3v3>;
1594
+				vsup-sd3-supply = <&reg_module_3v3>;
1595
+				vsup-sd4-supply = <&reg_module_3v3>;
1596
+				vsup-sd5-supply = <&reg_module_3v3>;
1597
+				vin-ldo0-supply = <&reg_1v35_vddio_ddr>;
1598
+				vin-ldo1-6-supply = <&reg_module_3v3>;
1599
+				vin-ldo2-5-7-supply = <&reg_1v8_vddio>;
1600
+				vin-ldo3-4-supply = <&reg_module_3v3>;
1601
+				vin-ldo9-10-supply = <&reg_module_3v3>;
1602
+				vin-ldo11-supply = <&reg_module_3v3>;
16351603 
1636
-				vdd_cpu: sd0 {
1604
+				reg_vdd_cpu: sd0 {
16371605 					regulator-name = "+VDD_CPU_AP";
16381606 					regulator-min-microvolt = <700000>;
16391607 					regulator-max-microvolt = <1400000>;
....@@ -1655,7 +1623,7 @@
16551623 					ams,ext-control = <1>;
16561624 				};
16571625 
1658
-				vddio_ddr_1v35: sd2 {
1626
+				reg_1v35_vddio_ddr: sd2 {
16591627 					regulator-name =
16601628 						"+V1.35_VDDIO_DDR(sd2)";
16611629 					regulator-min-microvolt = <1350000>;
....@@ -1673,13 +1641,13 @@
16731641 					regulator-boot-on;
16741642 				};
16751643 
1676
-				vdd_1v05: sd4 {
1644
+				reg_1v05_vdd: sd4 {
16771645 					regulator-name = "+V1.05";
16781646 					regulator-min-microvolt = <1050000>;
16791647 					regulator-max-microvolt = <1050000>;
16801648 				};
16811649 
1682
-				vddio_1v8: sd5 {
1650
+				reg_1v8_vddio: sd5 {
16831651 					regulator-name = "+V1.8";
16841652 					regulator-min-microvolt = <1800000>;
16851653 					regulator-max-microvolt = <1800000>;
....@@ -1687,7 +1655,7 @@
16871655 					regulator-always-on;
16881656 				};
16891657 
1690
-				vdd_gpu: sd6 {
1658
+				reg_vdd_gpu: sd6 {
16911659 					regulator-name = "+VDD_GPU_AP";
16921660 					regulator-min-microvolt = <650000>;
16931661 					regulator-max-microvolt = <1200000>;
....@@ -1697,7 +1665,7 @@
16971665 					regulator-always-on;
16981666 				};
16991667 
1700
-				avdd_1v05: ldo0 {
1668
+				reg_1v05_avdd: ldo0 {
17011669 					regulator-name = "+V1.05_AVDD";
17021670 					regulator-min-microvolt = <1050000>;
17031671 					regulator-max-microvolt = <1050000>;
....@@ -1772,12 +1740,13 @@
17721740 		 * TMP451 temperature sensor
17731741 		 * Note: THERM_N directly connected to AS3722 PMIC THERM
17741742 		 */
1775
-		temperature-sensor@4c {
1743
+		temp-sensor@4c {
17761744 			compatible = "ti,tmp451";
17771745 			reg = <0x4c>;
17781746 			interrupt-parent = <&gpio>;
17791747 			interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>;
17801748 			#thermal-sensor-cells = <1>;
1749
+			vcc-supply = <&reg_module_3v3>;
17811750 		};
17821751 	};
17831752 
....@@ -1809,9 +1778,9 @@
18091778 	sata@70020000 {
18101779 		phys = <&{/padctl@7009f000/pads/sata/lanes/sata-0}>;
18111780 		phy-names = "sata-0";
1812
-		avdd-supply = <&vdd_1v05>;
1813
-		hvdd-supply = <&reg_3v3>;
1814
-		vddio-supply = <&vdd_1v05>;
1781
+		avdd-supply = <&reg_1v05_vdd>;
1782
+		hvdd-supply = <&reg_module_3v3>;
1783
+		vddio-supply = <&reg_1v05_vdd>;
18151784 	};
18161785 
18171786 	usb@70090000 {
....@@ -1822,35 +1791,40 @@
18221791 		       <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>,
18231792 		       <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>;
18241793 		phy-names = "usb2-0", "usb3-1", "usb2-1", "usb2-2", "usb3-0";
1825
-		avddio-pex-supply = <&vdd_1v05>;
1826
-		avdd-pll-erefe-supply = <&avdd_1v05>;
1827
-		avdd-pll-utmip-supply = <&vddio_1v8>;
1828
-		avdd-usb-ss-pll-supply = <&vdd_1v05>;
1829
-		avdd-usb-supply = <&reg_3v3>;
1830
-		dvddio-pex-supply = <&vdd_1v05>;
1831
-		hvdd-usb-ss-pll-e-supply = <&reg_3v3>;
1832
-		hvdd-usb-ss-supply = <&reg_3v3>;
1794
+		avddio-pex-supply = <&reg_1v05_vdd>;
1795
+		avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1796
+		avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1797
+		avdd-usb-ss-pll-supply = <&reg_1v05_vdd>;
1798
+		avdd-usb-supply = <&reg_module_3v3>;
1799
+		dvddio-pex-supply = <&reg_1v05_vdd>;
1800
+		hvdd-usb-ss-pll-e-supply = <&reg_module_3v3>;
1801
+		hvdd-usb-ss-supply = <&reg_module_3v3>;
18331802 	};
18341803 
18351804 	padctl@7009f000 {
1805
+		avdd-pll-utmip-supply = <&reg_1v8_vddio>;
1806
+		avdd-pll-erefe-supply = <&reg_1v05_avdd>;
1807
+		avdd-pex-pll-supply = <&reg_1v05_vdd>;
1808
+		hvdd-pex-pll-e-supply = <&reg_module_3v3>;
1809
+
18361810 		pads {
18371811 			usb2 {
18381812 				status = "okay";
18391813 
18401814 				lanes {
18411815 					usb2-0 {
1842
-						nvidia,function = "xusb";
18431816 						status = "okay";
1817
+						nvidia,function = "xusb";
18441818 					};
18451819 
18461820 					usb2-1 {
1847
-						nvidia,function = "xusb";
18481821 						status = "okay";
1822
+						nvidia,function = "xusb";
18491823 					};
18501824 
18511825 					usb2-2 {
1852
-						nvidia,function = "xusb";
18531826 						status = "okay";
1827
+						nvidia,function = "xusb";
18541828 					};
18551829 				};
18561830 			};
....@@ -1860,28 +1834,28 @@
18601834 
18611835 				lanes {
18621836 					pcie-0 {
1863
-						nvidia,function = "usb3-ss";
18641837 						status = "okay";
1838
+						nvidia,function = "usb3-ss";
18651839 					};
18661840 
18671841 					pcie-1 {
1868
-						nvidia,function = "usb3-ss";
18691842 						status = "okay";
1843
+						nvidia,function = "usb3-ss";
18701844 					};
18711845 
18721846 					pcie-2 {
1873
-						nvidia,function = "pcie";
18741847 						status = "okay";
1848
+						nvidia,function = "pcie";
18751849 					};
18761850 
18771851 					pcie-3 {
1878
-						nvidia,function = "pcie";
18791852 						status = "okay";
1853
+						nvidia,function = "pcie";
18801854 					};
18811855 
18821856 					pcie-4 {
1883
-						nvidia,function = "pcie";
18841857 						status = "okay";
1858
+						nvidia,function = "pcie";
18851859 					};
18861860 				};
18871861 			};
....@@ -1891,8 +1865,8 @@
18911865 
18921866 				lanes {
18931867 					sata-0 {
1894
-						nvidia,function = "sata";
18951868 						status = "okay";
1869
+						nvidia,function = "sata";
18961870 					};
18971871 				};
18981872 			};
....@@ -1903,7 +1877,6 @@
19031877 			usb2-0 {
19041878 				status = "okay";
19051879 				mode = "otg";
1906
-
19071880 				vbus-supply = <&reg_usbo1_vbus>;
19081881 			};
19091882 
....@@ -1911,7 +1884,6 @@
19111884 			usb2-1 {
19121885 				status = "okay";
19131886 				mode = "host";
1914
-
19151887 				vbus-supply = <&reg_usbh_vbus>;
19161888 			};
19171889 
....@@ -1919,34 +1891,38 @@
19191891 			usb2-2 {
19201892 				status = "okay";
19211893 				mode = "host";
1922
-
19231894 				vbus-supply = <&reg_usbh_vbus>;
19241895 			};
19251896 
19261897 			usb3-0 {
1927
-				nvidia,usb2-companion = <2>;
19281898 				status = "okay";
1899
+				nvidia,usb2-companion = <2>;
1900
+				vbus-supply = <&reg_usbh_vbus>;
19291901 			};
19301902 
19311903 			usb3-1 {
1932
-				nvidia,usb2-companion = <0>;
19331904 				status = "okay";
1905
+				nvidia,usb2-companion = <0>;
1906
+				vbus-supply = <&reg_usbo1_vbus>;
19341907 			};
19351908 		};
19361909 	};
19371910 
19381911 	/* eMMC */
1939
-	sdhci@700b0600 {
1912
+	mmc@700b0600 {
19401913 		status = "okay";
19411914 		bus-width = <8>;
19421915 		non-removable;
1916
+		vmmc-supply = <&reg_module_3v3>; /* VCC */
1917
+		vqmmc-supply = <&reg_1v8_vddio>; /* VCCQ */
1918
+		mmc-ddr-1_8v;
19431919 	};
19441920 
19451921 	/* CPU DFLL clock */
19461922 	clock@70110000 {
19471923 		status = "okay";
1948
-		vdd-cpu-supply = <&vdd_cpu>;
19491924 		nvidia,i2c-fs-rate = <400000>;
1925
+		vdd-cpu-supply = <&reg_vdd_cpu>;
19501926 	};
19511927 
19521928 	ahub@70300000 {
....@@ -1955,22 +1931,15 @@
19551931 		};
19561932 	};
19571933 
1958
-	clocks {
1959
-		compatible = "simple-bus";
1960
-		#address-cells = <1>;
1961
-		#size-cells = <0>;
1962
-
1963
-		clk32k_in: clock@0 {
1964
-			compatible = "fixed-clock";
1965
-			reg = <0>;
1966
-			#clock-cells = <0>;
1967
-			clock-frequency = <32768>;
1968
-		};
1934
+	clk32k_in: osc3 {
1935
+		compatible = "fixed-clock";
1936
+		#clock-cells = <0>;
1937
+		clock-frequency = <32768>;
19691938 	};
19701939 
19711940 	cpus {
19721941 		cpu@0 {
1973
-			vdd-cpu-supply = <&vdd_cpu>;
1942
+			vdd-cpu-supply = <&reg_vdd_cpu>;
19741943 		};
19751944 	};
19761945 
....@@ -1980,7 +1949,7 @@
19801949 		regulator-min-microvolt = <1050000>;
19811950 		regulator-max-microvolt = <1050000>;
19821951 		gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
1983
-		vin-supply = <&vdd_1v05>;
1952
+		vin-supply = <&reg_1v05_vdd>;
19841953 	};
19851954 
19861955 	reg_3v3_mxm: regulator-3v3-mxm {
....@@ -1992,7 +1961,15 @@
19921961 		regulator-boot-on;
19931962 	};
19941963 
1995
-	reg_3v3: regulator-3v3 {
1964
+	reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1965
+		compatible = "regulator-fixed";
1966
+		regulator-name = "+V3.3_AVDD_HDMI";
1967
+		regulator-min-microvolt = <3300000>;
1968
+		regulator-max-microvolt = <3300000>;
1969
+		vin-supply = <&reg_1v05_vdd>;
1970
+	};
1971
+
1972
+	reg_module_3v3: regulator-module-3v3 {
19961973 		compatible = "regulator-fixed";
19971974 		regulator-name = "+V3.3";
19981975 		regulator-min-microvolt = <3300000>;
....@@ -2005,12 +1982,12 @@
20051982 		vin-supply = <&reg_3v3_mxm>;
20061983 	};
20071984 
2008
-	reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1985
+	reg_module_3v3_audio: regulator-module-3v3-audio {
20091986 		compatible = "regulator-fixed";
2010
-		regulator-name = "+V3.3_AVDD_HDMI";
1987
+		regulator-name = "+V3.3_AUDIO_AVDD_S";
20111988 		regulator-min-microvolt = <3300000>;
20121989 		regulator-max-microvolt = <3300000>;
2013
-		vin-supply = <&vdd_1v05>;
1990
+		regulator-always-on;
20141991 	};
20151992 
20161993 	sound {
....@@ -2025,8 +2002,14 @@
20252002 		nvidia,audio-codec = <&sgtl5000>;
20262003 		clocks = <&tegra_car TEGRA124_CLK_PLL_A>,
20272004 			 <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2028
-			 <&tegra_car TEGRA124_CLK_EXTERN1>;
2005
+			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
20292006 		clock-names = "pll_a", "pll_a_out0", "mclk";
2007
+
2008
+		assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>,
2009
+				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2010
+
2011
+		assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>,
2012
+					 <&tegra_car TEGRA124_CLK_EXTERN1>;
20302013 	};
20312014 
20322015 	thermal-zones {
....@@ -2064,7 +2047,7 @@
20642047 
20652048 &gpio {
20662049 	/* I210 Gigabit Ethernet Controller Reset */
2067
-	lan_reset_n {
2050
+	lan-reset-n {
20682051 		gpio-hog;
20692052 		gpios = <TEGRA_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
20702053 		output-high;
....@@ -2072,7 +2055,7 @@
20722055 	};
20732056 
20742057 	/* Control MXM3 pin 26 Reset Module Output Carrier Input */
2075
-	reset_moci_ctrl {
2058
+	reset-moci-ctrl {
20762059 		gpio-hog;
20772060 		gpios = <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
20782061 		output-high;