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2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a 
 kernel/arch/arm/boot/dts/sama5d2.dtsi
....@@ -1,54 +1,19 @@
1
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 /*
23  * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
34  *
45  *  Copyright (C) 2015 Atmel,
56  *                2015 Ludovic Desroches <ludovic.desroches@atmel.com>
6
- *
7
- * This file is dual-licensed: you can use it either under the terms
8
- * of the GPL or the X11 license, at your option. Note that this dual
9
- * licensing only applies to this file, and not this project as a
10
- * whole.
11
- *
12
- *  a) This file is free software; you can redistribute it and/or
13
- *     modify it under the terms of the GNU General Public License as
14
- *     published by the Free Software Foundation; either version 2 of the
15
- *     License, or (at your option) any later version.
16
- *
17
- *     This file is distributed in the hope that it will be useful,
18
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
19
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20
- *     GNU General Public License for more details.
21
- *
22
- * Or, alternatively,
23
- *
24
- *  b) Permission is hereby granted, free of charge, to any person
25
- *     obtaining a copy of this software and associated documentation
26
- *     files (the "Software"), to deal in the Software without
27
- *     restriction, including without limitation the rights to use,
28
- *     copy, modify, merge, publish, distribute, sublicense, and/or
29
- *     sell copies of the Software, and to permit persons to whom the
30
- *     Software is furnished to do so, subject to the following
31
- *     conditions:
32
- *
33
- *     The above copyright notice and this permission notice shall be
34
- *     included in all copies or substantial portions of the Software.
35
- *
36
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
37
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
38
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
39
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
40
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
41
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
42
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
43
- *     OTHER DEALINGS IN THE SOFTWARE.
447  */
458 
46
-#include "skeleton.dtsi"
479 #include <dt-bindings/dma/at91.h>
4810 #include <dt-bindings/interrupt-controller/irq.h>
4911 #include <dt-bindings/clock/at91.h>
12
+#include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
5013 
5114 / {
15
+	#address-cells = <1>;
16
+	#size-cells = <1>;
5217 	model = "Atmel SAMA5D2 family SoC";
5318 	compatible = "atmel,sama5d2";
5419 	interrupt-parent = <&aic>;
....@@ -56,8 +21,6 @@
5621 	aliases {
5722 		serial0 = &uart1;
5823 		serial1 = &uart3;
59
-		tcb0 = &tcb0;
60
-		tcb1 = &tcb1;
6124 	};
6225 
6326 	cpus {
....@@ -81,13 +44,14 @@
8144 		compatible = "arm,coresight-etb10", "arm,primecell";
8245 		reg = <0x740000 0x1000>;
8346 
84
-		clocks = <&mck>;
47
+		clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
8548 		clock-names = "apb_pclk";
8649 
87
-		port {
88
-			etb_in: endpoint {
89
-				slave-mode;
90
-				remote-endpoint = <&etm_out>;
50
+		in-ports {
51
+			port {
52
+				etb_in: endpoint {
53
+					remote-endpoint = <&etm_out>;
54
+				};
9155 			};
9256 		};
9357 	};
....@@ -96,17 +60,20 @@
9660 		compatible = "arm,coresight-etm3x", "arm,primecell";
9761 		reg = <0x73C000 0x1000>;
9862 
99
-		clocks = <&mck>;
63
+		clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
10064 		clock-names = "apb_pclk";
10165 
102
-		port {
103
-			etm_out: endpoint {
104
-				remote-endpoint = <&etb_in>;
66
+		out-ports {
67
+			port {
68
+				etm_out: endpoint {
69
+					remote-endpoint = <&etb_in>;
70
+				};
10571 			};
10672 		};
10773 	};
10874 
109
-	memory {
75
+	memory@20000000 {
76
+		device_type = "memory";
11077 		reg = <0x20000000 0x20000000>;
11178 	};
11279 
....@@ -127,6 +94,9 @@
12794 	ns_sram: sram@200000 {
12895 		compatible = "mmio-sram";
12996 		reg = <0x00200000 0x20000>;
97
+		#address-cells = <1>;
98
+		#size-cells = <1>;
99
+		ranges = <0 0x00200000 0x20000>;
130100 	};
131101 
132102 	ahb {
....@@ -139,143 +109,27 @@
139109 			compatible = "mmio-sram";
140110 			no-memory-wc;
141111 			reg = <0x00100000 0x2400>;
112
+			#address-cells = <1>;
113
+			#size-cells = <1>;
114
+			ranges = <0 0x00100000 0x2400>;
115
+
142116 		};
143117 
144118 		usb0: gadget@300000 {
145
-			#address-cells = <1>;
146
-			#size-cells = <0>;
147119 			compatible = "atmel,sama5d3-udc";
148120 			reg = <0x00300000 0x100000
149121 			       0xfc02c000 0x400>;
150122 			interrupts = <42 IRQ_TYPE_LEVEL_HIGH 2>;
151
-			clocks = <&udphs_clk>, <&utmi>;
123
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
152124 			clock-names = "pclk", "hclk";
153125 			status = "disabled";
154
-
155
-			ep@0 {
156
-				reg = <0>;
157
-				atmel,fifo-size = <64>;
158
-				atmel,nb-banks = <1>;
159
-			};
160
-
161
-			ep@1 {
162
-				reg = <1>;
163
-				atmel,fifo-size = <1024>;
164
-				atmel,nb-banks = <3>;
165
-				atmel,can-dma;
166
-				atmel,can-isoc;
167
-			};
168
-
169
-			ep@2 {
170
-				reg = <2>;
171
-				atmel,fifo-size = <1024>;
172
-				atmel,nb-banks = <3>;
173
-				atmel,can-dma;
174
-				atmel,can-isoc;
175
-			};
176
-
177
-			ep@3 {
178
-				reg = <3>;
179
-				atmel,fifo-size = <1024>;
180
-				atmel,nb-banks = <2>;
181
-				atmel,can-dma;
182
-				atmel,can-isoc;
183
-			};
184
-
185
-			ep@4 {
186
-				reg = <4>;
187
-				atmel,fifo-size = <1024>;
188
-				atmel,nb-banks = <2>;
189
-				atmel,can-dma;
190
-				atmel,can-isoc;
191
-			};
192
-
193
-			ep@5 {
194
-				reg = <5>;
195
-				atmel,fifo-size = <1024>;
196
-				atmel,nb-banks = <2>;
197
-				atmel,can-dma;
198
-				atmel,can-isoc;
199
-			};
200
-
201
-			ep@6 {
202
-				reg = <6>;
203
-				atmel,fifo-size = <1024>;
204
-				atmel,nb-banks = <2>;
205
-				atmel,can-dma;
206
-				atmel,can-isoc;
207
-			};
208
-
209
-			ep@7 {
210
-				reg = <7>;
211
-				atmel,fifo-size = <1024>;
212
-				atmel,nb-banks = <2>;
213
-				atmel,can-dma;
214
-				atmel,can-isoc;
215
-			};
216
-
217
-			ep@8 {
218
-				reg = <8>;
219
-				atmel,fifo-size = <1024>;
220
-				atmel,nb-banks = <2>;
221
-				atmel,can-isoc;
222
-			};
223
-
224
-			ep@9 {
225
-				reg = <9>;
226
-				atmel,fifo-size = <1024>;
227
-				atmel,nb-banks = <2>;
228
-				atmel,can-isoc;
229
-			};
230
-
231
-			ep@10 {
232
-				reg = <10>;
233
-				atmel,fifo-size = <1024>;
234
-				atmel,nb-banks = <2>;
235
-				atmel,can-isoc;
236
-			};
237
-
238
-			ep@11 {
239
-				reg = <11>;
240
-				atmel,fifo-size = <1024>;
241
-				atmel,nb-banks = <2>;
242
-				atmel,can-isoc;
243
-			};
244
-
245
-			ep@12 {
246
-				reg = <12>;
247
-				atmel,fifo-size = <1024>;
248
-				atmel,nb-banks = <2>;
249
-				atmel,can-isoc;
250
-			};
251
-
252
-			ep@13 {
253
-				reg = <13>;
254
-				atmel,fifo-size = <1024>;
255
-				atmel,nb-banks = <2>;
256
-				atmel,can-isoc;
257
-			};
258
-
259
-			ep@14 {
260
-				reg = <14>;
261
-				atmel,fifo-size = <1024>;
262
-				atmel,nb-banks = <2>;
263
-				atmel,can-isoc;
264
-			};
265
-
266
-			ep@15 {
267
-				reg = <15>;
268
-				atmel,fifo-size = <1024>;
269
-				atmel,nb-banks = <2>;
270
-				atmel,can-isoc;
271
-			};
272126 		};
273127 
274128 		usb1: ohci@400000 {
275129 			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
276130 			reg = <0x00400000 0x100000>;
277131 			interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
278
-			clocks = <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
132
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
279133 			clock-names = "ohci_clk", "hclk", "uhpck";
280134 			status = "disabled";
281135 		};
....@@ -284,7 +138,7 @@
284138 			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
285139 			reg = <0x00500000 0x100000>;
286140 			interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
287
-			clocks = <&utmi>, <&uhphs_clk>;
141
+			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
288142 			clock-names = "usb_clk", "ehci_clk";
289143 			status = "disabled";
290144 		};
....@@ -308,7 +162,7 @@
308162 				  0x1 0x0 0x60000000 0x10000000
309163 				  0x2 0x0 0x70000000 0x10000000
310164 				  0x3 0x0 0x80000000 0x10000000>;
311
-			clocks = <&h32ck>;
165
+			clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
312166 			status = "disabled";
313167 
314168 			nand_controller: nand-controller {
....@@ -323,50 +177,14 @@
323177 			};
324178 		};
325179 
326
-		nand0: nand@80000000 {
327
-			compatible = "atmel,sama5d2-nand";
328
-			#address-cells = <1>;
329
-			#size-cells = <1>;
330
-			ranges;
331
-			reg = < /* EBI CS3 */
332
-				0x80000000 0x08000000
333
-				/* SMC PMECC regs */
334
-				0xf8014070 0x00000490
335
-				/* SMC PMECC Error Location regs */
336
-				0xf8014500 0x00000200
337
-				/* ROM Galois tables */
338
-				0x00040000 0x00018000
339
-				>;
340
-			interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
341
-			atmel,nand-addr-offset = <21>;
342
-			atmel,nand-cmd-offset = <22>;
343
-			atmel,nand-has-dma;
344
-			atmel,has-pmecc;
345
-			atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
346
-			status = "disabled";
347
-
348
-			nfc@c0000000 {
349
-				compatible = "atmel,sama5d3-nfc";
350
-				#address-cells = <1>;
351
-				#size-cells = <1>;
352
-				reg = < /* NFC Command Registers */
353
-					0xc0000000 0x08000000
354
-					/* NFC HSMC regs */
355
-					0xf8014000 0x00000070
356
-					/* NFC SRAM banks */
357
-					0x00100000 0x00100000
358
-					>;
359
-				clocks = <&hsmc_clk>;
360
-				atmel,write-by-sram;
361
-			};
362
-		};
363
-
364180 		sdmmc0: sdio-host@a0000000 {
365181 			compatible = "atmel,sama5d2-sdhci";
366182 			reg = <0xa0000000 0x300>;
367183 			interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
368
-			clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;
184
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
369185 			clock-names = "hclock", "multclk", "baseclk";
186
+			assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
187
+			assigned-clock-rates = <480000000>;
370188 			status = "disabled";
371189 		};
372190 
....@@ -374,8 +192,10 @@
374192 			compatible = "atmel,sama5d2-sdhci";
375193 			reg = <0xb0000000 0x300>;
376194 			interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
377
-			clocks = <&sdmmc1_hclk>, <&sdmmc1_gclk>, <&main>;
195
+			clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
378196 			clock-names = "hclock", "multclk", "baseclk";
197
+			assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
198
+			assigned-clock-rates = <480000000>;
379199 			status = "disabled";
380200 		};
381201 
....@@ -394,7 +214,7 @@
394214 				compatible = "atmel,sama5d2-hlcdc";
395215 				reg = <0xf0000000 0x2000>;
396216 				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
397
-				clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
217
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
398218 				clock-names = "periph_clk","sys_clk", "slow_clk";
399219 				status = "disabled";
400220 
....@@ -420,7 +240,7 @@
420240 				compatible = "atmel,sama5d2-isc";
421241 				reg = <0xf0008000 0x4000>;
422242 				interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
423
-				clocks = <&isc_clk>, <&iscck>, <&isc_gclk>;
243
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 18>, <&pmc PMC_TYPE_GCK 46>;
424244 				clock-names = "hclock", "iscck", "gck";
425245 				#clock-cells = <0>;
426246 				clock-output-names = "isc-mck";
....@@ -430,7 +250,7 @@
430250 			ramc0: ramc@f000c000 {
431251 				compatible = "atmel,sama5d3-ddramc";
432252 				reg = <0xf000c000 0x200>;
433
-				clocks = <&ddrck>, <&mpddr_clk>;
253
+				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 13>;
434254 				clock-names = "ddrck", "mpddr";
435255 			};
436256 
....@@ -439,7 +259,7 @@
439259 				reg = <0xf0010000 0x1000>;
440260 				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
441261 				#dma-cells = <1>;
442
-				clocks = <&dma0_clk>;
262
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
443263 				clock-names = "dma_clk";
444264 			};
445265 
....@@ -449,7 +269,7 @@
449269 				reg = <0xf0004000 0x1000>;
450270 				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
451271 				#dma-cells = <1>;
452
-				clocks = <&dma1_clk>;
272
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
453273 				clock-names = "dma_clk";
454274 			};
455275 
....@@ -457,541 +277,9 @@
457277 				compatible = "atmel,sama5d2-pmc", "syscon";
458278 				reg = <0xf0014000 0x160>;
459279 				interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
460
-				interrupt-controller;
461
-				#address-cells = <1>;
462
-				#size-cells = <0>;
463
-				#interrupt-cells = <1>;
464
-
465
-				main_rc_osc: main_rc_osc {
466
-					compatible = "atmel,at91sam9x5-clk-main-rc-osc";
467
-					#clock-cells = <0>;
468
-					interrupt-parent = <&pmc>;
469
-					interrupts = <AT91_PMC_MOSCRCS>;
470
-					clock-frequency = <12000000>;
471
-					clock-accuracy = <100000000>;
472
-				};
473
-
474
-				main_osc: main_osc {
475
-					compatible = "atmel,at91rm9200-clk-main-osc";
476
-					#clock-cells = <0>;
477
-					interrupt-parent = <&pmc>;
478
-					interrupts = <AT91_PMC_MOSCS>;
479
-					clocks = <&main_xtal>;
480
-				};
481
-
482
-				main: mainck {
483
-					compatible = "atmel,at91sam9x5-clk-main";
484
-					#clock-cells = <0>;
485
-					interrupt-parent = <&pmc>;
486
-					interrupts = <AT91_PMC_MOSCSELS>;
487
-					clocks = <&main_rc_osc &main_osc>;
488
-				};
489
-
490
-				plla: pllack {
491
-					compatible = "atmel,sama5d3-clk-pll";
492
-					#clock-cells = <0>;
493
-					interrupt-parent = <&pmc>;
494
-					interrupts = <AT91_PMC_LOCKA>;
495
-					clocks = <&main>;
496
-					reg = <0>;
497
-					atmel,clk-input-range = <12000000 12000000>;
498
-					#atmel,pll-clk-output-range-cells = <4>;
499
-					atmel,pll-clk-output-ranges = <600000000 1200000000 0 0>;
500
-				};
501
-
502
-				plladiv: plladivck {
503
-					compatible = "atmel,at91sam9x5-clk-plldiv";
504
-					#clock-cells = <0>;
505
-					clocks = <&plla>;
506
-				};
507
-
508
-				audio_pll_frac: audiopll_fracck {
509
-					compatible = "atmel,sama5d2-clk-audio-pll-frac";
510
-					#clock-cells = <0>;
511
-					clocks = <&main>;
512
-				};
513
-
514
-				audio_pll_pad: audiopll_padck {
515
-					compatible = "atmel,sama5d2-clk-audio-pll-pad";
516
-					#clock-cells = <0>;
517
-					clocks = <&audio_pll_frac>;
518
-				};
519
-
520
-				audio_pll_pmc: audiopll_pmcck {
521
-					compatible = "atmel,sama5d2-clk-audio-pll-pmc";
522
-					#clock-cells = <0>;
523
-					clocks = <&audio_pll_frac>;
524
-				};
525
-
526
-				utmi: utmick {
527
-					compatible = "atmel,at91sam9x5-clk-utmi";
528
-					#clock-cells = <0>;
529
-					interrupt-parent = <&pmc>;
530
-					interrupts = <AT91_PMC_LOCKU>;
531
-					clocks = <&main>;
532
-				};
533
-
534
-				mck: masterck {
535
-					compatible = "atmel,at91sam9x5-clk-master";
536
-					#clock-cells = <0>;
537
-					interrupt-parent = <&pmc>;
538
-					interrupts = <AT91_PMC_MCKRDY>;
539
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>;
540
-					atmel,clk-output-range = <124000000 166000000>;
541
-					atmel,clk-divisors = <1 2 4 3>;
542
-				};
543
-
544
-				h32ck: h32mxck {
545
-					#clock-cells = <0>;
546
-					compatible = "atmel,sama5d4-clk-h32mx";
547
-					clocks = <&mck>;
548
-				};
549
-
550
-				usb: usbck {
551
-					compatible = "atmel,at91sam9x5-clk-usb";
552
-					#clock-cells = <0>;
553
-					clocks = <&plladiv>, <&utmi>;
554
-				};
555
-
556
-				prog: progck {
557
-					compatible = "atmel,at91sam9x5-clk-programmable";
558
-					#address-cells = <1>;
559
-					#size-cells = <0>;
560
-					interrupt-parent = <&pmc>;
561
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>;
562
-
563
-					prog0: prog0 {
564
-						#clock-cells = <0>;
565
-						reg = <0>;
566
-						interrupts = <AT91_PMC_PCKRDY(0)>;
567
-					};
568
-
569
-					prog1: prog1 {
570
-						#clock-cells = <0>;
571
-						reg = <1>;
572
-						interrupts = <AT91_PMC_PCKRDY(1)>;
573
-					};
574
-
575
-					prog2: prog2 {
576
-						#clock-cells = <0>;
577
-						reg = <2>;
578
-						interrupts = <AT91_PMC_PCKRDY(2)>;
579
-					};
580
-				};
581
-
582
-				systemck {
583
-					compatible = "atmel,at91rm9200-clk-system";
584
-					#address-cells = <1>;
585
-					#size-cells = <0>;
586
-
587
-					ddrck: ddrck {
588
-						#clock-cells = <0>;
589
-						reg = <2>;
590
-						clocks = <&mck>;
591
-					};
592
-
593
-					lcdck: lcdck {
594
-						#clock-cells = <0>;
595
-						reg = <3>;
596
-						clocks = <&mck>;
597
-					};
598
-
599
-					uhpck: uhpck {
600
-						#clock-cells = <0>;
601
-						reg = <6>;
602
-						clocks = <&usb>;
603
-					};
604
-
605
-					udpck: udpck {
606
-						#clock-cells = <0>;
607
-						reg = <7>;
608
-						clocks = <&usb>;
609
-					};
610
-
611
-					pck0: pck0 {
612
-						#clock-cells = <0>;
613
-						reg = <8>;
614
-						clocks = <&prog0>;
615
-					};
616
-
617
-					pck1: pck1 {
618
-						#clock-cells = <0>;
619
-						reg = <9>;
620
-						clocks = <&prog1>;
621
-					};
622
-
623
-					pck2: pck2 {
624
-						#clock-cells = <0>;
625
-						reg = <10>;
626
-						clocks = <&prog2>;
627
-					};
628
-
629
-					iscck: iscck {
630
-						#clock-cells = <0>;
631
-						reg = <18>;
632
-						clocks = <&mck>;
633
-					};
634
-				};
635
-
636
-				periph32ck {
637
-					compatible = "atmel,at91sam9x5-clk-peripheral";
638
-					#address-cells = <1>;
639
-					#size-cells = <0>;
640
-					clocks = <&h32ck>;
641
-
642
-					macb0_clk: macb0_clk {
643
-						#clock-cells = <0>;
644
-						reg = <5>;
645
-						atmel,clk-output-range = <0 83000000>;
646
-					};
647
-
648
-					tdes_clk: tdes_clk {
649
-						#clock-cells = <0>;
650
-						reg = <11>;
651
-						atmel,clk-output-range = <0 83000000>;
652
-					};
653
-
654
-					matrix1_clk: matrix1_clk {
655
-						#clock-cells = <0>;
656
-						reg = <14>;
657
-					};
658
-
659
-					hsmc_clk: hsmc_clk {
660
-						#clock-cells = <0>;
661
-						reg = <17>;
662
-					};
663
-
664
-					pioA_clk: pioA_clk {
665
-						#clock-cells = <0>;
666
-						reg = <18>;
667
-						atmel,clk-output-range = <0 83000000>;
668
-					};
669
-
670
-					flx0_clk: flx0_clk {
671
-						#clock-cells = <0>;
672
-						reg = <19>;
673
-						atmel,clk-output-range = <0 83000000>;
674
-					};
675
-
676
-					flx1_clk: flx1_clk {
677
-						#clock-cells = <0>;
678
-						reg = <20>;
679
-						atmel,clk-output-range = <0 83000000>;
680
-					};
681
-
682
-					flx2_clk: flx2_clk {
683
-						#clock-cells = <0>;
684
-						reg = <21>;
685
-						atmel,clk-output-range = <0 83000000>;
686
-					};
687
-
688
-					flx3_clk: flx3_clk {
689
-						#clock-cells = <0>;
690
-						reg = <22>;
691
-						atmel,clk-output-range = <0 83000000>;
692
-					};
693
-
694
-					flx4_clk: flx4_clk {
695
-						#clock-cells = <0>;
696
-						reg = <23>;
697
-						atmel,clk-output-range = <0 83000000>;
698
-					};
699
-
700
-					uart0_clk: uart0_clk {
701
-						#clock-cells = <0>;
702
-						reg = <24>;
703
-						atmel,clk-output-range = <0 83000000>;
704
-					};
705
-
706
-					uart1_clk: uart1_clk {
707
-						#clock-cells = <0>;
708
-						reg = <25>;
709
-						atmel,clk-output-range = <0 83000000>;
710
-					};
711
-
712
-					uart2_clk: uart2_clk {
713
-						#clock-cells = <0>;
714
-						reg = <26>;
715
-						atmel,clk-output-range = <0 83000000>;
716
-					};
717
-
718
-					uart3_clk: uart3_clk {
719
-						#clock-cells = <0>;
720
-						reg = <27>;
721
-						atmel,clk-output-range = <0 83000000>;
722
-					};
723
-
724
-					uart4_clk: uart4_clk {
725
-						#clock-cells = <0>;
726
-						reg = <28>;
727
-						atmel,clk-output-range = <0 83000000>;
728
-					};
729
-
730
-					twi0_clk: twi0_clk {
731
-						reg = <29>;
732
-						#clock-cells = <0>;
733
-						atmel,clk-output-range = <0 83000000>;
734
-					};
735
-
736
-					twi1_clk: twi1_clk {
737
-						#clock-cells = <0>;
738
-						reg = <30>;
739
-						atmel,clk-output-range = <0 83000000>;
740
-					};
741
-
742
-					spi0_clk: spi0_clk {
743
-						#clock-cells = <0>;
744
-						reg = <33>;
745
-						atmel,clk-output-range = <0 83000000>;
746
-					};
747
-
748
-					spi1_clk: spi1_clk {
749
-						#clock-cells = <0>;
750
-						reg = <34>;
751
-						atmel,clk-output-range = <0 83000000>;
752
-					};
753
-
754
-					tcb0_clk: tcb0_clk {
755
-						#clock-cells = <0>;
756
-						reg = <35>;
757
-						atmel,clk-output-range = <0 83000000>;
758
-					};
759
-
760
-					tcb1_clk: tcb1_clk {
761
-						#clock-cells = <0>;
762
-						reg = <36>;
763
-						atmel,clk-output-range = <0 83000000>;
764
-					};
765
-
766
-					pwm_clk: pwm_clk {
767
-						#clock-cells = <0>;
768
-						reg = <38>;
769
-						atmel,clk-output-range = <0 83000000>;
770
-					};
771
-
772
-					adc_clk: adc_clk {
773
-						#clock-cells = <0>;
774
-						reg = <40>;
775
-						atmel,clk-output-range = <0 83000000>;
776
-					};
777
-
778
-					uhphs_clk: uhphs_clk {
779
-						#clock-cells = <0>;
780
-						reg = <41>;
781
-						atmel,clk-output-range = <0 83000000>;
782
-					};
783
-
784
-					udphs_clk: udphs_clk {
785
-						#clock-cells = <0>;
786
-						reg = <42>;
787
-						atmel,clk-output-range = <0 83000000>;
788
-					};
789
-
790
-					ssc0_clk: ssc0_clk {
791
-						#clock-cells = <0>;
792
-						reg = <43>;
793
-						atmel,clk-output-range = <0 83000000>;
794
-					};
795
-
796
-					ssc1_clk: ssc1_clk {
797
-						#clock-cells = <0>;
798
-						reg = <44>;
799
-						atmel,clk-output-range = <0 83000000>;
800
-					};
801
-
802
-					trng_clk: trng_clk {
803
-						#clock-cells = <0>;
804
-						reg = <47>;
805
-						atmel,clk-output-range = <0 83000000>;
806
-					};
807
-
808
-					pdmic_clk: pdmic_clk {
809
-						#clock-cells = <0>;
810
-						reg = <48>;
811
-						atmel,clk-output-range = <0 83000000>;
812
-					};
813
-
814
-					securam_clk: securam_clk {
815
-						#clock-cells = <0>;
816
-						reg = <51>;
817
-					};
818
-
819
-					i2s0_clk: i2s0_clk {
820
-						#clock-cells = <0>;
821
-						reg = <54>;
822
-						atmel,clk-output-range = <0 83000000>;
823
-					};
824
-
825
-					i2s1_clk: i2s1_clk {
826
-						#clock-cells = <0>;
827
-						reg = <55>;
828
-						atmel,clk-output-range = <0 83000000>;
829
-					};
830
-
831
-					can0_clk: can0_clk {
832
-						#clock-cells = <0>;
833
-						reg = <56>;
834
-						atmel,clk-output-range = <0 83000000>;
835
-					};
836
-
837
-					can1_clk: can1_clk {
838
-						#clock-cells = <0>;
839
-						reg = <57>;
840
-						atmel,clk-output-range = <0 83000000>;
841
-					};
842
-
843
-					classd_clk: classd_clk {
844
-						#clock-cells = <0>;
845
-						reg = <59>;
846
-						atmel,clk-output-range = <0 83000000>;
847
-					};
848
-				};
849
-
850
-				periph64ck {
851
-					compatible = "atmel,at91sam9x5-clk-peripheral";
852
-					#address-cells = <1>;
853
-					#size-cells = <0>;
854
-					clocks = <&mck>;
855
-
856
-					dma0_clk: dma0_clk {
857
-						#clock-cells = <0>;
858
-						reg = <6>;
859
-					};
860
-
861
-					dma1_clk: dma1_clk {
862
-						#clock-cells = <0>;
863
-						reg = <7>;
864
-					};
865
-
866
-					aes_clk: aes_clk {
867
-						#clock-cells = <0>;
868
-						reg = <9>;
869
-					};
870
-
871
-					aesb_clk: aesb_clk {
872
-						#clock-cells = <0>;
873
-						reg = <10>;
874
-					};
875
-
876
-					sha_clk: sha_clk {
877
-						#clock-cells = <0>;
878
-						reg = <12>;
879
-					};
880
-
881
-					mpddr_clk: mpddr_clk {
882
-						#clock-cells = <0>;
883
-						reg = <13>;
884
-					};
885
-
886
-					matrix0_clk: matrix0_clk {
887
-						#clock-cells = <0>;
888
-						reg = <15>;
889
-					};
890
-
891
-					sdmmc0_hclk: sdmmc0_hclk {
892
-						#clock-cells = <0>;
893
-						reg = <31>;
894
-					};
895
-
896
-					sdmmc1_hclk: sdmmc1_hclk {
897
-						#clock-cells = <0>;
898
-						reg = <32>;
899
-					};
900
-
901
-					lcdc_clk: lcdc_clk {
902
-						#clock-cells = <0>;
903
-						reg = <45>;
904
-					};
905
-
906
-					isc_clk: isc_clk {
907
-						#clock-cells = <0>;
908
-						reg = <46>;
909
-					};
910
-
911
-					qspi0_clk: qspi0_clk {
912
-						#clock-cells = <0>;
913
-						reg = <52>;
914
-					};
915
-
916
-					qspi1_clk: qspi1_clk {
917
-						#clock-cells = <0>;
918
-						reg = <53>;
919
-					};
920
-				};
921
-
922
-				gck {
923
-					compatible = "atmel,sama5d2-clk-generated";
924
-					#address-cells = <1>;
925
-					#size-cells = <0>;
926
-					interrupt-parent = <&pmc>;
927
-					clocks = <&clk32k>, <&main>, <&plladiv>, <&utmi>, <&mck>, <&audio_pll_pmc>;
928
-
929
-					sdmmc0_gclk: sdmmc0_gclk {
930
-						#clock-cells = <0>;
931
-						reg = <31>;
932
-					};
933
-
934
-					sdmmc1_gclk: sdmmc1_gclk {
935
-						#clock-cells = <0>;
936
-						reg = <32>;
937
-					};
938
-
939
-					tcb0_gclk: tcb0_gclk {
940
-						#clock-cells = <0>;
941
-						reg = <35>;
942
-						atmel,clk-output-range = <0 83000000>;
943
-					};
944
-
945
-					tcb1_gclk: tcb1_gclk {
946
-						#clock-cells = <0>;
947
-						reg = <36>;
948
-						atmel,clk-output-range = <0 83000000>;
949
-					};
950
-
951
-					pwm_gclk: pwm_gclk {
952
-						#clock-cells = <0>;
953
-						reg = <38>;
954
-						atmel,clk-output-range = <0 83000000>;
955
-					};
956
-
957
-					isc_gclk: isc_gclk {
958
-						#clock-cells = <0>;
959
-						reg = <46>;
960
-					};
961
-
962
-					pdmic_gclk: pdmic_gclk {
963
-						#clock-cells = <0>;
964
-						reg = <48>;
965
-					};
966
-
967
-					i2s0_gclk: i2s0_gclk {
968
-						#clock-cells = <0>;
969
-						reg = <54>;
970
-					};
971
-
972
-					i2s1_gclk: i2s1_gclk {
973
-						#clock-cells = <0>;
974
-						reg = <55>;
975
-					};
976
-
977
-					can0_gclk: can0_gclk {
978
-						#clock-cells = <0>;
979
-						reg = <56>;
980
-						atmel,clk-output-range = <0 80000000>;
981
-					};
982
-
983
-					can1_gclk: can1_gclk {
984
-						#clock-cells = <0>;
985
-						reg = <57>;
986
-						atmel,clk-output-range = <0 80000000>;
987
-					};
988
-
989
-					classd_gclk: classd_gclk {
990
-						#clock-cells = <0>;
991
-						reg = <59>;
992
-						atmel,clk-output-range = <0 100000000>;
993
-					};
994
-				};
280
+				#clock-cells = <2>;
281
+				clocks = <&clk32k>, <&main_xtal>;
282
+				clock-names = "slow_clk", "main_xtal";
995283 			};
996284 
997285 			qspi0: spi@f0020000 {
....@@ -999,7 +287,7 @@
999287 				reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
1000288 				reg-names = "qspi_base", "qspi_mmap";
1001289 				interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
1002
-				clocks = <&qspi0_clk>;
290
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
1003291 				#address-cells = <1>;
1004292 				#size-cells = <0>;
1005293 				status = "disabled";
....@@ -1010,7 +298,7 @@
1010298 				reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
1011299 				reg-names = "qspi_base", "qspi_mmap";
1012300 				interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
1013
-				clocks = <&qspi1_clk>;
301
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
1014302 				#address-cells = <1>;
1015303 				#size-cells = <0>;
1016304 				status = "disabled";
....@@ -1024,7 +312,7 @@
1024312 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1025313 					 AT91_XDMAC_DT_PERID(30))>;
1026314 				dma-names = "tx";
1027
-				clocks = <&sha_clk>;
315
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
1028316 				clock-names = "sha_clk";
1029317 				status = "okay";
1030318 			};
....@@ -1040,7 +328,7 @@
1040328 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1041329 					 AT91_XDMAC_DT_PERID(27))>;
1042330 				dma-names = "tx", "rx";
1043
-				clocks = <&aes_clk>;
331
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
1044332 				clock-names = "aes_clk";
1045333 				status = "okay";
1046334 			};
....@@ -1056,7 +344,7 @@
1056344 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1057345 					 AT91_XDMAC_DT_PERID(7))>;
1058346 				dma-names = "tx", "rx";
1059
-				clocks = <&spi0_clk>;
347
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
1060348 				clock-names = "spi_clk";
1061349 				atmel,fifo-size = <16>;
1062350 				#address-cells = <1>;
....@@ -1075,7 +363,7 @@
1075363 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1076364 					AT91_XDMAC_DT_PERID(22))>;
1077365 				dma-names = "tx", "rx";
1078
-				clocks = <&ssc0_clk>;
366
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
1079367 				clock-names = "pclk";
1080368 				status = "disabled";
1081369 			};
....@@ -1088,36 +376,36 @@
1088376 					      67 IRQ_TYPE_LEVEL_HIGH 3>;        /* Queue 2 */
1089377 				#address-cells = <1>;
1090378 				#size-cells = <0>;
1091
-				clocks = <&macb0_clk>, <&macb0_clk>;
379
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>;
1092380 				clock-names = "hclk", "pclk";
1093381 				status = "disabled";
1094382 			};
1095383 
1096384 			tcb0: timer@f800c000 {
1097
-				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
385
+				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
1098386 				#address-cells = <1>;
1099387 				#size-cells = <0>;
1100388 				reg = <0xf800c000 0x100>;
1101389 				interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
1102
-				clocks = <&tcb0_clk>, <&clk32k>;
1103
-				clock-names = "t0_clk", "slow_clk";
390
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>;
391
+				clock-names = "t0_clk", "gclk", "slow_clk";
1104392 			};
1105393 
1106394 			tcb1: timer@f8010000 {
1107
-				compatible = "atmel,at91sam9x5-tcb", "simple-mfd", "syscon";
395
+				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
1108396 				#address-cells = <1>;
1109397 				#size-cells = <0>;
1110398 				reg = <0xf8010000 0x100>;
1111399 				interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
1112
-				clocks = <&tcb1_clk>, <&clk32k>;
1113
-				clock-names = "t0_clk", "slow_clk";
400
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>;
401
+				clock-names = "t0_clk", "gclk", "slow_clk";
1114402 			};
1115403 
1116404 			hsmc: hsmc@f8014000 {
1117405 				compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
1118406 				reg = <0xf8014000 0x1000>;
1119407 				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
1120
-				clocks = <&hsmc_clk>;
408
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
1121409 				#address-cells = <1>;
1122410 				#size-cells = <1>;
1123411 				ranges;
....@@ -1125,7 +413,7 @@
1125413 				pmecc: ecc-engine@f8014070 {
1126414 					compatible = "atmel,sama5d2-pmecc";
1127415 					reg = <0xf8014070 0x490>,
1128
-					      <0xf8014500 0x100>;
416
+					      <0xf8014500 0x200>;
1129417 				};
1130418 			};
1131419 
....@@ -1137,7 +425,7 @@
1137425 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
1138426 					| AT91_XDMAC_DT_PERID(50))>;
1139427 				dma-names = "rx";
1140
-				clocks = <&pdmic_clk>, <&pdmic_gclk>;
428
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 48>, <&pmc PMC_TYPE_GCK 48>;
1141429 				clock-names = "pclk", "gclk";
1142430 				status = "disabled";
1143431 			};
....@@ -1153,7 +441,7 @@
1153441 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1154442 					 AT91_XDMAC_DT_PERID(36))>;
1155443 				dma-names = "tx", "rx";
1156
-				clocks = <&uart0_clk>;
444
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
1157445 				clock-names = "usart";
1158446 				status = "disabled";
1159447 			};
....@@ -1169,7 +457,7 @@
1169457 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1170458 					 AT91_XDMAC_DT_PERID(38))>;
1171459 				dma-names = "tx", "rx";
1172
-				clocks = <&uart1_clk>;
460
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
1173461 				clock-names = "usart";
1174462 				status = "disabled";
1175463 			};
....@@ -1185,7 +473,7 @@
1185473 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1186474 					 AT91_XDMAC_DT_PERID(40))>;
1187475 				dma-names = "tx", "rx";
1188
-				clocks = <&uart2_clk>;
476
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
1189477 				clock-names = "usart";
1190478 				status = "disabled";
1191479 			};
....@@ -1203,7 +491,7 @@
1203491 				dma-names = "tx", "rx";
1204492 				#address-cells = <1>;
1205493 				#size-cells = <0>;
1206
-				clocks = <&twi0_clk>;
494
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
1207495 				atmel,fifo-size = <16>;
1208496 				status = "disabled";
1209497 			};
....@@ -1213,7 +501,8 @@
1213501 				reg = <0xf802c000 0x4000>;
1214502 				interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>;
1215503 				#pwm-cells = <3>;
1216
-				clocks = <&pwm_clk>;
504
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
505
+				status = "disabled";
1217506 			};
1218507 
1219508 			sfr: sfr@f8030000 {
....@@ -1224,40 +513,160 @@
1224513 			flx0: flexcom@f8034000 {
1225514 				compatible = "atmel,sama5d2-flexcom";
1226515 				reg = <0xf8034000 0x200>;
1227
-				clocks = <&flx0_clk>;
516
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
1228517 				#address-cells = <1>;
1229518 				#size-cells = <1>;
1230519 				ranges = <0x0 0xf8034000 0x800>;
1231520 				status = "disabled";
521
+
522
+				uart5: serial@200 {
523
+					compatible = "atmel,at91sam9260-usart";
524
+					reg = <0x200 0x200>;
525
+					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
526
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
527
+					clock-names = "usart";
528
+					dmas = <&dma0
529
+						(AT91_XDMAC_DT_MEM_IF(0) |
530
+						 AT91_XDMAC_DT_PER_IF(1) |
531
+						 AT91_XDMAC_DT_PERID(11))>,
532
+					       <&dma0
533
+						(AT91_XDMAC_DT_MEM_IF(0) |
534
+						 AT91_XDMAC_DT_PER_IF(1) |
535
+						 AT91_XDMAC_DT_PERID(12))>;
536
+					dma-names = "tx", "rx";
537
+					atmel,fifo-size = <32>;
538
+					status = "disabled";
539
+				};
540
+
541
+				spi2: spi@400 {
542
+					compatible = "atmel,at91rm9200-spi";
543
+					reg = <0x400 0x200>;
544
+					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
545
+					#address-cells = <1>;
546
+					#size-cells = <0>;
547
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
548
+					clock-names = "spi_clk";
549
+					dmas = <&dma0
550
+						(AT91_XDMAC_DT_MEM_IF(0) |
551
+						 AT91_XDMAC_DT_PER_IF(1) |
552
+						 AT91_XDMAC_DT_PERID(11))>,
553
+					       <&dma0
554
+						(AT91_XDMAC_DT_MEM_IF(0) |
555
+						 AT91_XDMAC_DT_PER_IF(1) |
556
+						 AT91_XDMAC_DT_PERID(12))>;
557
+					dma-names = "tx", "rx";
558
+					atmel,fifo-size = <16>;
559
+					status = "disabled";
560
+				};
561
+
562
+				i2c2: i2c@600 {
563
+					compatible = "atmel,sama5d2-i2c";
564
+					reg = <0x600 0x200>;
565
+					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
566
+					#address-cells = <1>;
567
+					#size-cells = <0>;
568
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
569
+					dmas = <&dma0
570
+						(AT91_XDMAC_DT_MEM_IF(0) |
571
+						 AT91_XDMAC_DT_PER_IF(1) |
572
+						 AT91_XDMAC_DT_PERID(11))>,
573
+					       <&dma0
574
+						(AT91_XDMAC_DT_MEM_IF(0) |
575
+						 AT91_XDMAC_DT_PER_IF(1) |
576
+						 AT91_XDMAC_DT_PERID(12))>;
577
+					dma-names = "tx", "rx";
578
+					atmel,fifo-size = <16>;
579
+					status = "disabled";
580
+				};
1232581 			};
1233582 
1234583 			flx1: flexcom@f8038000 {
1235584 				compatible = "atmel,sama5d2-flexcom";
1236585 				reg = <0xf8038000 0x200>;
1237
-				clocks = <&flx1_clk>;
586
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
1238587 				#address-cells = <1>;
1239588 				#size-cells = <1>;
1240589 				ranges = <0x0 0xf8038000 0x800>;
1241590 				status = "disabled";
591
+
592
+				uart6: serial@200 {
593
+					compatible = "atmel,at91sam9260-usart";
594
+					reg = <0x200 0x200>;
595
+					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
596
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
597
+					clock-names = "usart";
598
+					dmas = <&dma0
599
+						(AT91_XDMAC_DT_MEM_IF(0) |
600
+						 AT91_XDMAC_DT_PER_IF(1) |
601
+						 AT91_XDMAC_DT_PERID(13))>,
602
+					       <&dma0
603
+						(AT91_XDMAC_DT_MEM_IF(0) |
604
+						 AT91_XDMAC_DT_PER_IF(1) |
605
+						 AT91_XDMAC_DT_PERID(14))>;
606
+					dma-names = "tx", "rx";
607
+					atmel,fifo-size = <32>;
608
+					status = "disabled";
609
+				};
610
+
611
+				spi3: spi@400 {
612
+					compatible = "atmel,at91rm9200-spi";
613
+					reg = <0x400 0x200>;
614
+					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
615
+					#address-cells = <1>;
616
+					#size-cells = <0>;
617
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
618
+					clock-names = "spi_clk";
619
+					dmas = <&dma0
620
+						(AT91_XDMAC_DT_MEM_IF(0) |
621
+						 AT91_XDMAC_DT_PER_IF(1) |
622
+						 AT91_XDMAC_DT_PERID(13))>,
623
+					       <&dma0
624
+						(AT91_XDMAC_DT_MEM_IF(0) |
625
+						 AT91_XDMAC_DT_PER_IF(1) |
626
+						 AT91_XDMAC_DT_PERID(14))>;
627
+					dma-names = "tx", "rx";
628
+					atmel,fifo-size = <16>;
629
+					status = "disabled";
630
+				};
631
+
632
+				i2c3: i2c@600 {
633
+					compatible = "atmel,sama5d2-i2c";
634
+					reg = <0x600 0x200>;
635
+					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
636
+					#address-cells = <1>;
637
+					#size-cells = <0>;
638
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
639
+					dmas = <&dma0
640
+						(AT91_XDMAC_DT_MEM_IF(0) |
641
+						 AT91_XDMAC_DT_PER_IF(1) |
642
+						 AT91_XDMAC_DT_PERID(13))>,
643
+					       <&dma0
644
+						(AT91_XDMAC_DT_MEM_IF(0) |
645
+						 AT91_XDMAC_DT_PER_IF(1) |
646
+						 AT91_XDMAC_DT_PERID(14))>;
647
+					dma-names = "tx", "rx";
648
+					atmel,fifo-size = <16>;
649
+					status = "disabled";
650
+				};
1242651 			};
1243652 
1244653 			securam: sram@f8044000 {
1245654 				compatible = "atmel,sama5d2-securam", "mmio-sram";
1246655 				reg = <0xf8044000 0x1420>;
1247
-				clocks = <&securam_clk>;
656
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 51>;
1248657 				#address-cells = <1>;
1249658 				#size-cells = <1>;
1250659 				no-memory-wc;
1251660 				ranges = <0 0xf8044000 0x1420>;
1252661 			};
1253662 
1254
-			rstc@f8048000 {
663
+			reset_controller: rstc@f8048000 {
1255664 				compatible = "atmel,sama5d3-rstc";
1256665 				reg = <0xf8048000 0x10>;
1257666 				clocks = <&clk32k>;
1258667 			};
1259668 
1260
-			shdwc@f8048010 {
669
+			shutdown_controller: shdwc@f8048010 {
1261670 				compatible = "atmel,sama5d2-shdwc";
1262671 				reg = <0xf8048010 0x10>;
1263672 				clocks = <&clk32k>;
....@@ -1270,10 +679,10 @@
1270679 				compatible = "atmel,at91sam9260-pit";
1271680 				reg = <0xf8048030 0x10>;
1272681 				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
1273
-				clocks = <&h32ck>;
682
+				clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
1274683 			};
1275684 
1276
-			watchdog@f8048040 {
685
+			watchdog: watchdog@f8048040 {
1277686 				compatible = "atmel,sama5d4-wdt";
1278687 				reg = <0xf8048040 0x10>;
1279688 				interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
....@@ -1289,11 +698,29 @@
1289698 				#clock-cells = <0>;
1290699 			};
1291700 
1292
-			rtc@f80480b0 {
1293
-				compatible = "atmel,at91rm9200-rtc";
701
+			rtc: rtc@f80480b0 {
702
+				compatible = "atmel,sama5d2-rtc";
1294703 				reg = <0xf80480b0 0x30>;
1295704 				interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
1296705 				clocks = <&clk32k>;
706
+			};
707
+
708
+			i2s0: i2s@f8050000 {
709
+				compatible = "atmel,sama5d2-i2s";
710
+				reg = <0xf8050000 0x100>;
711
+				interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
712
+				dmas = <&dma0
713
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
714
+					 AT91_XDMAC_DT_PERID(31))>,
715
+				       <&dma0
716
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
717
+					 AT91_XDMAC_DT_PERID(32))>;
718
+				dma-names = "tx", "rx";
719
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_GCK 54>;
720
+				clock-names = "pclk", "gclk";
721
+				assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S0_MUX>;
722
+				assigned-clock-parents = <&pmc PMC_TYPE_GCK 54>;
723
+				status = "disabled";
1297724 			};
1298725 
1299726 			can0: can@f8054000 {
....@@ -1303,10 +730,10 @@
1303730 				interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>,
1304731 					     <64 IRQ_TYPE_LEVEL_HIGH 7>;
1305732 				interrupt-names = "int0", "int1";
1306
-				clocks = <&can0_clk>, <&can0_gclk>;
733
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>;
1307734 				clock-names = "hclk", "cclk";
1308
-				assigned-clocks = <&can0_gclk>;
1309
-				assigned-clock-parents = <&utmi>;
735
+				assigned-clocks = <&pmc PMC_TYPE_GCK 56>;
736
+				assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
1310737 				assigned-clock-rates = <40000000>;
1311738 				bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
1312739 				status = "disabled";
....@@ -1323,7 +750,7 @@
1323750 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1324751 					 AT91_XDMAC_DT_PERID(9))>;
1325752 				dma-names = "tx", "rx";
1326
-				clocks = <&spi1_clk>;
753
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
1327754 				clock-names = "spi_clk";
1328755 				atmel,fifo-size = <16>;
1329756 				#address-cells = <1>;
....@@ -1342,7 +769,7 @@
1342769 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1343770 					 AT91_XDMAC_DT_PERID(42))>;
1344771 				dma-names = "tx", "rx";
1345
-				clocks = <&uart3_clk>;
772
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
1346773 				clock-names = "usart";
1347774 				status = "disabled";
1348775 			};
....@@ -1358,7 +785,7 @@
1358785 					 AT91_XDMAC_DT_PERID(44))>;
1359786 				dma-names = "tx", "rx";
1360787 				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
1361
-				clocks = <&uart4_clk>;
788
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
1362789 				clock-names = "usart";
1363790 				status = "disabled";
1364791 			};
....@@ -1366,38 +793,219 @@
1366793 			flx2: flexcom@fc010000 {
1367794 				compatible = "atmel,sama5d2-flexcom";
1368795 				reg = <0xfc010000 0x200>;
1369
-				clocks = <&flx2_clk>;
796
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
1370797 				#address-cells = <1>;
1371798 				#size-cells = <1>;
1372799 				ranges = <0x0 0xfc010000 0x800>;
1373800 				status = "disabled";
801
+
802
+				uart7: serial@200 {
803
+					compatible = "atmel,at91sam9260-usart";
804
+					reg = <0x200 0x200>;
805
+					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
806
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
807
+					clock-names = "usart";
808
+					dmas = <&dma0
809
+						(AT91_XDMAC_DT_MEM_IF(0) |
810
+						 AT91_XDMAC_DT_PER_IF(1) |
811
+						 AT91_XDMAC_DT_PERID(15))>,
812
+						<&dma0
813
+						(AT91_XDMAC_DT_MEM_IF(0) |
814
+						 AT91_XDMAC_DT_PER_IF(1) |
815
+						 AT91_XDMAC_DT_PERID(16))>;
816
+					dma-names = "tx", "rx";
817
+					atmel,fifo-size = <32>;
818
+					status = "disabled";
819
+				};
820
+
821
+				spi4: spi@400 {
822
+					compatible = "atmel,at91rm9200-spi";
823
+					reg = <0x400 0x200>;
824
+					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
825
+					#address-cells = <1>;
826
+					#size-cells = <0>;
827
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
828
+					clock-names = "spi_clk";
829
+					dmas = <&dma0
830
+						(AT91_XDMAC_DT_MEM_IF(0) |
831
+						 AT91_XDMAC_DT_PER_IF(1) |
832
+						 AT91_XDMAC_DT_PERID(15))>,
833
+						<&dma0
834
+						(AT91_XDMAC_DT_MEM_IF(0) |
835
+						 AT91_XDMAC_DT_PER_IF(1) |
836
+						 AT91_XDMAC_DT_PERID(16))>;
837
+					dma-names = "tx", "rx";
838
+					atmel,fifo-size = <16>;
839
+					status = "disabled";
840
+				};
841
+
842
+				i2c4: i2c@600 {
843
+					compatible = "atmel,sama5d2-i2c";
844
+					reg = <0x600 0x200>;
845
+					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
846
+					#address-cells = <1>;
847
+					#size-cells = <0>;
848
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
849
+					dmas = <&dma0
850
+						(AT91_XDMAC_DT_MEM_IF(0) |
851
+						 AT91_XDMAC_DT_PER_IF(1) |
852
+						 AT91_XDMAC_DT_PERID(15))>,
853
+						<&dma0
854
+						(AT91_XDMAC_DT_MEM_IF(0) |
855
+						 AT91_XDMAC_DT_PER_IF(1) |
856
+						 AT91_XDMAC_DT_PERID(16))>;
857
+					dma-names = "tx", "rx";
858
+					atmel,fifo-size = <16>;
859
+					status = "disabled";
860
+				};
1374861 			};
1375862 
1376863 			flx3: flexcom@fc014000 {
1377864 				compatible = "atmel,sama5d2-flexcom";
1378865 				reg = <0xfc014000 0x200>;
1379
-				clocks = <&flx3_clk>;
866
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
1380867 				#address-cells = <1>;
1381868 				#size-cells = <1>;
1382869 				ranges = <0x0 0xfc014000 0x800>;
1383870 				status = "disabled";
871
+
872
+				uart8: serial@200 {
873
+					compatible = "atmel,at91sam9260-usart";
874
+					reg = <0x200 0x200>;
875
+					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
876
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
877
+					clock-names = "usart";
878
+					dmas = <&dma0
879
+						(AT91_XDMAC_DT_MEM_IF(0) |
880
+						 AT91_XDMAC_DT_PER_IF(1) |
881
+						 AT91_XDMAC_DT_PERID(17))>,
882
+					       <&dma0
883
+						(AT91_XDMAC_DT_MEM_IF(0) |
884
+						 AT91_XDMAC_DT_PER_IF(1) |
885
+						 AT91_XDMAC_DT_PERID(18))>;
886
+					dma-names = "tx", "rx";
887
+					atmel,fifo-size = <32>;
888
+					status = "disabled";
889
+				};
890
+
891
+				spi5: spi@400 {
892
+					compatible = "atmel,at91rm9200-spi";
893
+					reg = <0x400 0x200>;
894
+					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
895
+					#address-cells = <1>;
896
+					#size-cells = <0>;
897
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
898
+					clock-names = "spi_clk";
899
+					dmas = <&dma0
900
+						(AT91_XDMAC_DT_MEM_IF(0) |
901
+						 AT91_XDMAC_DT_PER_IF(1) |
902
+						 AT91_XDMAC_DT_PERID(17))>,
903
+					       <&dma0
904
+						(AT91_XDMAC_DT_MEM_IF(0) |
905
+						 AT91_XDMAC_DT_PER_IF(1) |
906
+						 AT91_XDMAC_DT_PERID(18))>;
907
+					dma-names = "tx", "rx";
908
+					atmel,fifo-size = <16>;
909
+					status = "disabled";
910
+				};
911
+
912
+				i2c5: i2c@600 {
913
+					compatible = "atmel,sama5d2-i2c";
914
+					reg = <0x600 0x200>;
915
+					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
916
+					#address-cells = <1>;
917
+					#size-cells = <0>;
918
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
919
+					dmas = <&dma0
920
+						(AT91_XDMAC_DT_MEM_IF(0) |
921
+						 AT91_XDMAC_DT_PER_IF(1) |
922
+						 AT91_XDMAC_DT_PERID(17))>,
923
+					       <&dma0
924
+						(AT91_XDMAC_DT_MEM_IF(0) |
925
+						 AT91_XDMAC_DT_PER_IF(1) |
926
+						 AT91_XDMAC_DT_PERID(18))>;
927
+					dma-names = "tx", "rx";
928
+					atmel,fifo-size = <16>;
929
+					status = "disabled";
930
+				};
931
+
1384932 			};
1385933 
1386934 			flx4: flexcom@fc018000 {
1387935 				compatible = "atmel,sama5d2-flexcom";
1388936 				reg = <0xfc018000 0x200>;
1389
-				clocks = <&flx4_clk>;
937
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
1390938 				#address-cells = <1>;
1391939 				#size-cells = <1>;
1392940 				ranges = <0x0 0xfc018000 0x800>;
1393941 				status = "disabled";
942
+
943
+				uart9: serial@200 {
944
+					compatible = "atmel,at91sam9260-usart";
945
+					reg = <0x200 0x200>;
946
+					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
947
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
948
+					clock-names = "usart";
949
+					dmas = <&dma0
950
+						(AT91_XDMAC_DT_MEM_IF(0) |
951
+						 AT91_XDMAC_DT_PER_IF(1) |
952
+						 AT91_XDMAC_DT_PERID(19))>,
953
+					       <&dma0
954
+						(AT91_XDMAC_DT_MEM_IF(0) |
955
+						 AT91_XDMAC_DT_PER_IF(1) |
956
+						 AT91_XDMAC_DT_PERID(20))>;
957
+					dma-names = "tx", "rx";
958
+					atmel,fifo-size = <32>;
959
+					status = "disabled";
960
+				};
961
+
962
+				spi6: spi@400 {
963
+					compatible = "atmel,at91rm9200-spi";
964
+					reg = <0x400 0x200>;
965
+					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
966
+					#address-cells = <1>;
967
+					#size-cells = <0>;
968
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
969
+					clock-names = "spi_clk";
970
+					dmas = <&dma0
971
+						(AT91_XDMAC_DT_MEM_IF(0) |
972
+						 AT91_XDMAC_DT_PER_IF(1) |
973
+						 AT91_XDMAC_DT_PERID(19))>,
974
+					       <&dma0
975
+						(AT91_XDMAC_DT_MEM_IF(0) |
976
+						 AT91_XDMAC_DT_PER_IF(1) |
977
+						 AT91_XDMAC_DT_PERID(20))>;
978
+					dma-names = "tx", "rx";
979
+					atmel,fifo-size = <16>;
980
+					status = "disabled";
981
+				};
982
+
983
+				i2c6: i2c@600 {
984
+					compatible = "atmel,sama5d2-i2c";
985
+					reg = <0x600 0x200>;
986
+					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
987
+					#address-cells = <1>;
988
+					#size-cells = <0>;
989
+					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
990
+					dmas = <&dma0
991
+						(AT91_XDMAC_DT_MEM_IF(0) |
992
+						 AT91_XDMAC_DT_PER_IF(1) |
993
+						 AT91_XDMAC_DT_PERID(19))>,
994
+					       <&dma0
995
+						(AT91_XDMAC_DT_MEM_IF(0) |
996
+						 AT91_XDMAC_DT_PER_IF(1) |
997
+						 AT91_XDMAC_DT_PERID(20))>;
998
+					dma-names = "tx", "rx";
999
+					atmel,fifo-size = <16>;
1000
+					status = "disabled";
1001
+				};
13941002 			};
13951003 
13961004 			trng@fc01c000 {
13971005 				compatible = "atmel,at91sam9g45-trng";
13981006 				reg = <0xfc01c000 0x100>;
13991007 				interrupts = <47 IRQ_TYPE_LEVEL_HIGH 0>;
1400
-				clocks = <&trng_clk>;
1008
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
14011009 			};
14021010 
14031011 			aic: interrupt-controller@fc020000 {
....@@ -1421,7 +1029,7 @@
14211029 				dma-names = "tx", "rx";
14221030 				#address-cells = <1>;
14231031 				#size-cells = <0>;
1424
-				clocks = <&twi1_clk>;
1032
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
14251033 				atmel,fifo-size = <16>;
14261034 				status = "disabled";
14271035 			};
....@@ -1430,7 +1038,7 @@
14301038 				compatible = "atmel,sama5d2-adc";
14311039 				reg = <0xfc030000 0x100>;
14321040 				interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
1433
-				clocks = <&adc_clk>;
1041
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
14341042 				clock-names = "adc_clk";
14351043 				dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
14361044 				dma-names = "rx";
....@@ -1438,6 +1046,17 @@
14381046 				atmel,max-sample-rate-hz = <20000000>;
14391047 				atmel,startup-time-ms = <4>;
14401048 				atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
1049
+				#io-channel-cells = <1>;
1050
+				status = "disabled";
1051
+			};
1052
+
1053
+			resistive_touch: resistive-touch {
1054
+				compatible = "resistive-adc-touch";
1055
+				io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>,
1056
+					      <&adc AT91_SAMA5D2_ADC_Y_CHANNEL>,
1057
+					      <&adc AT91_SAMA5D2_ADC_P_CHANNEL>;
1058
+				io-channel-names = "x", "y", "pressure";
1059
+				touchscreen-min-pressure = <50000>;
14411060 				status = "disabled";
14421061 			};
14431062 
....@@ -1452,12 +1071,15 @@
14521071 				#interrupt-cells = <2>;
14531072 				gpio-controller;
14541073 				#gpio-cells = <2>;
1455
-				clocks = <&pioA_clk>;
1074
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
14561075 			};
14571076 
1458
-			secumod@fc040000 {
1077
+			pioBU: secumod@fc040000 {
14591078 				compatible = "atmel,sama5d2-secumod", "syscon";
14601079 				reg = <0xfc040000 0x100>;
1080
+
1081
+				gpio-controller;
1082
+				#gpio-cells = <2>;
14611083 			};
14621084 
14631085 			tdes@fc044000 {
....@@ -1471,7 +1093,7 @@
14711093 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
14721094 					 AT91_XDMAC_DT_PERID(29))>;
14731095 				dma-names = "tx", "rx";
1474
-				clocks = <&tdes_clk>;
1096
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
14751097 				clock-names = "tdes_clk";
14761098 				status = "okay";
14771099 			};
....@@ -1484,8 +1106,26 @@
14841106 					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
14851107 					 AT91_XDMAC_DT_PERID(47))>;
14861108 				dma-names = "tx";
1487
-				clocks = <&classd_clk>, <&classd_gclk>;
1109
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>;
14881110 				clock-names = "pclk", "gclk";
1111
+				status = "disabled";
1112
+			};
1113
+
1114
+			i2s1: i2s@fc04c000 {
1115
+				compatible = "atmel,sama5d2-i2s";
1116
+				reg = <0xfc04c000 0x100>;
1117
+				interrupts = <55 IRQ_TYPE_LEVEL_HIGH 7>;
1118
+				dmas = <&dma0
1119
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1120
+					 AT91_XDMAC_DT_PERID(33))>,
1121
+				       <&dma0
1122
+					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1123
+					 AT91_XDMAC_DT_PERID(34))>;
1124
+				dma-names = "tx", "rx";
1125
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_GCK 55>;
1126
+				clock-names = "pclk", "gclk";
1127
+				assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
1128
+				assigned-clock-parents = <&pmc PMC_TYPE_GCK 55>;
14891129 				status = "disabled";
14901130 			};
14911131 
....@@ -1496,10 +1136,10 @@
14961136 				interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>,
14971137 					     <65 IRQ_TYPE_LEVEL_HIGH 7>;
14981138 				interrupt-names = "int0", "int1";
1499
-				clocks = <&can1_clk>, <&can1_gclk>;
1139
+				clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
15001140 				clock-names = "hclk", "cclk";
1501
-				assigned-clocks = <&can1_gclk>;
1502
-				assigned-clock-parents = <&utmi>;
1141
+				assigned-clocks = <&pmc PMC_TYPE_GCK 57>;
1142
+				assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
15031143 				assigned-clock-rates = <40000000>;
15041144 				bosch,mram-cfg = <0x1c00 0 0 64 0 0 32 32>;
15051145 				status = "disabled";