forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-05-10 23fa18eaa71266feff7ba8d83022d9e1cc83c65a 
 kernel/arch/arm/boot/dts/imx6sll.dtsi
....@@ -36,6 +36,8 @@
3636 		spi1 = &ecspi2;
3737 		spi3 = &ecspi3;
3838 		spi4 = &ecspi4;
39
+		usb0 = &usbotg1;
40
+		usb1 = &usbotg2;
3941 		usbphy0 = &usbphy1;
4042 		usbphy1 = &usbphy2;
4143 	};
....@@ -49,21 +51,20 @@
4951 			device_type = "cpu";
5052 			reg = <0>;
5153 			next-level-cache = <&L2>;
52
-			operating-points = <
54
+			operating-points =
5355 				/* kHz    uV */
54
-				996000  1275000
55
-				792000  1175000
56
-				396000  1075000
57
-				198000	975000
58
-			>;
59
-			fsl,soc-operating-points = <
56
+				<996000  1275000>,
57
+				<792000  1175000>,
58
+				<396000  1075000>,
59
+				<198000	  975000>;
60
+			fsl,soc-operating-points =
6061 				/* ARM kHz      SOC-PU uV */
61
-				996000          1175000
62
-				792000          1175000
63
-				396000          1175000
64
-				198000		1175000
65
-			>;
62
+				<996000         1175000>,
63
+				<792000         1175000>,
64
+				<396000         1175000>,
65
+				<198000		1175000>;
6666 			clock-latency = <61036>; /* two CLK32 periods */
67
+			#cooling-cells = <2>;
6768 			clocks = <&clks IMX6SLL_CLK_ARM>,
6869 				 <&clks IMX6SLL_CLK_PLL2_PFD2>,
6970 				 <&clks IMX6SLL_CLK_STEP>,
....@@ -71,16 +72,9 @@
7172 				 <&clks IMX6SLL_CLK_PLL1_SYS>;
7273 			clock-names = "arm", "pll2_pfd2_396m", "step",
7374 				      "pll1_sw", "pll1_sys";
75
+			nvmem-cells = <&cpu_speed_grade>;
76
+			nvmem-cell-names = "speed_grade";
7477 		};
75
-	};
76
-
77
-	intc: interrupt-controller@a01000 {
78
-		compatible = "arm,cortex-a9-gic";
79
-		#interrupt-cells = <3>;
80
-		interrupt-controller;
81
-		reg = <0x00a01000 0x1000>,
82
-		      <0x00a00100 0x100>;
83
-		interrupt-parent = <&intc>;
8478 	};
8579 
8680 	ckil: clock-ckil {
....@@ -111,16 +105,6 @@
111105 		clock-output-names = "ipp_di1";
112106 	};
113107 
114
-	tempmon: temperature-sensor {
115
-		compatible = "fsl,imx6sll-tempmon", "fsl,imx6sx-tempmon";
116
-		interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
117
-		interrupt-parent = <&gpc>;
118
-		fsl,tempmon = <&anatop>;
119
-		nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
120
-		nvmem-cell-names = "calib", "temp_grade";
121
-		clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>;
122
-	};
123
-
124108 	soc {
125109 		#address-cells = <1>;
126110 		#size-cells = <1>;
....@@ -131,9 +115,21 @@
131115 		ocram: sram@900000 {
132116 			compatible = "mmio-sram";
133117 			reg = <0x00900000 0x20000>;
118
+			ranges = <0 0x00900000 0x20000>;
119
+			#address-cells = <1>;
120
+			#size-cells = <1>;
134121 		};
135122 
136
-		L2: l2-cache@a02000 {
123
+		intc: interrupt-controller@a01000 {
124
+			compatible = "arm,cortex-a9-gic";
125
+			#interrupt-cells = <3>;
126
+			interrupt-controller;
127
+			reg = <0x00a01000 0x1000>,
128
+			      <0x00a00100 0x100>;
129
+			interrupt-parent = <&intc>;
130
+		};
131
+
132
+		L2: cache-controller@a02000 {
137133 			compatible = "arm,pl310-cache";
138134 			reg = <0x00a02000 0x1000>;
139135 			interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
....@@ -143,7 +139,7 @@
143139 			arm,data-latency = <4 2 3>;
144140 		};
145141 
146
-		aips1: aips-bus@2000000 {
142
+		aips1: bus@2000000 {
147143 			compatible = "fsl,aips-bus", "simple-bus";
148144 			#address-cells = <1>;
149145 			#size-cells = <1>;
....@@ -233,7 +229,7 @@
233229 					compatible = "fsl,imx6sl-uart", "fsl,imx6q-uart",
234230 						     "fsl,imx21-uart";
235231 					reg = <0x02018000 0x4000>;
236
-					interrupts =<GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
232
+					interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
237233 					dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
238234 					dma-names = "rx", "tx";
239235 					clocks = <&clks IMX6SLL_CLK_UART4_IPG>,
....@@ -268,7 +264,7 @@
268264 					status = "disabled";
269265 				};
270266 
271
-				ssi1: ssi-controller@2028000 {
267
+				ssi1: ssi@2028000 {
272268 					compatible = "fsl,imx6sl-ssi", "fsl,imx51-ssi";
273269 					reg = <0x02028000 0x4000>;
274270 					interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
....@@ -281,7 +277,7 @@
281277 					status = "disabled";
282278 				};
283279 
284
-				ssi2: ssi-controller@202c000 {
280
+				ssi2: ssi@202c000 {
285281 					compatible = "fsl,imx6sl-ssi", "fsl,imx51-ssi";
286282 					reg = <0x0202c000 0x4000>;
287283 					interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
....@@ -294,7 +290,7 @@
294290 					status = "disabled";
295291 				};
296292 
297
-				ssi3: ssi-controller@2030000 {
293
+				ssi3: ssi@2030000 {
298294 					compatible = "fsl,imx6sl-ssi", "fsl,imx51-ssi";
299295 					reg = <0x02030000 0x4000>;
300296 					interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
....@@ -328,7 +324,7 @@
328324 				clocks = <&clks IMX6SLL_CLK_PWM1>,
329325 					 <&clks IMX6SLL_CLK_PWM1>;
330326 				clock-names = "ipg", "per";
331
-				#pwm-cells = <2>;
327
+				#pwm-cells = <3>;
332328 			};
333329 
334330 			pwm2: pwm@2084000 {
....@@ -338,7 +334,7 @@
338334 				clocks = <&clks IMX6SLL_CLK_PWM2>,
339335 					 <&clks IMX6SLL_CLK_PWM2>;
340336 				clock-names = "ipg", "per";
341
-				#pwm-cells = <2>;
337
+				#pwm-cells = <3>;
342338 			};
343339 
344340 			pwm3: pwm@2088000 {
....@@ -348,7 +344,7 @@
348344 				clocks = <&clks IMX6SLL_CLK_PWM3>,
349345 					 <&clks IMX6SLL_CLK_PWM3>;
350346 				clock-names = "ipg", "per";
351
-				#pwm-cells = <2>;
347
+				#pwm-cells = <3>;
352348 			};
353349 
354350 			pwm4: pwm@208c000 {
....@@ -358,7 +354,7 @@
358354 				clocks = <&clks IMX6SLL_CLK_PWM4>,
359355 					 <&clks IMX6SLL_CLK_PWM4>;
360356 				clock-names = "ipg", "per";
361
-				#pwm-cells = <2>;
357
+				#pwm-cells = <3>;
362358 			};
363359 
364360 			gpt1: timer@2098000 {
....@@ -375,10 +371,12 @@
375371 				reg = <0x0209c000 0x4000>;
376372 				interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
377373 					     <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
374
+				clocks = <&clks IMX6SLL_CLK_GPIO1>;
378375 				gpio-controller;
379376 				#gpio-cells = <2>;
380377 				interrupt-controller;
381378 				#interrupt-cells = <2>;
379
+				gpio-ranges = <&iomuxc 0 94 7>, <&iomuxc 7 25 25>;
382380 			};
383381 
384382 			gpio2: gpio@20a0000 {
....@@ -386,10 +384,12 @@
386384 				reg = <0x020a0000 0x4000>;
387385 				interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
388386 					     <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
387
+				clocks = <&clks IMX6SLL_CLK_GPIO2>;
389388 				gpio-controller;
390389 				#gpio-cells = <2>;
391390 				interrupt-controller;
392391 				#interrupt-cells = <2>;
392
+				gpio-ranges = <&iomuxc 0 50 32>;
393393 			};
394394 
395395 			gpio3: gpio@20a4000 {
....@@ -397,10 +397,14 @@
397397 				reg = <0x020a4000 0x4000>;
398398 				interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
399399 					     <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
400
+				clocks = <&clks IMX6SLL_CLK_GPIO3>;
400401 				gpio-controller;
401402 				#gpio-cells = <2>;
402403 				interrupt-controller;
403404 				#interrupt-cells = <2>;
405
+				gpio-ranges = <&iomuxc 0 82 12>, <&iomuxc 12 103 4>,
406
+					      <&iomuxc 16 101 2>, <&iomuxc 18 5 1>,
407
+					      <&iomuxc 21 6 11>;
404408 			};
405409 
406410 			gpio4: gpio@20a8000 {
....@@ -408,10 +412,20 @@
408412 				reg = <0x020a8000 0x4000>;
409413 				interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
410414 					     <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
415
+				clocks = <&clks IMX6SLL_CLK_GPIO4>;
411416 				gpio-controller;
412417 				#gpio-cells = <2>;
413418 				interrupt-controller;
414419 				#interrupt-cells = <2>;
420
+				gpio-ranges = <&iomuxc 0 17 8>, <&iomuxc 8 107 8>,
421
+					      <&iomuxc 16 151 1>, <&iomuxc 17 149 1>,
422
+					      <&iomuxc 18 146 1>, <&iomuxc 19 144 1>,
423
+					      <&iomuxc 20 142 1>, <&iomuxc 21 143 1>,
424
+					      <&iomuxc 22 150 1>, <&iomuxc 23 148 1>,
425
+					      <&iomuxc 24 147 1>, <&iomuxc 25 145 1>,
426
+					      <&iomuxc 26 152 1>, <&iomuxc 27 125 1>,
427
+					      <&iomuxc 28 131 1>, <&iomuxc 29 134 1>,
428
+					      <&iomuxc 30 129 1>, <&iomuxc 31 133 1>;
415429 			};
416430 
417431 			gpio5: gpio@20ac000 {
....@@ -419,10 +433,22 @@
419433 				reg = <0x020ac000 0x4000>;
420434 				interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
421435 					     <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
436
+				clocks = <&clks IMX6SLL_CLK_GPIO5>;
422437 				gpio-controller;
423438 				#gpio-cells = <2>;
424439 				interrupt-controller;
425440 				#interrupt-cells = <2>;
441
+				gpio-ranges = <&iomuxc 0 135 1>, <&iomuxc 1 128 1>,
442
+					      <&iomuxc 2 132 1>, <&iomuxc 3 130 1>,
443
+					      <&iomuxc 4 127 1>, <&iomuxc 5 126 1>,
444
+					      <&iomuxc 6 120 1>, <&iomuxc 7 123 1>,
445
+					      <&iomuxc 8 118 1>, <&iomuxc 9 122 1>,
446
+					      <&iomuxc 10 124 1>, <&iomuxc 11 117 1>,
447
+					      <&iomuxc 12 121 1>, <&iomuxc 13 119 1>,
448
+					      <&iomuxc 14 116 1>, <&iomuxc 15 115 1>,
449
+					      <&iomuxc 16 140 2>, <&iomuxc 18 136 1>,
450
+					      <&iomuxc 19 138 1>, <&iomuxc 20 139 1>,
451
+					      <&iomuxc 21 137 1>;
426452 			};
427453 
428454 			gpio6: gpio@20b0000 {
....@@ -430,6 +456,7 @@
430456 				reg = <0x020b0000 0x4000>;
431457 				interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
432458 					     <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
459
+				clocks = <&clks IMX6SLL_CLK_GPIO6>;
433460 				gpio-controller;
434461 				#gpio-cells = <2>;
435462 				interrupt-controller;
....@@ -475,7 +502,7 @@
475502 			anatop: anatop@20c8000 {
476503 				compatible = "fsl,imx6sll-anatop",
477504 					     "fsl,imx6q-anatop",
478
-					     "syscon", "simple-bus";
505
+					     "syscon", "simple-mfd";
479506 				reg = <0x020c8000 0x4000>;
480507 				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
481508 					     <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
....@@ -497,6 +524,16 @@
497524 					anatop-max-voltage = <3400000>;
498525 					anatop-enable-bit = <0>;
499526 				};
527
+
528
+				tempmon: temperature-sensor {
529
+					compatible = "fsl,imx6sll-tempmon", "fsl,imx6sx-tempmon";
530
+					interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
531
+					interrupt-parent = <&gpc>;
532
+					fsl,tempmon = <&anatop>;
533
+					nvmem-cells = <&tempmon_calib>, <&tempmon_temp_grade>;
534
+					nvmem-cell-names = "calib", "temp_grade";
535
+					clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>;
536
+				};
500537 			};
501538 
502539 			usbphy1: usb-phy@20c9000 {
....@@ -515,7 +552,7 @@
515552 				reg = <0x020ca000 0x1000>;
516553 				interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
517554 				clocks = <&clks IMX6SLL_CLK_USBPHY2>;
518
-				phy-reg_3p0-supply = <&reg_3p0>;
555
+				phy-3p0-supply = <&reg_3p0>;
519556 				fsl,anatop = <&anatop>;
520557 			};
521558 
....@@ -536,6 +573,7 @@
536573 					regmap = <&snvs>;
537574 					offset = <0x38>;
538575 					mask = <0x61>;
576
+					status = "disabled";
539577 				};
540578 
541579 				snvs_pwrkey: snvs-powerkey {
....@@ -544,6 +582,7 @@
544582 					interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
545583 					linux,keycode = <KEY_POWER>;
546584 					wakeup-source;
585
+					status = "disabled";
547586 				};
548587 			};
549588 
....@@ -562,7 +601,6 @@
562601 				#interrupt-cells = <3>;
563602 				interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
564603 				interrupt-parent = <&intc>;
565
-				fsl,mf-mix-wakeup-irq = <0x7c00000 0x7d00 0x0 0x1400640>;
566604 			};
567605 
568606 			iomuxc: pinctrl@20e0000 {
....@@ -588,7 +626,7 @@
588626 			};
589627 
590628 			sdma: dma-controller@20ec000 {
591
-				compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma";
629
+				compatible = "fsl,imx6sll-sdma", "fsl,imx6ul-sdma";
592630 				reg = <0x020ec000 0x4000>;
593631 				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
594632 				clocks = <&clks IMX6SLL_CLK_IPG>,
....@@ -597,6 +635,15 @@
597635 				#dma-cells = <3>;
598636 				iram = <&ocram>;
599637 				fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
638
+			};
639
+
640
+			pxp: pxp@20f0000 {
641
+				compatible = "fsl,imx6sll-pxp", "fsl,imx6ull-pxp";
642
+				reg = <0x20f0000 0x4000>;
643
+				interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
644
+					<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
645
+				clocks = <&clks IMX6SLL_CLK_PXP>;
646
+				clock-names = "axi";
600647 			};
601648 
602649 			lcdif: lcd-controller@20f8000 {
....@@ -610,7 +657,7 @@
610657 				status = "disabled";
611658 			};
612659 
613
-			dcp: dcp@20fc000 {
660
+			dcp: crypto@20fc000 {
614661 				compatible = "fsl,imx28-dcp";
615662 				reg = <0x020fc000 0x4000>;
616663 				interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
....@@ -621,7 +668,7 @@
621668 			};
622669 		};
623670 
624
-		aips2: aips-bus@2100000 {
671
+		aips2: bus@2100000 {
625672 			compatible = "fsl,aips-bus", "simple-bus";
626673 			#address-cells = <1>;
627674 			#size-cells = <1>;
....@@ -739,14 +786,26 @@
739786 			mmdc: memory-controller@21b0000 {
740787 				compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc";
741788 				reg = <0x021b0000 0x4000>;
789
+				clocks = <&clks IMX6SLL_CLK_MMDC_P0_IPG>;
742790 			};
743791 
744
-			ocotp: ocotp-ctrl@21bc000 {
792
+			rngb: rng@21b4000 {
793
+				compatible = "fsl,imx6sll-rngb", "fsl,imx25-rngb";
794
+				reg = <0x021b4000 0x4000>;
795
+				interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
796
+				clocks = <&clks IMX6SLL_CLK_DUMMY>;
797
+			};
798
+
799
+			ocotp: efuse@21bc000 {
745800 				#address-cells = <1>;
746801 				#size-cells = <1>;
747802 				compatible = "fsl,imx6sll-ocotp", "syscon";
748803 				reg = <0x021bc000 0x4000>;
749804 				clocks = <&clks IMX6SLL_CLK_OCOTP>;
805
+
806
+				cpu_speed_grade: speed-grade@10 {
807
+					reg = <0x10 4>;
808
+				};
750809 
751810 				tempmon_calib: calib@38 {
752811 					reg = <0x38 4>;
....@@ -767,7 +826,7 @@
767826 				compatible = "fsl,imx6sll-uart", "fsl,imx6q-uart",
768827 					     "fsl,imx21-uart";
769828 				reg = <0x021f4000 0x4000>;
770
-				interrupts =<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
829
+				interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
771830 				dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
772831 				dma-names = "rx", "tx";
773832 				clocks = <&clks IMX6SLL_CLK_UART5_IPG>,