audio ok

hc

2023-12-11 223293205a7265c8b02882461ba8996650048ade

 kernel/include/uapi/linux/rk-camera-module.h
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@@ -8,11 +8,12 @@
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 #define _UAPI_RKMODULE_CAMERA_H
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 #include <linux/types.h>
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+#include <linux/rk-video-format.h>
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 #define RKMODULE_API_VERSION		KERNEL_VERSION(0, 1, 0x2)
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 /* using for rk3588 dual isp unite */
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-#define RKMOUDLE_UNITE_EXTEND_PIXEL	32
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+#define RKMOUDLE_UNITE_EXTEND_PIXEL	128
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 /* using for rv1109 and rv1126 */
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 #define RKMODULE_EXTEND_LINE		24
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@@ -169,14 +170,20 @@
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 #define RKMODULE_GET_READOUT_LINE_CNT_PER_LINE  \
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 	_IOR('V', BASE_VIDIOC_PRIVATE + 36, __u32)
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+#define RKMODULE_GET_GROUP_ID       \
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+	_IOR('V', BASE_VIDIOC_PRIVATE + 37, __u32)
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+
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+#define RKMODULE_SET_GROUP_ID       \
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+	_IOW('V', BASE_VIDIOC_PRIVATE + 38, __u32)
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+
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 struct rkmodule_i2cdev_info {
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-	u8 slave_addr;
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+	__u8 slave_addr;
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 } __attribute__ ((packed));
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 struct rkmodule_dev_info {
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 	union {
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 		struct rkmodule_i2cdev_info i2c_dev;
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-		u32 reserved[8];
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+		__u32 reserved[8];
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 	};
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 } __attribute__ ((packed));
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@@ -653,6 +660,29 @@
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 } __attribute__ ((packed));
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 /*
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+ * link to vicap
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+ * linear mode: pad0~pad3 for id0~id3;
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+ *
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+ * HDR_X2: id0 fiexd to vc0 for long frame
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+ *         id1 fixed to vc1 for short frame;
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+ *         id2~id3 reserved, can config by PAD2~PAD3
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+ *
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+ * HDR_X3: id0 fiexd to vc0 for long frame
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+ *         id1 fixed to vc1 for middle frame
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+ *         id2 fixed to vc2 for short frame;
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+ *         id3 reserved, can config by PAD3
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+ *
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+ * link to isp, the connection relationship is as follows
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+ */
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+enum rkmodule_max_pad {
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+	PAD0, /* link to isp */
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+	PAD1, /* link to csi wr0 | hdr x2:L x3:M */
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+	PAD2, /* link to csi wr1 | hdr      x3:L */
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+	PAD3, /* link to csi wr2 | hdr x2:M x3:S */
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+	PAD_MAX,
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+};
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+
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+/*
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  * sensor exposure sync mode
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  */
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 enum rkmodule_sync_mode {
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@@ -663,10 +693,10 @@
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 };
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 struct rkmodule_mclk_data {
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-	u32 enable;
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-	u32 mclk_index;
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-	u32 mclk_rate;
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-	u32 reserved[8];
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+	__u32 enable;
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+	__u32 mclk_index;
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+	__u32 mclk_rate;
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+	__u32 reserved[8];
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 };
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 /*
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@@ -716,14 +746,14 @@
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 };
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 struct rkmodule_csi_dphy_param {
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-	u32 vendor;
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-	u32 lp_vol_ref;
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-	u32 lp_hys_sw[DPHY_MAX_LANE];
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-	u32 lp_escclk_pol_sel[DPHY_MAX_LANE];
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-	u32 skew_data_cal_clk[DPHY_MAX_LANE];
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-	u32 clk_hs_term_sel;
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-	u32 data_hs_term_sel[DPHY_MAX_LANE];
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-	u32 reserved[32];
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+	__u32 vendor;
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+	__u32 lp_vol_ref;
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+	__u32 lp_hys_sw[DPHY_MAX_LANE];
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+	__u32 lp_escclk_pol_sel[DPHY_MAX_LANE];
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+	__u32 skew_data_cal_clk[DPHY_MAX_LANE];
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+	__u32 clk_hs_term_sel;
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+	__u32 data_hs_term_sel[DPHY_MAX_LANE];
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+	__u32 reserved[32];
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 };
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 struct rkmodule_sensor_fmt {