forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2023-12-11 223293205a7265c8b02882461ba8996650048ade 
 kernel/drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
....@@ -166,6 +166,7 @@
166166 	XGBE_PORT_MODE_10GBASE_T,
167167 	XGBE_PORT_MODE_10GBASE_R,
168168 	XGBE_PORT_MODE_SFP,
169
+	XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG,
169170 	XGBE_PORT_MODE_MAX,
170171 };
171172 
....@@ -238,6 +239,7 @@
238239 #define XGBE_SFP_BASE_BR_1GBE_MAX		0x0d
239240 #define XGBE_SFP_BASE_BR_10GBE_MIN		0x64
240241 #define XGBE_SFP_BASE_BR_10GBE_MAX		0x68
242
+#define XGBE_MOLEX_SFP_BASE_BR_10GBE_MAX	0x78
241243 
242244 #define XGBE_SFP_BASE_CU_CABLE_LEN		18
243245 
....@@ -282,6 +284,8 @@
282284 
283285 #define XGBE_BEL_FUSE_VENDOR	"BEL-FUSE        "
284286 #define XGBE_BEL_FUSE_PARTNO	"1GBT-SFP06      "
287
+
288
+#define XGBE_MOLEX_VENDOR	"Molex Inc.      "
285289 
286290 struct xgbe_sfp_ascii {
287291 	union {
....@@ -833,7 +837,11 @@
833837 		break;
834838 	case XGBE_SFP_SPEED_10000:
835839 		min = XGBE_SFP_BASE_BR_10GBE_MIN;
836
-		max = XGBE_SFP_BASE_BR_10GBE_MAX;
840
+		if (memcmp(&sfp_eeprom->base[XGBE_SFP_BASE_VENDOR_NAME],
841
+			   XGBE_MOLEX_VENDOR, XGBE_SFP_BASE_VENDOR_NAME_LEN) == 0)
842
+			max = XGBE_MOLEX_SFP_BASE_BR_10GBE_MAX;
843
+		else
844
+			max = XGBE_SFP_BASE_BR_10GBE_MAX;
837845 		break;
838846 	default:
839847 		return false;
....@@ -857,6 +865,7 @@
857865 
858866 static bool xgbe_phy_finisar_phy_quirks(struct xgbe_prv_data *pdata)
859867 {
868
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
860869 	struct xgbe_phy_data *phy_data = pdata->phy_data;
861870 	unsigned int phy_id = phy_data->phydev->phy_id;
862871 
....@@ -878,9 +887,16 @@
878887 	phy_write(phy_data->phydev, 0x04, 0x0d01);
879888 	phy_write(phy_data->phydev, 0x00, 0x9140);
880889 
881
-	phy_data->phydev->supported = PHY_GBIT_FEATURES;
882
-	phy_data->phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
883
-	phy_data->phydev->advertising = phy_data->phydev->supported;
890
+	linkmode_set_bit_array(phy_10_100_features_array,
891
+			       ARRAY_SIZE(phy_10_100_features_array),
892
+			       supported);
893
+	linkmode_set_bit_array(phy_gbit_features_array,
894
+			       ARRAY_SIZE(phy_gbit_features_array),
895
+			       supported);
896
+
897
+	linkmode_copy(phy_data->phydev->supported, supported);
898
+
899
+	phy_support_asym_pause(phy_data->phydev);
884900 
885901 	netif_dbg(pdata, drv, pdata->netdev,
886902 		  "Finisar PHY quirk in place\n");
....@@ -890,6 +906,7 @@
890906 
891907 static bool xgbe_phy_belfuse_phy_quirks(struct xgbe_prv_data *pdata)
892908 {
909
+	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported) = { 0, };
893910 	struct xgbe_phy_data *phy_data = pdata->phy_data;
894911 	struct xgbe_sfp_eeprom *sfp_eeprom = &phy_data->sfp_eeprom;
895912 	unsigned int phy_id = phy_data->phydev->phy_id;
....@@ -953,9 +970,14 @@
953970 	reg = phy_read(phy_data->phydev, 0x00);
954971 	phy_write(phy_data->phydev, 0x00, reg & ~0x00800);
955972 
956
-	phy_data->phydev->supported = PHY_GBIT_FEATURES;
957
-	phy_data->phydev->supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
958
-	phy_data->phydev->advertising = phy_data->phydev->supported;
973
+	linkmode_set_bit_array(phy_10_100_features_array,
974
+			       ARRAY_SIZE(phy_10_100_features_array),
975
+			       supported);
976
+	linkmode_set_bit_array(phy_gbit_features_array,
977
+			       ARRAY_SIZE(phy_gbit_features_array),
978
+			       supported);
979
+	linkmode_copy(phy_data->phydev->supported, supported);
980
+	phy_support_asym_pause(phy_data->phydev);
959981 
960982 	netif_dbg(pdata, drv, pdata->netdev,
961983 		  "BelFuse PHY quirk in place\n");
....@@ -977,7 +999,6 @@
977999 	struct ethtool_link_ksettings *lks = &pdata->phy.lks;
9781000 	struct xgbe_phy_data *phy_data = pdata->phy_data;
9791001 	struct phy_device *phydev;
980
-	u32 advertising;
9811002 	int ret;
9821003 
9831004 	/* If we already have a PHY, just return */
....@@ -1037,9 +1058,8 @@
10371058 
10381059 	xgbe_phy_external_phy_quirks(pdata);
10391060 
1040
-	ethtool_convert_link_mode_to_legacy_u32(&advertising,
1041
-						lks->link_modes.advertising);
1042
-	phydev->advertising &= advertising;
1061
+	linkmode_and(phydev->advertising, phydev->advertising,
1062
+		     lks->link_modes.advertising);
10431063 
10441064 	phy_start_aneg(phy_data->phydev);
10451065 
....@@ -1138,7 +1158,10 @@
11381158 	}
11391159 
11401160 	/* Determine the type of SFP */
1141
-	if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_SR)
1161
+	if (phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE &&
1162
+	    xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000))
1163
+		phy_data->sfp_base = XGBE_SFP_BASE_10000_CR;
1164
+	else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_SR)
11421165 		phy_data->sfp_base = XGBE_SFP_BASE_10000_SR;
11431166 	else if (sfp_base[XGBE_SFP_BASE_10GBE_CC] & XGBE_SFP_BASE_10GBE_CC_LR)
11441167 		phy_data->sfp_base = XGBE_SFP_BASE_10000_LR;
....@@ -1154,9 +1177,6 @@
11541177 		phy_data->sfp_base = XGBE_SFP_BASE_1000_CX;
11551178 	else if (sfp_base[XGBE_SFP_BASE_1GBE_CC] & XGBE_SFP_BASE_1GBE_CC_T)
11561179 		phy_data->sfp_base = XGBE_SFP_BASE_1000_T;
1157
-	else if ((phy_data->sfp_cable == XGBE_SFP_CABLE_PASSIVE) &&
1158
-		 xgbe_phy_sfp_bit_rate(sfp_eeprom, XGBE_SFP_SPEED_10000))
1159
-		phy_data->sfp_base = XGBE_SFP_BASE_10000_CR;
11601180 
11611181 	switch (phy_data->sfp_base) {
11621182 	case XGBE_SFP_BASE_1000_T:
....@@ -1218,7 +1238,7 @@
12181238 	for (cc = 0; len; buf++, len--)
12191239 		cc += *buf;
12201240 
1221
-	return (cc == cc_in) ? true : false;
1241
+	return cc == cc_in;
12221242 }
12231243 
12241244 static int xgbe_phy_sfp_read_eeprom(struct xgbe_prv_data *pdata)
....@@ -1498,10 +1518,7 @@
14981518 	if (!phy_data->phydev)
14991519 		return;
15001520 
1501
-	if (phy_data->phydev->advertising & ADVERTISED_Pause)
1502
-		lcl_adv |= ADVERTISE_PAUSE_CAP;
1503
-	if (phy_data->phydev->advertising & ADVERTISED_Asym_Pause)
1504
-		lcl_adv |= ADVERTISE_PAUSE_ASYM;
1521
+	lcl_adv = linkmode_adv_to_lcl_adv_t(phy_data->phydev->advertising);
15051522 
15061523 	if (phy_data->phydev->pause) {
15071524 		XGBE_SET_LP_ADV(lks, Pause);
....@@ -1628,6 +1645,7 @@
16281645 	if (ad_reg & 0x80) {
16291646 		switch (phy_data->port_mode) {
16301647 		case XGBE_PORT_MODE_BACKPLANE:
1648
+		case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
16311649 			mode = XGBE_MODE_KR;
16321650 			break;
16331651 		default:
....@@ -1637,6 +1655,7 @@
16371655 	} else if (ad_reg & 0x20) {
16381656 		switch (phy_data->port_mode) {
16391657 		case XGBE_PORT_MODE_BACKPLANE:
1658
+		case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
16401659 			mode = XGBE_MODE_KX_1000;
16411660 			break;
16421661 		case XGBE_PORT_MODE_1000BASE_X:
....@@ -1776,6 +1795,7 @@
17761795 
17771796 	switch (phy_data->port_mode) {
17781797 	case XGBE_PORT_MODE_BACKPLANE:
1798
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
17791799 		XGBE_SET_ADV(dlks, 10000baseKR_Full);
17801800 		break;
17811801 	case XGBE_PORT_MODE_BACKPLANE_2500:
....@@ -1819,7 +1839,6 @@
18191839 {
18201840 	struct ethtool_link_ksettings *lks = &pdata->phy.lks;
18211841 	struct xgbe_phy_data *phy_data = pdata->phy_data;
1822
-	u32 advertising;
18231842 	int ret;
18241843 
18251844 	ret = xgbe_phy_find_phy_device(pdata);
....@@ -1829,12 +1848,10 @@
18291848 	if (!phy_data->phydev)
18301849 		return 0;
18311850 
1832
-	ethtool_convert_link_mode_to_legacy_u32(&advertising,
1833
-						lks->link_modes.advertising);
1834
-
18351851 	phy_data->phydev->autoneg = pdata->phy.autoneg;
1836
-	phy_data->phydev->advertising = phy_data->phydev->supported &
1837
-					advertising;
1852
+	linkmode_and(phy_data->phydev->advertising,
1853
+		     phy_data->phydev->supported,
1854
+		     lks->link_modes.advertising);
18381855 
18391856 	if (pdata->phy.autoneg != AUTONEG_ENABLE) {
18401857 		phy_data->phydev->speed = pdata->phy.speed;
....@@ -1871,6 +1888,7 @@
18711888 	switch (phy_data->port_mode) {
18721889 	case XGBE_PORT_MODE_BACKPLANE:
18731890 		return XGBE_AN_MODE_CL73;
1891
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
18741892 	case XGBE_PORT_MODE_BACKPLANE_2500:
18751893 		return XGBE_AN_MODE_NONE;
18761894 	case XGBE_PORT_MODE_1000BASE_T:
....@@ -2197,6 +2215,7 @@
21972215 
21982216 	switch (phy_data->port_mode) {
21992217 	case XGBE_PORT_MODE_BACKPLANE:
2218
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
22002219 		return xgbe_phy_switch_bp_mode(pdata);
22012220 	case XGBE_PORT_MODE_BACKPLANE_2500:
22022221 		return xgbe_phy_switch_bp_2500_mode(pdata);
....@@ -2292,6 +2311,7 @@
22922311 
22932312 	switch (phy_data->port_mode) {
22942313 	case XGBE_PORT_MODE_BACKPLANE:
2314
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
22952315 		return xgbe_phy_get_bp_mode(speed);
22962316 	case XGBE_PORT_MODE_BACKPLANE_2500:
22972317 		return xgbe_phy_get_bp_2500_mode(speed);
....@@ -2467,6 +2487,7 @@
24672487 
24682488 	switch (phy_data->port_mode) {
24692489 	case XGBE_PORT_MODE_BACKPLANE:
2490
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
24702491 		return xgbe_phy_use_bp_mode(pdata, mode);
24712492 	case XGBE_PORT_MODE_BACKPLANE_2500:
24722493 		return xgbe_phy_use_bp_2500_mode(pdata, mode);
....@@ -2556,6 +2577,7 @@
25562577 
25572578 	switch (phy_data->port_mode) {
25582579 	case XGBE_PORT_MODE_BACKPLANE:
2580
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
25592581 		return xgbe_phy_valid_speed_bp_mode(speed);
25602582 	case XGBE_PORT_MODE_BACKPLANE_2500:
25612583 		return xgbe_phy_valid_speed_bp_2500_mode(speed);
....@@ -2841,6 +2863,7 @@
28412863 
28422864 	switch (phy_data->port_mode) {
28432865 	case XGBE_PORT_MODE_BACKPLANE:
2866
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
28442867 		if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
28452868 		    (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
28462869 			return false;
....@@ -2893,6 +2916,7 @@
28932916 
28942917 	switch (phy_data->port_mode) {
28952918 	case XGBE_PORT_MODE_BACKPLANE:
2919
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
28962920 	case XGBE_PORT_MODE_BACKPLANE_2500:
28972921 		if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE)
28982922 			return false;
....@@ -3209,6 +3233,8 @@
32093233 	/* Backplane support */
32103234 	case XGBE_PORT_MODE_BACKPLANE:
32113235 		XGBE_SET_SUP(lks, Autoneg);
3236
+		fallthrough;
3237
+	case XGBE_PORT_MODE_BACKPLANE_NO_AUTONEG:
32123238 		XGBE_SET_SUP(lks, Pause);
32133239 		XGBE_SET_SUP(lks, Asym_Pause);
32143240 		XGBE_SET_SUP(lks, Backplane);